This talk was given to the TumFUG Linux/Unix-User group at the TU München. Contact me via b.ploetzeneder@gmail.com

1. Multicore Birgit Plötzeneder, 11/24/10

4. O RLY? You want FASTER code. NOW. - prefetching - high comp load - image/video - fun

6. Intel Core 2 Quad

7. AMD Shanghai (K10)

8. Intel Dunnington (Xeon 74xx)

9. Intel i7

10. AMD Magny Cours

11. The Secret..

12. Moving from 1 core to 4 cores can give you a factor of

13. Moving from m emory to L 1 can give you a factor of

14. Disabling the L2 cache will reduce system performance more than disabling a second CPU core of a dual-core processor …

15. * see Iris Christadler, LRZ

16. OMP and MPI

18. A First Program

23. Using clauses

25. MPI-Concept mpicc <options> prog.c mpirun -arch <architecture> -np<np> prog

26. MPI

27. MPI

31. Communication Mode Blocking Routines Non-Blocking Routines synchronous MPI_SSEND MPI_ISSEND ready MPI_RSEND MPI_IRSEND buffered MPI_BSEND MPI_IBSEND standard MPI_SEND MPI_ISEND MPI_RECV MPI_IRECV MPI_SENDRECV MPI_SENDRECV_REPLACE

35. Profilers Two Types Statistical Profilers Event Based Profilers Statistical Profiling : Interrupts at random intervals and records which program instruction the CPU is executing. Event Based Profiling : Interrupts triggered by hardware counter events are recorded. Measuring profiles affects performance. Still a lot of data saved.

38. Extrae + Paraver module add paraver mpi2prv -f TRACE.mpits -o MPImatrix.prv v Scalasca Screenshots and examples of profilers/tracing tools available – but not on the internet. v

39. This talk was given to the TumFUG Linux/Unix-User group at the TU München. Contact me via [email_address] You may use the pictures of the processors (not the screenshots, not the overview pic which I only adapted), but please do notify and credit me accordingly. Some of the code was copy-pasted from Wikipedia. I've removed copy-right problematic parts.