EXPERIENCE SUMMARY
 An Electrical Engineer having over 9+ years of experience in Embedded Hardware Design.
 Proficient in Analog, Digital and Mixed signal Board design and development techniques in
defense, aerospace, railway and medical applications.
 Expertise in System (ATE & RME) level design, integration & testing and development techniques
in defense, aerospace applications.
 Exposure to VME, cPCI and PCI Architecture Modules.
 Experience in EMI Testing.
 Excels in circuit analysis, debugging and testing skills & proficient in using debugging tools.
 Exposure to complete embedded hardware development life cycle - The study of hardware spec,
requirement development , Circuit Modeling, H/W designs, Integration & testing, user
acceptance testing, Documentation & Production support.
CAREER PROFILE
 Hands-on experience as Electrical Engineer with wide exposure to various electrical design &
technology as well as in end to end product development life cycle.
 Strong skills in hardware design, testing, Schematic Capture, Circuit Simulation, analysis and
troubleshooting.
 Experience in Project management, quality control, process, maintenance, electronic rework,
failure analysis, materials or parts purchases, etc.
 Vendor and Team management, interpersonal, analytical & problem solving skills, adept in
mentoring & motivating team members.
 Thrive in deadline-driven environments.
TECHNICAL EXPERTISE
 Processors : Atmel Series AT80C51,MCF5270,MSP430F5340,MPC5448
 Hardware Tools : Cadence, Mentor Graphics
 Applications : Defense & Aerospace, Railway automation and Medical
 Reliability Engineering Tool : Lamda Predict, Reliasoft
 Simulation Tools : LTSPICE, PSPICE
 Software Languages : VHDL
 Operating Systems : Windows, Linux
 FPGA’s : Xilinx CPLD’s, Lattice LC4064, XC3S1400A, A3P1000-FG144M
 Digital Hardware Design Tools : Xilinx ISE(7.1) and Altera Quartaus-II (6.0)
 Component & Document
Management : IHS CAPS expert, Part Miner, DOORS, Agile
TECHNICAL SKILLS
 Analog/mixed signal circuits design/ Digital circuits design
 LDO and DC-DC Converters circuits design
 RS232,RS485,I2C, SPI, UART, USB,Arinc429 & MIL-1553B communication protocol circuit design
 16/32 bit µPs and µCs circuits design
 Hazardous analysis ,MTBF,FTA,Stress Analysis, Reliability Analysis
Dinesh Prasath RDinesh Prasath R
 Design & Development of Automated & Manual Test Stands for LRUs
 System level validation SAT (site acceptance test),QTP & ATP testing
 DO254 & Safety standards
 System Harness design & integration testing
 FPGA Programming & Verification
PROFESSIONAL EXPERIENCE
Larsen and Toubro Technology services Solutions - Project Leader
(From June, 2011 to till date)
 Key Responsibilities:
 Hardware Requirement Development
 Board Design and Development
 Hardware Verification and Validation Testing
 Automated & Manual Test Stands design and integration for LRUs
 DO254 Documentation
 Hardware design change impact analysis and technical documentation
 RoHS and obsolete components replacement and design, obsolescence management
 Technical Lead
Cognizant Technology Solutions-Hardware Design Engineer
(From June, 2010 to June, 2011)
 Key Responsibilities:
 Hardware Requirement Development
 Board design review
 FPGA Verification
 Board design specification analysis and test plan preparation in DOORS
 Module Testing and integration testing with System
Indus Teqsite Pvt Ltd (Subsidiary of Data Patterns (India) Pvt Ltd.)-Project Engineer
(From June, 2007 to June, 2010)
 Key Responsibilities:
 Board Design and Development
 Test Fixture Design and Development
 System Integration and Testing
 Factory Acceptance Testing
 Technical Documentation
Dinesh Prasath R
PROJECT PROFILE
Project Handled in L&T
PROJECT1 : MRJ ATE and ESS HW Support (onsite)
Project Description : MRJ ATE and ESS is automated test stand with NI card platforms used to
test the MRJ BCU (Brake Control Unit). The MRJ ATE and ESS hardware is used to control and signal
conditioning the NI test signals to interface with MRJ BCU for automated testing. The MRJ ATE and ESS
hardware provides NI application based control system to interface the NI test stand signals to MRJ BCU.
Role:
 Electrical hardware redesign and development of Static load board (for ESS testing) – Tolerance analysis -
Module Testing – Test System assembly and integration with BCU-Integration Testing – Test plan
preparation
PROJECT2 : MRJ BCU (onsite)
Project Description : The Brake Control Unit is part of a brake-by-wire hydraulically actuated
Brake Control System. The primary function of the Brake Control Unit is to control the system’s Servo Valves
during braking and to provide Antiskid functionality when a skid condition is detected.
Role:
 Timing Analysis – EMI Testing - Module Testing
PROJECT3 : KC390 FCEM (onsite)
Project Description : The KC390 FCEM is a LRU component used in a closed loop hydraulic
actuation system to control the Aileron and Elevator surfaces position on the KC390 aircraft.
Role:
 Requirement Development & Analysis- D0254 documentation on Verification Plan Creation –Hardware
Design Analysis (Stress, Power Budget)- Hardware Testing
PROJECT4 : MC21 MDE (onsite)
Project Description : The MC21 Motor Drive Electronics unit (MDE) is used to control the Trim
Horizontal Stabilizer Actuator (THSA) for the IRKUT MC21 -200 and -300 aircrafts. The MDE provides firmware
based closed loop motor control, electric off brake control and THSA sensor monitoring via the Control FPGA-
CON and the Independent FPGA - IND.
Role:
 Requirement Development
Dinesh Prasath R
PROJECT4 : MRJ Test setup simulator
Project Description : This simulator is a test system with external harness wiring to
monitor and control different I/Os of MRJ Left channel & Emergency channel LRUs and Secondary power
system .This system will be installed on the top of a test bench that will be installed in an EMC test
chamber LRUs, this system will enable steady state operation of all of the LRUs. The system will interface
to computer through Ethernet which is used for operating the test setup and for monitoring proper
operation will be located outside of the test chamber.
Role:
 Requirement Analysis-Board Design and Development -Testing the Hardware and system integration-
Preparation of various R&D documents-Coordinating with PCB designer for layout design
PROJECT4 : Capnostream 20P
Project Description : The Capnostream20 P is Capnostream20 is a portable patient Monitoring
System intended to provide continuous, non-invasive measurement and monitoring of carbon dioxide
concentration of the expired and inspired breath and respiration rate, functional oxygen saturation of
arterial hemoglobin (SpO2) and pulse rate .
Role:
 Hardware Requirement Analysis for USB controller design change-Design Change impact Analysis-Board
Design & board bring up and functional Testing-System Verification and Validation
Project Handled in CTS
PROJECT1 : Rail Signaling Automation
Project Description : The Signal Operating Module is a dual-card module containing a
Coded Input Module (CIM) that contains the dual FPGA Common Core, and a Signal Operating Module
(SOC). The purpose of the SOC is to switch the applied signaling supply to outputs when commanded by
the dual FPGA core and report via its Analog to Digital Converters (ADCs) the status of each output,
operating voltages and currents and the results of self-tests to prove that the hardware is fault-
free.
Role:
 Requirement analysis - Board design review –FPGA Verification- Stress analysis - Module Test plan
preparation and testing- integration testing with System – DOORS documentation for design verification
and validation plan
Role:
 Requirement Development & Analysis- Verification plan preparation-ATE System Design-Test Plan Creation
–Hardware Design Analysis (Stress, Power Budget, Tolerance)-Testing the Hardware and system
integration-Preparation of various R&D documents.
Dinesh Prasath R
Project Handled in Data Patterns
PROJECT1 : Analog and Digital capture board
Project Description : This card used in TIP system for capturing High voltage and CMOS
digital pulse commands from the bus management unit and measures the pulse width and amplitude
for selected channels then transmits to the test system through TIP processor board.
Role:
 Requirement analysis - Board Design and Development – Testing - Integration testing with System and
Technical Documentation.
EDUCATION QUALIFICATION
 Bachelor of Engineering (ECE) - K.S.R College of Technology, Anna University.
Percentage: 79.65 Year of Passing: 2007.
 Higher Secondary (+2) - Govt Higher Secondary School, Tamil Nadu State Board.
Percentage: 88.30 Year of Passing: 2003.
 SSLC (10th) - Sri Vidya Mandir High School, Matriculation Board.
Percentage: 73.03 Year of Passing: 2001
PERSONAL PROFILE
• Father’s Name : Ravi
• Date of Birth : Sep 29, 1985
• Nationality : Indian
• Languages : Tamil, English
• Marital status : Single
• Permanent Address : 9/1.A Narayanan Street, Rasipuram, Namakkal (Dt) –637408.
• Visa : US,H1B
I certify that the information furnished above is true to the best of my knowledge and
belief.
[R. Dinesh Prasath]
Dinesh Prasath R
Project Handled in Data Patterns
PROJECT1 : Analog and Digital capture board
Project Description : This card used in TIP system for capturing High voltage and CMOS
digital pulse commands from the bus management unit and measures the pulse width and amplitude
for selected channels then transmits to the test system through TIP processor board.
Role:
 Requirement analysis - Board Design and Development – Testing - Integration testing with System and
Technical Documentation.
EDUCATION QUALIFICATION
 Bachelor of Engineering (ECE) - K.S.R College of Technology, Anna University.
Percentage: 79.65 Year of Passing: 2007.
 Higher Secondary (+2) - Govt Higher Secondary School, Tamil Nadu State Board.
Percentage: 88.30 Year of Passing: 2003.
 SSLC (10th) - Sri Vidya Mandir High School, Matriculation Board.
Percentage: 73.03 Year of Passing: 2001
PERSONAL PROFILE
• Father’s Name : Ravi
• Date of Birth : Sep 29, 1985
• Nationality : Indian
• Languages : Tamil, English
• Marital status : Single
• Permanent Address : 9/1.A Narayanan Street, Rasipuram, Namakkal (Dt) –637408.
• Visa : US,H1B
I certify that the information furnished above is true to the best of my knowledge and
belief.
[R. Dinesh Prasath]
Dinesh Prasath R

LTTS_Dinesh Prasath_Resume

  • 1.
    EXPERIENCE SUMMARY  AnElectrical Engineer having over 9+ years of experience in Embedded Hardware Design.  Proficient in Analog, Digital and Mixed signal Board design and development techniques in defense, aerospace, railway and medical applications.  Expertise in System (ATE & RME) level design, integration & testing and development techniques in defense, aerospace applications.  Exposure to VME, cPCI and PCI Architecture Modules.  Experience in EMI Testing.  Excels in circuit analysis, debugging and testing skills & proficient in using debugging tools.  Exposure to complete embedded hardware development life cycle - The study of hardware spec, requirement development , Circuit Modeling, H/W designs, Integration & testing, user acceptance testing, Documentation & Production support. CAREER PROFILE  Hands-on experience as Electrical Engineer with wide exposure to various electrical design & technology as well as in end to end product development life cycle.  Strong skills in hardware design, testing, Schematic Capture, Circuit Simulation, analysis and troubleshooting.  Experience in Project management, quality control, process, maintenance, electronic rework, failure analysis, materials or parts purchases, etc.  Vendor and Team management, interpersonal, analytical & problem solving skills, adept in mentoring & motivating team members.  Thrive in deadline-driven environments. TECHNICAL EXPERTISE  Processors : Atmel Series AT80C51,MCF5270,MSP430F5340,MPC5448  Hardware Tools : Cadence, Mentor Graphics  Applications : Defense & Aerospace, Railway automation and Medical  Reliability Engineering Tool : Lamda Predict, Reliasoft  Simulation Tools : LTSPICE, PSPICE  Software Languages : VHDL  Operating Systems : Windows, Linux  FPGA’s : Xilinx CPLD’s, Lattice LC4064, XC3S1400A, A3P1000-FG144M  Digital Hardware Design Tools : Xilinx ISE(7.1) and Altera Quartaus-II (6.0)  Component & Document Management : IHS CAPS expert, Part Miner, DOORS, Agile TECHNICAL SKILLS  Analog/mixed signal circuits design/ Digital circuits design  LDO and DC-DC Converters circuits design  RS232,RS485,I2C, SPI, UART, USB,Arinc429 & MIL-1553B communication protocol circuit design  16/32 bit µPs and µCs circuits design  Hazardous analysis ,MTBF,FTA,Stress Analysis, Reliability Analysis Dinesh Prasath RDinesh Prasath R
  • 2.
     Design &Development of Automated & Manual Test Stands for LRUs  System level validation SAT (site acceptance test),QTP & ATP testing  DO254 & Safety standards  System Harness design & integration testing  FPGA Programming & Verification PROFESSIONAL EXPERIENCE Larsen and Toubro Technology services Solutions - Project Leader (From June, 2011 to till date)  Key Responsibilities:  Hardware Requirement Development  Board Design and Development  Hardware Verification and Validation Testing  Automated & Manual Test Stands design and integration for LRUs  DO254 Documentation  Hardware design change impact analysis and technical documentation  RoHS and obsolete components replacement and design, obsolescence management  Technical Lead Cognizant Technology Solutions-Hardware Design Engineer (From June, 2010 to June, 2011)  Key Responsibilities:  Hardware Requirement Development  Board design review  FPGA Verification  Board design specification analysis and test plan preparation in DOORS  Module Testing and integration testing with System Indus Teqsite Pvt Ltd (Subsidiary of Data Patterns (India) Pvt Ltd.)-Project Engineer (From June, 2007 to June, 2010)  Key Responsibilities:  Board Design and Development  Test Fixture Design and Development  System Integration and Testing  Factory Acceptance Testing  Technical Documentation Dinesh Prasath R
  • 3.
    PROJECT PROFILE Project Handledin L&T PROJECT1 : MRJ ATE and ESS HW Support (onsite) Project Description : MRJ ATE and ESS is automated test stand with NI card platforms used to test the MRJ BCU (Brake Control Unit). The MRJ ATE and ESS hardware is used to control and signal conditioning the NI test signals to interface with MRJ BCU for automated testing. The MRJ ATE and ESS hardware provides NI application based control system to interface the NI test stand signals to MRJ BCU. Role:  Electrical hardware redesign and development of Static load board (for ESS testing) – Tolerance analysis - Module Testing – Test System assembly and integration with BCU-Integration Testing – Test plan preparation PROJECT2 : MRJ BCU (onsite) Project Description : The Brake Control Unit is part of a brake-by-wire hydraulically actuated Brake Control System. The primary function of the Brake Control Unit is to control the system’s Servo Valves during braking and to provide Antiskid functionality when a skid condition is detected. Role:  Timing Analysis – EMI Testing - Module Testing PROJECT3 : KC390 FCEM (onsite) Project Description : The KC390 FCEM is a LRU component used in a closed loop hydraulic actuation system to control the Aileron and Elevator surfaces position on the KC390 aircraft. Role:  Requirement Development & Analysis- D0254 documentation on Verification Plan Creation –Hardware Design Analysis (Stress, Power Budget)- Hardware Testing PROJECT4 : MC21 MDE (onsite) Project Description : The MC21 Motor Drive Electronics unit (MDE) is used to control the Trim Horizontal Stabilizer Actuator (THSA) for the IRKUT MC21 -200 and -300 aircrafts. The MDE provides firmware based closed loop motor control, electric off brake control and THSA sensor monitoring via the Control FPGA- CON and the Independent FPGA - IND. Role:  Requirement Development Dinesh Prasath R
  • 4.
    PROJECT4 : MRJTest setup simulator Project Description : This simulator is a test system with external harness wiring to monitor and control different I/Os of MRJ Left channel & Emergency channel LRUs and Secondary power system .This system will be installed on the top of a test bench that will be installed in an EMC test chamber LRUs, this system will enable steady state operation of all of the LRUs. The system will interface to computer through Ethernet which is used for operating the test setup and for monitoring proper operation will be located outside of the test chamber. Role:  Requirement Analysis-Board Design and Development -Testing the Hardware and system integration- Preparation of various R&D documents-Coordinating with PCB designer for layout design PROJECT4 : Capnostream 20P Project Description : The Capnostream20 P is Capnostream20 is a portable patient Monitoring System intended to provide continuous, non-invasive measurement and monitoring of carbon dioxide concentration of the expired and inspired breath and respiration rate, functional oxygen saturation of arterial hemoglobin (SpO2) and pulse rate . Role:  Hardware Requirement Analysis for USB controller design change-Design Change impact Analysis-Board Design & board bring up and functional Testing-System Verification and Validation Project Handled in CTS PROJECT1 : Rail Signaling Automation Project Description : The Signal Operating Module is a dual-card module containing a Coded Input Module (CIM) that contains the dual FPGA Common Core, and a Signal Operating Module (SOC). The purpose of the SOC is to switch the applied signaling supply to outputs when commanded by the dual FPGA core and report via its Analog to Digital Converters (ADCs) the status of each output, operating voltages and currents and the results of self-tests to prove that the hardware is fault- free. Role:  Requirement analysis - Board design review –FPGA Verification- Stress analysis - Module Test plan preparation and testing- integration testing with System – DOORS documentation for design verification and validation plan Role:  Requirement Development & Analysis- Verification plan preparation-ATE System Design-Test Plan Creation –Hardware Design Analysis (Stress, Power Budget, Tolerance)-Testing the Hardware and system integration-Preparation of various R&D documents. Dinesh Prasath R
  • 5.
    Project Handled inData Patterns PROJECT1 : Analog and Digital capture board Project Description : This card used in TIP system for capturing High voltage and CMOS digital pulse commands from the bus management unit and measures the pulse width and amplitude for selected channels then transmits to the test system through TIP processor board. Role:  Requirement analysis - Board Design and Development – Testing - Integration testing with System and Technical Documentation. EDUCATION QUALIFICATION  Bachelor of Engineering (ECE) - K.S.R College of Technology, Anna University. Percentage: 79.65 Year of Passing: 2007.  Higher Secondary (+2) - Govt Higher Secondary School, Tamil Nadu State Board. Percentage: 88.30 Year of Passing: 2003.  SSLC (10th) - Sri Vidya Mandir High School, Matriculation Board. Percentage: 73.03 Year of Passing: 2001 PERSONAL PROFILE • Father’s Name : Ravi • Date of Birth : Sep 29, 1985 • Nationality : Indian • Languages : Tamil, English • Marital status : Single • Permanent Address : 9/1.A Narayanan Street, Rasipuram, Namakkal (Dt) –637408. • Visa : US,H1B I certify that the information furnished above is true to the best of my knowledge and belief. [R. Dinesh Prasath] Dinesh Prasath R
  • 6.
    Project Handled inData Patterns PROJECT1 : Analog and Digital capture board Project Description : This card used in TIP system for capturing High voltage and CMOS digital pulse commands from the bus management unit and measures the pulse width and amplitude for selected channels then transmits to the test system through TIP processor board. Role:  Requirement analysis - Board Design and Development – Testing - Integration testing with System and Technical Documentation. EDUCATION QUALIFICATION  Bachelor of Engineering (ECE) - K.S.R College of Technology, Anna University. Percentage: 79.65 Year of Passing: 2007.  Higher Secondary (+2) - Govt Higher Secondary School, Tamil Nadu State Board. Percentage: 88.30 Year of Passing: 2003.  SSLC (10th) - Sri Vidya Mandir High School, Matriculation Board. Percentage: 73.03 Year of Passing: 2001 PERSONAL PROFILE • Father’s Name : Ravi • Date of Birth : Sep 29, 1985 • Nationality : Indian • Languages : Tamil, English • Marital status : Single • Permanent Address : 9/1.A Narayanan Street, Rasipuram, Namakkal (Dt) –637408. • Visa : US,H1B I certify that the information furnished above is true to the best of my knowledge and belief. [R. Dinesh Prasath] Dinesh Prasath R