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1 of 3 IQBAL M. NAVIWALA, MSE, PE
IQBAL M. NAVIWALA, MSE, PE
616 Tumlinson Fort Way, Round Rock, TX 78664-2289
Email: naviwala@yahoo.com Phone: (346) 219-8668; (914) 352-1286 Skype: inaviwala
______________________________________________________________________________________
SUMMARY
A seasoned registered professional electrical engineer seeking a challenging position as an individual
contributor or managing projects in the areas of IT Communications, Computer Network Design and
Administration, Network Security, Safety Engineering, or Systems, Logic, Circuit and VLSI (microchip) Device
Designs. A detail oriented and hands-on technical person helping the teams in all aspect of development.
Acquired vast experience using various communications engineering solutions in varied communications
mediums, operating systems and platforms. Acquired additional skills in System level simulation and writing test
programs for System verification. Diverse background includes experience in managing projects from design,
development and simulation of Systems and Devices from conception to testing with focus on meeting and
exceeding customer requirements, on the job training and promoting products.
• Senior IT Business System Analyst • Senior IT Engineer / IT Consultant
• Led Projects from conception to completion • Technical Writer / provide technical support
• Prepare Business & Operating Plans and updates • Communications Systems Auditor
• Safety Coordinator, conduct safety inspections & audits • IT Governance & Management (COBIT-5)
• Cyber Security and ISO Compliance • Design Simulations and Verifications
• Logic VLSI and Systems Designs • Consultant and train junior Engineers
• Design Languages - VHDL, HDL (Verilog - XL) • Systems Administration
• Design types - Modem, Multimedia, ATM, FCS, ISDN, RISC and CISC microprocessors
• Operating Systems – Microsoft Windows, DOS, UNIX, AIX, HP-UX, VM, MVS, VAX/VMS, GCOS
• CAD tools - by Mentor Graphics, IKOS, Synopsys, Cadence, IBM, AT&T Bell Labs and Honeywell
• Platforms - HP, IBM and SUN Workstations; IBM, DEC and Honeywell Mainframes
ACCOMPLISHMENTS
SAUDI ARAMCO, Dhahran, Saudi Arabia June 1997 – May 2016
Senior Electrical Engineer, IT Engineering Department
As a senior Information Technology (IT) Business System Analyst, responsible for providing communications
engineering solutions and technical support to Saudi Aramco corporate wide. Led several IT projects from
conception to Mechanical Completion (MCC) with focus on projects requirements and on the job training.
Managed teams of engineers involved in designing and implementing of new systems, as well as improving
existing systems, and working with cross functional teams to deliver solutions that met or exceeded the project
requirements and quality as well as engineering and industry standards. Also responsible to conduct and
document yearly audits on all current and future technical solutions in all communications mediums (wired and
wireless) for cyber security, vulnerability from cyber-attacks and business continuity, and IT Risk Assessment
and Mitigation. Closed these audits after appropriate solutions were implemented. As a technical writer, produce
high-quality documents appropriate for its intended audience and provide technical support. Also responsible to
prepare 3-years Business Plans and annual Operating Plans, and provide quarterly updates to the Corporate
Management. Also as a senior Safety Coordinator and Consultant, responsible to conduct quarterly safety
inspections and audits, conduct assessment and gap analyses, and recommend appropriate solutions.
MOTOROLA, INCORPORATED, Austin, Texas, USA May 1994 – June 1997
Principal Electrical Engineer, MOS Digital-Analog Integrated Circuits (IC) Division
Verification team leader for a high performance modem chip using state of art technologies. Responsibilities
included design and synthesis of various system modules in VHDL, chip verification in the system environment,
2 of 3 IQBAL M. NAVIWALA, MSE, PE
hardware bring-up in the laboratory, and trained and being a consultant to other engineers. HP-UX operating
system and Mentor Graphics tools were used.
A Verification and Test team leader for a high performance Multimedia Video I/O Processor chip using state of
art technologies. Responsibilities included chip verification in system environment, designing modules in VHDL
Design Language for testability and JTAG methodology to emulate, debug and verify. The responsibilities also
included defining, implementing and documenting the simulation methodology, preparing and tracking
schedules, train junior engineers, and manage design projects until completions. HP-UX operating system and
IKOS hardware accelerator were used for the simulation.
IBM CORPORATION, Austin, Texas, USA July 1988 – April 1994
Staff Engineer
Advanced Workstation & Systems Division:
A project leader for a low cost, high performance (155 Mbps) Asynchronous Transfer Mode (ATM) engineering
evaluation card. Responsibilities included to design I/O subsystem, logic designs in Hardware Description
Language (HDL) synthesize to various Programmable Logic Devices (PLD), simulation, procurement of
components and physical card design interface for IBM Reduced Instruction Set Computer (RISC) System/6000.
Established ATM architect requirements, evaluated and selected appropriate ATM chip technology for
production I/O cards. All the design tools were used on the AIX operating system and IBM Workstations.
Defined and developed a common local bus for the Fiber Channel Standard (FCS) communication I/O cards.
Wrote and tested VHDL master and slave bus models, documented, simulated and trained engineers and
customers. Simulated external I/O chip with a Micro-Channel interface chip originally designed for PS/2.
Identified throughput problems and proposed solutions resulting in 50% improvement. Followed guidelines for
ISO 9000 compliance. All the design tools were used on the AIX operating system and IBM Workstations.
Data Systems Division:
Planned, coordinated, trained and led a team of designers to improve logic for the processor module in Bipolar
circuit technology. Reduced 20% cycle time and 15% power consumption without any I/O pin change on the
processor module. Designed for testability, simulated and verified logic for five chips on the processor module.
Promoted in recognition to Staff position for the innovation. All the design tools were used on IBM Mainframes.
ADVANCED MICRO DEVICES, INCORPORATED, Austin, Texas, USA June 1987 – July 1988
Senior Design Engineer, AM-29000 Microprocessors Product Line
Designed the Special Registers Block for the Integrated Cache Unit chip to accelerate external memory fetching
for AM29000 Microprocessors (32-bit RISC - Reduced Instruction Set Computer). Designed the Bus Interface
and Microprocessor Interface using Integrated Service Digital Network (ISDN) standards. Responsibilities
included several logic designs for testability; CMOS circuit designs and system simulations. Sub-micron design
rules were used. Computer-aided CAD tools were used on Mentor Graphics Workstations and IBM Mainframes.
AT&T BELL LABORATORIES, INCORPORATED, Allentown, Pennsylvania, USA March 1982 – May 1987
Member of Technical Staff (MTS)
Microprocessor Designs: Designed 32-bit CISC (Complex Instruction Set Computer) microprocessors
(WE32000 product line) in one-micron design rules. Responsibilities included logic designs, high performance -
high density CMOS circuit designs, circuit simulations, custom layouts, layout compactions and verifications.
CAD tools were used on SUN Workstations and DEC's VAX/VMS and UNIX operating systems.
Custom VLSI (Very Large Scale Integration) Designs: Led several Custom VLSI and Application Specific
Integrated Circuit (ASIC) projects, including circuit designs in NMOS and CMOS technologies using 3.5 to 1.5
micron design rules. Interfaced with customers for device definitions, partitions and redesign functions, circuit
simulation, design micro cells, VLSI microchip layouts on silicon, writing final I/O specifications and testing of the
packaged VLSI. CAD tools were used on DEC's VAX/VMS and IBM's VM/CMS operating systems.
3 of 3 IQBAL M. NAVIWALA, MSE, PE
HONEYWELL, INCORPORATED, Phoenix, Arizona, USA January 1980 – March 1982
Logic Design Engineer, Large Information Systems Division
Analyzed CAD testing strategies and evaluated "Simulator and Test Generator" software for fault coverage
simulation analysis and for automatic test vectors generation. Evaluated and published a report about Stuck-At
Faults and LSSD methods for testability of logic design. CAD tools were used on Honeywell Mainframes.
Designed and simulated the Integrated Peripheral Controller in MOS circuit technologies for Honeywell
computer motherboard. Designed several complex blocks for testability, debugged, documented and generated
test vectors. Computer-aided Design (CAD) tools were used on Honeywell's GCOS operating systems.
EMCEE ELECTRONICS, INCORPORATED, New Castle, Delaware, USA June 1977 – December 1979
Emcee Electrical has relocated to: 520 Cypress Avenue, Venice, Florida, USA
Staff Engineer
Designed and received ASTM (American Society for Testing and Materials - an international standards
organization that develops and publishes technical standards) approval for the Emcee Electrical Conductivity
Meter, a new instrument designed that provides a measurement of electrical conductivity of fluids to be used by
oil companies and refineries. Also designed Emcee Fuel Monitor and Gum Residue Tester used for fuel analysis
by oil companies and refineries. Designed and developed instruments (analog and digital logic) from conception
to testing, trouble shoot, wrote operating manuals, technical supervision and communication with customers.
LICENSE
Registered Professional Engineer in the State of Texas, USA, since April, 1988
Registered Consultant Engineer with Saudi Council of Engineers in Saudi Arabia, since September, 2014
PATENT
"Synchronous design using four phase non-overlapping clock generator" filed in Allentown, Pennsylvania, USA
EDUCATION
MASTERS OF SCIENCE IN ELECTRICAL ENGINEERING January 1980 - May 1982
Arizona State University, Tempe, Arizona, USA
BACHELOR OF ELECTRICAL ENGINEERING January 1974 - June 1977
University of Delaware, Newark, Delaware, USA
PERSONAL
US Citizen, Married

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NAVIWALA_Resume_161118

  • 1. 1 of 3 IQBAL M. NAVIWALA, MSE, PE IQBAL M. NAVIWALA, MSE, PE 616 Tumlinson Fort Way, Round Rock, TX 78664-2289 Email: naviwala@yahoo.com Phone: (346) 219-8668; (914) 352-1286 Skype: inaviwala ______________________________________________________________________________________ SUMMARY A seasoned registered professional electrical engineer seeking a challenging position as an individual contributor or managing projects in the areas of IT Communications, Computer Network Design and Administration, Network Security, Safety Engineering, or Systems, Logic, Circuit and VLSI (microchip) Device Designs. A detail oriented and hands-on technical person helping the teams in all aspect of development. Acquired vast experience using various communications engineering solutions in varied communications mediums, operating systems and platforms. Acquired additional skills in System level simulation and writing test programs for System verification. Diverse background includes experience in managing projects from design, development and simulation of Systems and Devices from conception to testing with focus on meeting and exceeding customer requirements, on the job training and promoting products. • Senior IT Business System Analyst • Senior IT Engineer / IT Consultant • Led Projects from conception to completion • Technical Writer / provide technical support • Prepare Business & Operating Plans and updates • Communications Systems Auditor • Safety Coordinator, conduct safety inspections & audits • IT Governance & Management (COBIT-5) • Cyber Security and ISO Compliance • Design Simulations and Verifications • Logic VLSI and Systems Designs • Consultant and train junior Engineers • Design Languages - VHDL, HDL (Verilog - XL) • Systems Administration • Design types - Modem, Multimedia, ATM, FCS, ISDN, RISC and CISC microprocessors • Operating Systems – Microsoft Windows, DOS, UNIX, AIX, HP-UX, VM, MVS, VAX/VMS, GCOS • CAD tools - by Mentor Graphics, IKOS, Synopsys, Cadence, IBM, AT&T Bell Labs and Honeywell • Platforms - HP, IBM and SUN Workstations; IBM, DEC and Honeywell Mainframes ACCOMPLISHMENTS SAUDI ARAMCO, Dhahran, Saudi Arabia June 1997 – May 2016 Senior Electrical Engineer, IT Engineering Department As a senior Information Technology (IT) Business System Analyst, responsible for providing communications engineering solutions and technical support to Saudi Aramco corporate wide. Led several IT projects from conception to Mechanical Completion (MCC) with focus on projects requirements and on the job training. Managed teams of engineers involved in designing and implementing of new systems, as well as improving existing systems, and working with cross functional teams to deliver solutions that met or exceeded the project requirements and quality as well as engineering and industry standards. Also responsible to conduct and document yearly audits on all current and future technical solutions in all communications mediums (wired and wireless) for cyber security, vulnerability from cyber-attacks and business continuity, and IT Risk Assessment and Mitigation. Closed these audits after appropriate solutions were implemented. As a technical writer, produce high-quality documents appropriate for its intended audience and provide technical support. Also responsible to prepare 3-years Business Plans and annual Operating Plans, and provide quarterly updates to the Corporate Management. Also as a senior Safety Coordinator and Consultant, responsible to conduct quarterly safety inspections and audits, conduct assessment and gap analyses, and recommend appropriate solutions. MOTOROLA, INCORPORATED, Austin, Texas, USA May 1994 – June 1997 Principal Electrical Engineer, MOS Digital-Analog Integrated Circuits (IC) Division Verification team leader for a high performance modem chip using state of art technologies. Responsibilities included design and synthesis of various system modules in VHDL, chip verification in the system environment,
  • 2. 2 of 3 IQBAL M. NAVIWALA, MSE, PE hardware bring-up in the laboratory, and trained and being a consultant to other engineers. HP-UX operating system and Mentor Graphics tools were used. A Verification and Test team leader for a high performance Multimedia Video I/O Processor chip using state of art technologies. Responsibilities included chip verification in system environment, designing modules in VHDL Design Language for testability and JTAG methodology to emulate, debug and verify. The responsibilities also included defining, implementing and documenting the simulation methodology, preparing and tracking schedules, train junior engineers, and manage design projects until completions. HP-UX operating system and IKOS hardware accelerator were used for the simulation. IBM CORPORATION, Austin, Texas, USA July 1988 – April 1994 Staff Engineer Advanced Workstation & Systems Division: A project leader for a low cost, high performance (155 Mbps) Asynchronous Transfer Mode (ATM) engineering evaluation card. Responsibilities included to design I/O subsystem, logic designs in Hardware Description Language (HDL) synthesize to various Programmable Logic Devices (PLD), simulation, procurement of components and physical card design interface for IBM Reduced Instruction Set Computer (RISC) System/6000. Established ATM architect requirements, evaluated and selected appropriate ATM chip technology for production I/O cards. All the design tools were used on the AIX operating system and IBM Workstations. Defined and developed a common local bus for the Fiber Channel Standard (FCS) communication I/O cards. Wrote and tested VHDL master and slave bus models, documented, simulated and trained engineers and customers. Simulated external I/O chip with a Micro-Channel interface chip originally designed for PS/2. Identified throughput problems and proposed solutions resulting in 50% improvement. Followed guidelines for ISO 9000 compliance. All the design tools were used on the AIX operating system and IBM Workstations. Data Systems Division: Planned, coordinated, trained and led a team of designers to improve logic for the processor module in Bipolar circuit technology. Reduced 20% cycle time and 15% power consumption without any I/O pin change on the processor module. Designed for testability, simulated and verified logic for five chips on the processor module. Promoted in recognition to Staff position for the innovation. All the design tools were used on IBM Mainframes. ADVANCED MICRO DEVICES, INCORPORATED, Austin, Texas, USA June 1987 – July 1988 Senior Design Engineer, AM-29000 Microprocessors Product Line Designed the Special Registers Block for the Integrated Cache Unit chip to accelerate external memory fetching for AM29000 Microprocessors (32-bit RISC - Reduced Instruction Set Computer). Designed the Bus Interface and Microprocessor Interface using Integrated Service Digital Network (ISDN) standards. Responsibilities included several logic designs for testability; CMOS circuit designs and system simulations. Sub-micron design rules were used. Computer-aided CAD tools were used on Mentor Graphics Workstations and IBM Mainframes. AT&T BELL LABORATORIES, INCORPORATED, Allentown, Pennsylvania, USA March 1982 – May 1987 Member of Technical Staff (MTS) Microprocessor Designs: Designed 32-bit CISC (Complex Instruction Set Computer) microprocessors (WE32000 product line) in one-micron design rules. Responsibilities included logic designs, high performance - high density CMOS circuit designs, circuit simulations, custom layouts, layout compactions and verifications. CAD tools were used on SUN Workstations and DEC's VAX/VMS and UNIX operating systems. Custom VLSI (Very Large Scale Integration) Designs: Led several Custom VLSI and Application Specific Integrated Circuit (ASIC) projects, including circuit designs in NMOS and CMOS technologies using 3.5 to 1.5 micron design rules. Interfaced with customers for device definitions, partitions and redesign functions, circuit simulation, design micro cells, VLSI microchip layouts on silicon, writing final I/O specifications and testing of the packaged VLSI. CAD tools were used on DEC's VAX/VMS and IBM's VM/CMS operating systems.
  • 3. 3 of 3 IQBAL M. NAVIWALA, MSE, PE HONEYWELL, INCORPORATED, Phoenix, Arizona, USA January 1980 – March 1982 Logic Design Engineer, Large Information Systems Division Analyzed CAD testing strategies and evaluated "Simulator and Test Generator" software for fault coverage simulation analysis and for automatic test vectors generation. Evaluated and published a report about Stuck-At Faults and LSSD methods for testability of logic design. CAD tools were used on Honeywell Mainframes. Designed and simulated the Integrated Peripheral Controller in MOS circuit technologies for Honeywell computer motherboard. Designed several complex blocks for testability, debugged, documented and generated test vectors. Computer-aided Design (CAD) tools were used on Honeywell's GCOS operating systems. EMCEE ELECTRONICS, INCORPORATED, New Castle, Delaware, USA June 1977 – December 1979 Emcee Electrical has relocated to: 520 Cypress Avenue, Venice, Florida, USA Staff Engineer Designed and received ASTM (American Society for Testing and Materials - an international standards organization that develops and publishes technical standards) approval for the Emcee Electrical Conductivity Meter, a new instrument designed that provides a measurement of electrical conductivity of fluids to be used by oil companies and refineries. Also designed Emcee Fuel Monitor and Gum Residue Tester used for fuel analysis by oil companies and refineries. Designed and developed instruments (analog and digital logic) from conception to testing, trouble shoot, wrote operating manuals, technical supervision and communication with customers. LICENSE Registered Professional Engineer in the State of Texas, USA, since April, 1988 Registered Consultant Engineer with Saudi Council of Engineers in Saudi Arabia, since September, 2014 PATENT "Synchronous design using four phase non-overlapping clock generator" filed in Allentown, Pennsylvania, USA EDUCATION MASTERS OF SCIENCE IN ELECTRICAL ENGINEERING January 1980 - May 1982 Arizona State University, Tempe, Arizona, USA BACHELOR OF ELECTRICAL ENGINEERING January 1974 - June 1977 University of Delaware, Newark, Delaware, USA PERSONAL US Citizen, Married