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CMR ENGINEERING COLLEGE
Kandlakoya (v), Medchal Road, Hyderabad – 501401.
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
List of LEAD Experiments for the A.C.Y (2012-2013)
S. No YEAR NAME OF THE LAB
NAME OF THE LEAD
EXPERIMENT
1. II/I
EDC
LED Flasher
BS
Design of FIR LPF using
Mat Lab
3. II/II
PDC
ECA
EE Tellegen’s Theorem
6. III/I
AC
Low Watt Audio and
voice Amplifier
ICA
Automatic Street Light
Controller
8. III/II
DSP
Discrete Cosine
Transform
MPMC Multi byte Addition
CMR ENGINEERING COLLEGE
Kandlakoya (v), Medchal Road, Hyderabad – 501401.
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
List of LEAD Experiments for the A.C.Y (2013-2014)
S. No YEAR NAME OF THE LAB
NAME OF THE LEAD
EXPERIMENT
II/I
EDC
LED Flasher
BS
Audio Signal Processing
using Mat Lab
3. II/II
PDC
ECA
EE Tellegen’s Theorem
6. III/I
AC FM receiver
ICA
Automatic Street Light
Controller
8. III/II
DSP Discrete Cosine Transform
MPMC
1. Multi byte addition and
Subtraction
2. Identification of 1’s
3. IV/I ECAD & VLSI
FPGA Implementation of
Viterbi Decoder
MWE&DC CDMA
CMR ENGINEERING COLLEGE
Kandlakoya (v), Medchal Road, Hyderabad – 501401.
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
List of LEAD Experiments for the A.C.Y (2014-2015)
S. No YEAR NAME OF THE LAB
NAME OF THE LEAD
EXPERIMENT
1.
II/I
EDC
Lighting of Christmas
BS
Audio Signal Processing using
Mat Lab
3. II/II
EC&PC
ET
Characteristics of 3- ACɸ
Machine
5. III/I AC Costas Loop Receiver
ICA Dark Sensor using IC 741
7. III/II
DSP Digital Image Compression
MPMC
1.a)BCD to ASCII Conversion
b) ASCII to BCD Conversion
2. Identification of Even and
Odd
1. IV/I
MWE&DC
Time Division Multiple Access
Technique using Mat Lab
VLSI
FPGA Implementation of
Viterbi Decoder
CMR ENGINEERING COLLEGE
Kandlakoya (v), Medchal Road, Hyderabad – 501401.
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
List of LEAD Experiments for the A.C.Y (2015-2016)
S. No YEAR NAME OF THE LAB
NAME OF THE LEAD
EXPERIMENT
1.
II/I
EDC
BS
Contrast Enhancement of a
image by Mat Lab
3. II/II
EC&PC
1.Class-C Power Amplifier
2.Sine Wave Generator or RC
Phase
Shift Oscillator
ET
Characteristics of 3- ACɸ
Machine
5. III/I AC Costas Loop Receiver
ICA &HDL Dark Sensor using IC 741
7. III/II
DSP Discrete Cosine Transform
MPMC
1.a)BCD to ASCII Conversion
b) ASCII to BCD Conversion
2. Identification of Even and
Odd
9. IV/I
MWE&DC
Time Division Multiple Access
Technique using Mat Lab
ECAD &VLSI
FPGA Implementation of
Galon’s Counter Mode

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Lead exp list

  • 1. CMR ENGINEERING COLLEGE Kandlakoya (v), Medchal Road, Hyderabad – 501401. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING List of LEAD Experiments for the A.C.Y (2012-2013) S. No YEAR NAME OF THE LAB NAME OF THE LEAD EXPERIMENT 1. II/I EDC LED Flasher BS Design of FIR LPF using Mat Lab 3. II/II PDC ECA EE Tellegen’s Theorem 6. III/I AC Low Watt Audio and voice Amplifier ICA Automatic Street Light Controller 8. III/II DSP Discrete Cosine Transform MPMC Multi byte Addition
  • 2. CMR ENGINEERING COLLEGE Kandlakoya (v), Medchal Road, Hyderabad – 501401. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING List of LEAD Experiments for the A.C.Y (2013-2014) S. No YEAR NAME OF THE LAB NAME OF THE LEAD EXPERIMENT II/I EDC LED Flasher BS Audio Signal Processing using Mat Lab 3. II/II PDC ECA EE Tellegen’s Theorem 6. III/I AC FM receiver ICA Automatic Street Light Controller 8. III/II DSP Discrete Cosine Transform MPMC 1. Multi byte addition and Subtraction 2. Identification of 1’s 3. IV/I ECAD & VLSI FPGA Implementation of Viterbi Decoder MWE&DC CDMA
  • 3. CMR ENGINEERING COLLEGE Kandlakoya (v), Medchal Road, Hyderabad – 501401. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING List of LEAD Experiments for the A.C.Y (2014-2015) S. No YEAR NAME OF THE LAB NAME OF THE LEAD EXPERIMENT 1. II/I EDC Lighting of Christmas BS Audio Signal Processing using Mat Lab 3. II/II EC&PC ET Characteristics of 3- ACɸ Machine 5. III/I AC Costas Loop Receiver ICA Dark Sensor using IC 741 7. III/II DSP Digital Image Compression MPMC 1.a)BCD to ASCII Conversion b) ASCII to BCD Conversion 2. Identification of Even and Odd 1. IV/I MWE&DC Time Division Multiple Access Technique using Mat Lab VLSI FPGA Implementation of Viterbi Decoder
  • 4. CMR ENGINEERING COLLEGE Kandlakoya (v), Medchal Road, Hyderabad – 501401. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING List of LEAD Experiments for the A.C.Y (2015-2016) S. No YEAR NAME OF THE LAB NAME OF THE LEAD EXPERIMENT 1. II/I EDC BS Contrast Enhancement of a image by Mat Lab 3. II/II EC&PC 1.Class-C Power Amplifier 2.Sine Wave Generator or RC Phase Shift Oscillator ET Characteristics of 3- ACɸ Machine 5. III/I AC Costas Loop Receiver ICA &HDL Dark Sensor using IC 741 7. III/II DSP Discrete Cosine Transform MPMC 1.a)BCD to ASCII Conversion b) ASCII to BCD Conversion 2. Identification of Even and Odd 9. IV/I MWE&DC Time Division Multiple Access Technique using Mat Lab ECAD &VLSI FPGA Implementation of Galon’s Counter Mode