IMI provides flexible electronics manufacturing solutions including design, engineering, and manufacturing services. It delivers innovative, customized, and integrated solutions to diverse markets such as automotive, industrial, medical, communications, computing, and renewable energy. IMI has a global manufacturing presence in Asia, North America, and Europe.
Getting to the Edge – Exploring 4G/5G Cloud-RAN Deployable SolutionsRadisys Corporation
View these slides, presented by Prakash Siva, VP, Technology & Strategy, hosted by Intel Network Builders, around the subject of Mobile Edge Computing.
The document provides an overview of semiconductor technology and industry. It discusses the history and evolution of transistor technology from the point contact transistor to today's nanowire transistors. It describes Moore's law and how transistor counts have increased exponentially over time due to scaling. The document also outlines the semiconductor manufacturing process and describes the infrastructure required for wafer fabrication facilities. It analyzes cost structures, yield optimization, and industry consolidation trends. Finally, it discusses future opportunities around applications like 5G, AI, and big data driving demand rather than technology alone.
The quad flat pack no lead or quad flat non-leaded (QFN) is one of the fastest growing package types in the electronics industry today. While the advantages of QFNs are well documented, concerns arise with its reliability and manufacturability. Acceptance of this package, especially in long-life, severe-environment, high-reliability applications, is currently limited. One of the most common drivers for reliability failures is inappropriate adoption of new technologies, such as the case with QFN. In this presentation, we will review and discuss QFN related reliability concerns and challenges, and propose Physics-of-Failure (PoF) based approaches to allow the confident introduction of QFN components into electronics products.
VLSI Physical Design Flow(http://www.vlsisystemdesign.com)VLSI SYSTEM Design
Learning becomes Fun..
When tedious & difficult topics like Chip Design are explained in simple n creative videos....https://www.udemy.com/vlsi-academy
Implementation strategies for digital icsaroosa khan
The document discusses various digital integrated circuit design implementation strategies. It describes very large scale integration (VLSI) and the VLSI design cycle. It then covers Moore's law, productivity growth rates, and two main design implementation strategies - full custom circuit design and standard cell-based semi-custom design. The document provides details on standard cell libraries, floorplanning, gate arrays, and field programmable gate arrays (FPGAs), and concludes with a comparison of the different design styles.
This document provides an overview of the ASIC back-end design flow, including physical design steps like floorplanning, placement, clock tree synthesis, and routing. It describes how CAD tools like Astro are used to automate the complex physical design process and optimize a design for timing while meeting other constraints. Key aspects of the flow include floorplanning the design, performing timing-driven placement and routing, building clock trees, and verifying the final implementation against timing and functional requirements.
The document provides information about a paper presentation on VLSI design and fabrication by two students. It includes an outline of topics to be covered such as introduction to VLSI, MOS transistors, CMOS circuits, and fabrication. The presentation aims to provide an introduction to VLSI design including how MOS transistors work and are used to build logic gates, as well as the process of designing masks and layouts for chips. It also gives an overview of the fabrication process used to manufacture chips.
Timing and Design Closure in Physical Design Flows Olivier Coudert
A physical design flow consists of producing a production-worthy layout from a gate-level netlist subject to a set of constraints. We focus on the problems imposed by shrinking process technologies. It exposes the problems of timing closure, signal integrity, design variable dependencies, clock and power/ground routing, and design signoff. It also surveys some physical design flows, and outlines a refinement-based flow.
Getting to the Edge – Exploring 4G/5G Cloud-RAN Deployable SolutionsRadisys Corporation
View these slides, presented by Prakash Siva, VP, Technology & Strategy, hosted by Intel Network Builders, around the subject of Mobile Edge Computing.
The document provides an overview of semiconductor technology and industry. It discusses the history and evolution of transistor technology from the point contact transistor to today's nanowire transistors. It describes Moore's law and how transistor counts have increased exponentially over time due to scaling. The document also outlines the semiconductor manufacturing process and describes the infrastructure required for wafer fabrication facilities. It analyzes cost structures, yield optimization, and industry consolidation trends. Finally, it discusses future opportunities around applications like 5G, AI, and big data driving demand rather than technology alone.
The quad flat pack no lead or quad flat non-leaded (QFN) is one of the fastest growing package types in the electronics industry today. While the advantages of QFNs are well documented, concerns arise with its reliability and manufacturability. Acceptance of this package, especially in long-life, severe-environment, high-reliability applications, is currently limited. One of the most common drivers for reliability failures is inappropriate adoption of new technologies, such as the case with QFN. In this presentation, we will review and discuss QFN related reliability concerns and challenges, and propose Physics-of-Failure (PoF) based approaches to allow the confident introduction of QFN components into electronics products.
VLSI Physical Design Flow(http://www.vlsisystemdesign.com)VLSI SYSTEM Design
Learning becomes Fun..
When tedious & difficult topics like Chip Design are explained in simple n creative videos....https://www.udemy.com/vlsi-academy
Implementation strategies for digital icsaroosa khan
The document discusses various digital integrated circuit design implementation strategies. It describes very large scale integration (VLSI) and the VLSI design cycle. It then covers Moore's law, productivity growth rates, and two main design implementation strategies - full custom circuit design and standard cell-based semi-custom design. The document provides details on standard cell libraries, floorplanning, gate arrays, and field programmable gate arrays (FPGAs), and concludes with a comparison of the different design styles.
This document provides an overview of the ASIC back-end design flow, including physical design steps like floorplanning, placement, clock tree synthesis, and routing. It describes how CAD tools like Astro are used to automate the complex physical design process and optimize a design for timing while meeting other constraints. Key aspects of the flow include floorplanning the design, performing timing-driven placement and routing, building clock trees, and verifying the final implementation against timing and functional requirements.
The document provides information about a paper presentation on VLSI design and fabrication by two students. It includes an outline of topics to be covered such as introduction to VLSI, MOS transistors, CMOS circuits, and fabrication. The presentation aims to provide an introduction to VLSI design including how MOS transistors work and are used to build logic gates, as well as the process of designing masks and layouts for chips. It also gives an overview of the fabrication process used to manufacture chips.
Timing and Design Closure in Physical Design Flows Olivier Coudert
A physical design flow consists of producing a production-worthy layout from a gate-level netlist subject to a set of constraints. We focus on the problems imposed by shrinking process technologies. It exposes the problems of timing closure, signal integrity, design variable dependencies, clock and power/ground routing, and design signoff. It also surveys some physical design flows, and outlines a refinement-based flow.
The document discusses VLSI design methodologies and limitations using CAD tools. It provides an overview of different VLSI design methodologies such as full custom design, semi-custom design, gate array design, standard cell design, FPGA-based design and CPLD-based design. It also discusses the evolution of VLSI design flows from past to present technologies. Furthermore, it describes the complexities in VLSI design and how CAD tools help manage these complexities and automate the design process. Finally, it summarizes different types of VLSI CAD tools and compares various open source and licensed CAD tool vendors.
The document discusses trends in telecom infrastructure including digitalization, virtualization, and mobility that are increasing data volumes and requiring more advanced data processing. It highlights edge computing, graphics processing units (GPUs), and field programmable gate arrays (FPGAs) as technologies that can help meet these demands. Edge computing distributes computing power and data storage closer to end users to reduce latency and network loads. GPUs and FPGAs can provide increased computing power for tasks like machine learning and help customize network nodes. The document also examines how these technologies may support the evolution to 5G networks through features like network slicing and distributed analytics.
Evaluating UCIe based multi-die SoC to meet timing and power Deepak Shankar
This document discusses evaluating a UCIe-based multi-die system-on-chip (SoC) using system modeling to meet timing and power constraints. It provides an overview of UCIe and how it can be used to connect multiple dies. It then describes assembling a system model in VisualSim Architect using UCIe components to analyze configurations and optimize latency, bandwidth, and power. Examples of multi-media and automotive applications using UCIe-based chiplet designs are also presented.
This document discusses low power VLSI design. It defines power dissipation as being either static, from leakage current, or dynamic, from transistor switching activities. The key strategies for low power design are reducing supply voltage, physical capacitance, and switching activity. Specific techniques mentioned include clock gating, power gating, reducing chip capacitance, scaling voltage, better design methods, and power management. The document also discusses calculating and minimizing switching activity and using CAD tools at different design levels.
VLSI refers to very large scale integration in electronics, involving the integration of millions of transistors on a single chip. The document discusses the history and evolution of integration levels from SSI to VLSI to ULSI. It describes the CMOS fabrication process and design styles used in VLSI. Key phases in chip creation are design, fabrication, testing and packaging. Advanced computer-aided design tools are needed to design complex VLSI circuits. Applications include analog, ASIC and system-on-chip designs. Challenges to VLSI include power dissipation and scaling issues as integration increases. The future of VLSI involves continued device miniaturization and increasing transistor densities on chips.
The document discusses placement in physical design. It describes placement as assigning positions to predesigned cells on a chip without overlapping to optimize objectives like minimizing area and interconnects. It discusses different placement types, formulates the placement problem, and describes algorithms like partitioning-based placement, simulated annealing placement, and iterative placement methods.
This document discusses different circuit design techniques for combinational logic, including:
1. Pseudo-nMOS circuits which use a permanently on pMOS transistor but have static power consumption issues.
2. Cascode Voltage Switch Logic seeks the performance of pseudo-nMOS without static power draw but requires input complements.
3. Pass transistor logic uses only two transistors but output levels are not restored perfectly and cannot drive other gates directly.
The document discusses various techniques for reducing power consumption at different levels, from circuit-level optimizations like transistor sizing and voltage scaling, to logic synthesis techniques like clock gating and state encoding, to algorithm-level optimizations and architecturally-static pipelining supported by an optimizing compiler. It notes that power optimization is important for cost, dependability, and extending battery life, and that while proposed approaches show potential, accurate energy assessments of new techniques are still needed.
The document discusses design for testability (DFT) techniques. It explains that DFT is important for testing integrated circuits due to unavoidable manufacturing defects. DFT aims to increase testability by making internal nodes more controllable and observable. Common DFT techniques mentioned include adding scan chains, which allow testing at speed by launching test vectors from a shift register. Stuck-at fault and transition fault models are discussed as well as methods for detecting these faults including launch-on-capture and launch-on-shift. Fault equivalence and collapsing techniques are also summarized.
gain & directivity enhancement of patch antenna using metamaterialRitesh Kumar
This document discusses several papers on using metamaterials to enhance the gain and directivity of patch antennas. It first provides an overview of metamaterials and their properties. It then summarizes three research papers that designed different metamaterial structures to act as superstrates above microstrip patch antennas. All three papers were able to significantly increase the gain of the patch antennas using near-zero index metamaterial superstrates designed with unit cells like the Jerusalem Cross, Double S-shape, and mnz-metasurfaces. Simulation results from the papers showed enhanced realized gains between 2.3 to 7.65 dB compared to reference patch antennas without metamaterial loading.
This document outlines the typical design flow for VLSI chips, including: 1) design specification, 2) design entry using schematics or HDL, 3) functional simulation to verify logic, 4) planning placement and routing of components, 5) timing simulation accounting for delays, and 6) fabrication of the final chip design either using full custom or semi-custom methods. The goal is to design and test a chip that meets the specified requirements before manufacturing.
The document provides an overview of Altera's Stratix family of FPGAs, including their architecture, memory blocks, DSP blocks, clock management, and I/O features. It discusses how Stratix FPGAs have been used in high-performance applications such as HDTV and video recording. The document also briefly mentions Altera's design software, intellectual property, and embedded Nios II soft-core processor.
The semiconductor industry is undergoing dynamic changes as technology challenges escalate due to the end of scaling and declining prices/shortening lifecycles. R&D and manufacturing investment requirements are becoming unaffordable for many smaller companies. As a result, companies globally are adopting an "asset-lite" strategy and manufacturing is moving offshore to large-scale foundries. Revenue growth of the IC industry will remain lower than traditional rates in the single digits rather than double digits, though productivity will still improve at lower rates. Partnerships will be important for development, manufacturing, and delivering technology leadership given mounting investment needs.
The developing technology, the future, a tech that can replace the electronics era itself.
Few information about the tech and the fundamentals of Spintronics.
Placement and routing in full custom physical designDeiptii Das
The document discusses placement and routing in full custom VLSI design. Placement involves techniques like diffusion sharing, gate matrix layout, and common centroid to optimize area and performance. Routing creates physical interconnects and involves global routing, track assignment, detail routing, and search and repair to meet timing constraints while resolving design rule checking violations. The quality of placement impacts routability, and routing aims to minimize delay along critical paths through techniques like buffer insertion and wire sizing.
The document summarizes the physical design flow for integrated circuits and routing algorithms. It discusses the objectives of routing to minimize wire length for general purpose chips and meet timing budgets for high performance chips. Global routing algorithms like maze routing and Lee algorithm are described. Maze routing works by propagating a wavefront from source to target and backtracking the shortest path. The Lee algorithm finds the shortest two-terminal connection on a grid using this approach.
This document describes the design and characterization of a D flip-flop cell. It includes the layout, schematic, simulation waveforms, and timing analysis of the D flip-flop. The layout uses two metal layers and occupies an area of 76.8 μm2. Timing parameters such as setup time, clock-to-output time, and delay are calculated through HSPICE simulation and optimization curves.
This document discusses soft processors like the NIOS II that can be implemented on FPGAs. It provides details on the NIOS II architecture, implementation, and IDE. It compares NIOS II to the TigerSHARC architecture. It also analyzes the performance of a FIR filter algorithm on both platforms, showing NIOS II is slower but hardware acceleration could improve its performance. Overall it presents NIOS II as a customizable alternative to DSPs that blurs the line between FPGAs and processors.
Can automation manufacturers and system integrators be true partners?Schneider Electric
The document discusses the partnership between system integrators and automation manufacturers. It argues that both parties need each other to best serve customers. When the partnership works well, with openness, transparency, trust and communication, it can provide great value for customers. The document provides an example of a successful collaboration between Schneider Electric and a system integrator, George T. Hall Co., to upgrade the PLC and I/O for a gold mine's processing plant. The project was completed on time and without issues, demonstrating the benefits of the manufacturer-integrator partnership.
The document discusses two key market trends that Juniper is focused on: cloud computing and mobile internet. It notes that virtualization is not the same as cloud computing. The cloud delivers services over the network and provides benefits like elasticity, agility, and efficiency through dynamically shared resource pools. The document also discusses how the rise of mobility is redefining business practices and creating demand for more advanced data center capabilities, with data centers beginning to build cloud environments.
The document discusses VLSI design methodologies and limitations using CAD tools. It provides an overview of different VLSI design methodologies such as full custom design, semi-custom design, gate array design, standard cell design, FPGA-based design and CPLD-based design. It also discusses the evolution of VLSI design flows from past to present technologies. Furthermore, it describes the complexities in VLSI design and how CAD tools help manage these complexities and automate the design process. Finally, it summarizes different types of VLSI CAD tools and compares various open source and licensed CAD tool vendors.
The document discusses trends in telecom infrastructure including digitalization, virtualization, and mobility that are increasing data volumes and requiring more advanced data processing. It highlights edge computing, graphics processing units (GPUs), and field programmable gate arrays (FPGAs) as technologies that can help meet these demands. Edge computing distributes computing power and data storage closer to end users to reduce latency and network loads. GPUs and FPGAs can provide increased computing power for tasks like machine learning and help customize network nodes. The document also examines how these technologies may support the evolution to 5G networks through features like network slicing and distributed analytics.
Evaluating UCIe based multi-die SoC to meet timing and power Deepak Shankar
This document discusses evaluating a UCIe-based multi-die system-on-chip (SoC) using system modeling to meet timing and power constraints. It provides an overview of UCIe and how it can be used to connect multiple dies. It then describes assembling a system model in VisualSim Architect using UCIe components to analyze configurations and optimize latency, bandwidth, and power. Examples of multi-media and automotive applications using UCIe-based chiplet designs are also presented.
This document discusses low power VLSI design. It defines power dissipation as being either static, from leakage current, or dynamic, from transistor switching activities. The key strategies for low power design are reducing supply voltage, physical capacitance, and switching activity. Specific techniques mentioned include clock gating, power gating, reducing chip capacitance, scaling voltage, better design methods, and power management. The document also discusses calculating and minimizing switching activity and using CAD tools at different design levels.
VLSI refers to very large scale integration in electronics, involving the integration of millions of transistors on a single chip. The document discusses the history and evolution of integration levels from SSI to VLSI to ULSI. It describes the CMOS fabrication process and design styles used in VLSI. Key phases in chip creation are design, fabrication, testing and packaging. Advanced computer-aided design tools are needed to design complex VLSI circuits. Applications include analog, ASIC and system-on-chip designs. Challenges to VLSI include power dissipation and scaling issues as integration increases. The future of VLSI involves continued device miniaturization and increasing transistor densities on chips.
The document discusses placement in physical design. It describes placement as assigning positions to predesigned cells on a chip without overlapping to optimize objectives like minimizing area and interconnects. It discusses different placement types, formulates the placement problem, and describes algorithms like partitioning-based placement, simulated annealing placement, and iterative placement methods.
This document discusses different circuit design techniques for combinational logic, including:
1. Pseudo-nMOS circuits which use a permanently on pMOS transistor but have static power consumption issues.
2. Cascode Voltage Switch Logic seeks the performance of pseudo-nMOS without static power draw but requires input complements.
3. Pass transistor logic uses only two transistors but output levels are not restored perfectly and cannot drive other gates directly.
The document discusses various techniques for reducing power consumption at different levels, from circuit-level optimizations like transistor sizing and voltage scaling, to logic synthesis techniques like clock gating and state encoding, to algorithm-level optimizations and architecturally-static pipelining supported by an optimizing compiler. It notes that power optimization is important for cost, dependability, and extending battery life, and that while proposed approaches show potential, accurate energy assessments of new techniques are still needed.
The document discusses design for testability (DFT) techniques. It explains that DFT is important for testing integrated circuits due to unavoidable manufacturing defects. DFT aims to increase testability by making internal nodes more controllable and observable. Common DFT techniques mentioned include adding scan chains, which allow testing at speed by launching test vectors from a shift register. Stuck-at fault and transition fault models are discussed as well as methods for detecting these faults including launch-on-capture and launch-on-shift. Fault equivalence and collapsing techniques are also summarized.
gain & directivity enhancement of patch antenna using metamaterialRitesh Kumar
This document discusses several papers on using metamaterials to enhance the gain and directivity of patch antennas. It first provides an overview of metamaterials and their properties. It then summarizes three research papers that designed different metamaterial structures to act as superstrates above microstrip patch antennas. All three papers were able to significantly increase the gain of the patch antennas using near-zero index metamaterial superstrates designed with unit cells like the Jerusalem Cross, Double S-shape, and mnz-metasurfaces. Simulation results from the papers showed enhanced realized gains between 2.3 to 7.65 dB compared to reference patch antennas without metamaterial loading.
This document outlines the typical design flow for VLSI chips, including: 1) design specification, 2) design entry using schematics or HDL, 3) functional simulation to verify logic, 4) planning placement and routing of components, 5) timing simulation accounting for delays, and 6) fabrication of the final chip design either using full custom or semi-custom methods. The goal is to design and test a chip that meets the specified requirements before manufacturing.
The document provides an overview of Altera's Stratix family of FPGAs, including their architecture, memory blocks, DSP blocks, clock management, and I/O features. It discusses how Stratix FPGAs have been used in high-performance applications such as HDTV and video recording. The document also briefly mentions Altera's design software, intellectual property, and embedded Nios II soft-core processor.
The semiconductor industry is undergoing dynamic changes as technology challenges escalate due to the end of scaling and declining prices/shortening lifecycles. R&D and manufacturing investment requirements are becoming unaffordable for many smaller companies. As a result, companies globally are adopting an "asset-lite" strategy and manufacturing is moving offshore to large-scale foundries. Revenue growth of the IC industry will remain lower than traditional rates in the single digits rather than double digits, though productivity will still improve at lower rates. Partnerships will be important for development, manufacturing, and delivering technology leadership given mounting investment needs.
The developing technology, the future, a tech that can replace the electronics era itself.
Few information about the tech and the fundamentals of Spintronics.
Placement and routing in full custom physical designDeiptii Das
The document discusses placement and routing in full custom VLSI design. Placement involves techniques like diffusion sharing, gate matrix layout, and common centroid to optimize area and performance. Routing creates physical interconnects and involves global routing, track assignment, detail routing, and search and repair to meet timing constraints while resolving design rule checking violations. The quality of placement impacts routability, and routing aims to minimize delay along critical paths through techniques like buffer insertion and wire sizing.
The document summarizes the physical design flow for integrated circuits and routing algorithms. It discusses the objectives of routing to minimize wire length for general purpose chips and meet timing budgets for high performance chips. Global routing algorithms like maze routing and Lee algorithm are described. Maze routing works by propagating a wavefront from source to target and backtracking the shortest path. The Lee algorithm finds the shortest two-terminal connection on a grid using this approach.
This document describes the design and characterization of a D flip-flop cell. It includes the layout, schematic, simulation waveforms, and timing analysis of the D flip-flop. The layout uses two metal layers and occupies an area of 76.8 μm2. Timing parameters such as setup time, clock-to-output time, and delay are calculated through HSPICE simulation and optimization curves.
This document discusses soft processors like the NIOS II that can be implemented on FPGAs. It provides details on the NIOS II architecture, implementation, and IDE. It compares NIOS II to the TigerSHARC architecture. It also analyzes the performance of a FIR filter algorithm on both platforms, showing NIOS II is slower but hardware acceleration could improve its performance. Overall it presents NIOS II as a customizable alternative to DSPs that blurs the line between FPGAs and processors.
Can automation manufacturers and system integrators be true partners?Schneider Electric
The document discusses the partnership between system integrators and automation manufacturers. It argues that both parties need each other to best serve customers. When the partnership works well, with openness, transparency, trust and communication, it can provide great value for customers. The document provides an example of a successful collaboration between Schneider Electric and a system integrator, George T. Hall Co., to upgrade the PLC and I/O for a gold mine's processing plant. The project was completed on time and without issues, demonstrating the benefits of the manufacturer-integrator partnership.
The document discusses two key market trends that Juniper is focused on: cloud computing and mobile internet. It notes that virtualization is not the same as cloud computing. The cloud delivers services over the network and provides benefits like elasticity, agility, and efficiency through dynamically shared resource pools. The document also discusses how the rise of mobility is redefining business practices and creating demand for more advanced data center capabilities, with data centers beginning to build cloud environments.
This document discusses cloud services and provides an overview of EMC's cloud offerings. It begins by defining public, private and hybrid cloud models. It then discusses which industries are adopting cloud services and the types of service provider offerings available. The document also examines security considerations for the cloud and how workloads can be evaluated for public or private cloud deployment. It provides examples of EMC-powered service providers and virtual infrastructure solutions. In closing, it discusses how EMC solutions enable automated provisioning and management across hybrid cloud environments.
The document discusses NEC's UNIVERGE 3C unified communications solution. It begins with an agenda that covers UC market trends, how business is changing, the features of UNIVERGE 3C including being user centric, its architecture, unified client, and deployment. It then provides details on global UC market opportunities, Gartner positioning of NEC, trends in enterprise UC adoption, and how the future of business is changing to be more mobile, collaborative, and cloud-based. The document promotes UNIVERGE 3C as a software-centric solution that allows consistent user experience across devices with web collaboration, IM, presence and mobile support.
Mr. John Bernaden
On Friday, September 25th, Alliance to Save Energy hosted “Smart Manufacturing: Modernization to Marketplace,” in the Rayburn House Office Building. This briefing, moderated by the Alliance’s Vice President of Programs, Jeffery Harris, explored the merits of smart technologies—including sensors and wireless controls—in a modern manufacturing environment.
In this webinar, DemandGen Report’s Andrew Gaffney and Manticore Technology’s Jeff Erramouspe have teamed up to take the Content Blueprint one step further and discuss how to create and use content strategically to build relationships with buyers and drive lead conversion. Join us to learn:
The document discusses the power of cloud computing and its growing importance. It notes that technology is now seen as the most important external force impacting organizations. It outlines barriers to cloud adoption but also "wow factors" like cost savings, speed, and scalability. The document discusses three approaches organizations can take to cloud (optimize, innovate, disrupt) and says disruptors expect to significantly outperform others. It provides examples of how IBM is using cloud computing with clients.
Bull is a European technology company that provides high-performance computing and cybersecurity solutions. It helps customers innovate with new technologies, optimize their infrastructure through outsourcing and cloud services, integrate critical business applications, and guarantee trust through cybersecurity products and services. Bull has a presence in over 50 countries and expertise in key verticals such as public sector, telecom, finance, energy, defense, and transportation.
- Austin Energy is a large public power utility serving over 1 million customers that aims to be a leader in conservation, renewable energy, and smart grid technologies.
- Its legacy systems were complex and lacked integration, posing challenges. It chose to implement a service-oriented architecture (SOA) to better integrate applications and reduce costs as business models and processes changed frequently.
- Austin Energy used rigorous selection criteria focusing on technical requirements and conducted vendor research and piloting before selecting an SOA platform to build new integrated applications and enhance customer services like outage detection and demand response.
Deploying Access for 3G and 4G Mobile NetworksCisco Canada
This presentation will discuss SP Wifi requirements, components of an end-to-end solution, mobile packet core integration, call flows for typical deployments
Keynote by Mario Derba at Optimized Data Center event, MilanoMario Derba
The document discusses how the IT landscape is changing rapidly due to factors like increasing data usage and diversity, new user requirements driven by mobile devices and apps, and new pressures on IT from businesses and users. It argues that IT needs to transform its aging, siloed infrastructure and be seen as a strategic leader through integrated, optimized solutions that drive choice and value for customers. Oracle's strategy is presented as delivering a complete technology stack and choice in deployment models through engineering systems to work together.
EMC Cloud Computing Casee Studies for Zimbabwe breakfast briefing by Grant Mu...TechZim
This document discusses cloud computing trends in various industries. It shows that the top industries adopting cloud computing in 2011 were financial services at 21% of cloud spending, manufacturing at 19%, and government at 15%. The document also provides examples of cloud services offered by major technology companies and service providers for industries such as capital markets, backup, storage, and more. Finally, it outlines EMC's cloud management platform and architecture to deliver cloud services.
Keynote by Mario Derba at Oracle Optimized Data Center event in Paris Mario Derba
The document discusses challenges facing IT organizations and the need for data center optimization. It notes that data and user requirements are growing rapidly but IT budgets are flat. This is putting pressure on aging infrastructure and increasing costs. The document advocates adopting a strategic approach to data center optimization through server virtualization, consolidation, and transitioning to a flexible "grid computing" model to improve efficiency and reduce costs.
Become an Emulex Expert with Free Technical Training and CertificationEmulex Corporation
In a recent customer satisfaction survey of 878 end users:
- 52% felt training was important or very important and 88% felt technical support was important.
- Over 90% of respondents were satisfied or very satisfied with various aspects of Emulex's fibre channel HBAs and Ethernet adapters.
- In response, Emulex created the Emulex Extra program to provide online training, support tools, and resources to help users become "Certified Emulex Experts." The program aims to improve the customer experience based on survey feedback.
The presentation will discuss the meaning of cloud technologies, various cloud approaches, the three paths to private cloud, challenges associated with private cloud and big data.
johnson controls CanaccordAdams Virtual Roundtable: A Perspective on Energy E...finance8
This document summarizes Johnson Controls' annual analyst day presentation on October 14, 2008 in New York City. Johnson Controls has three main business segments: Building Efficiency, Power Solutions, and Automotive Experience. In 2007, Building Efficiency generated $34.6 billion in sales and $1.3 billion in earnings. The presentation will review Johnson Controls' strategies, market outlook, and guidance for 2009.
DB2 Storage Engine for MySQL and Open Source Applications SessionZendCon
MySQL in i5/OS opens up new and interesting methods both for developing customized web-based applications that leverage i5/OS resources as well as deploying open community solutions.
This document discusses Nokia's history, values, future mobile market trends, and new mobile concept development. It provides details on Nokia's transformation from pulp and rubber manufacturing to becoming a global leader in mobile telecommunications. The key values that drove Nokia's success are highlighted as customer satisfaction, respect for the individual, and continuous learning. The document also outlines trends in the future mobile market like increased competition, the rise of mobile internet/Web 2.0, and destruction of industry borders. Finally, concepts for new mobile phones focused on unexpected design changes, personal memories, and customizable interfaces are presented.
Presentation of Amaury Korniloff, Founder of Solaire Direct. Sustainability & Business Club of INSEAD Alumni Association France (Paris, Cercle de l'Union Interalliée, june 20th 2012)
Does the photovoltaic technology still have a future ?
IMI Group Presentation
1. BUILD YOUR
BUSINESS
WITH OUR FLEXIBLE
SOLUTIONS
1
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
2. IMI - Integrated Micro-Electronics Inc.
A leading provider of electronics
manufacturing services (EMS) and power
semiconductor assembly and test services
Delivers innovative, customized, and
integrated solutions of highest quality
Serves diverse markets
Automotive, industrial, and medical electronics
Communications, computing and renewable
energy
With manufacturing presence in Asia, North
America, and Europe
2
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
3. IMI, an Ayala Company
‘CORE’ ‘EMERGING’
Ayala
53.2%
Largest and only full line property 67.7% New Sectors
developer in the country 24th
of the top 50 EMS
companies in the world
— Power &
33.6% Most profitable bank among peers; 100.0% — Infrastructure
leader in remittances, trust & asset • Top 5 in CRM
management • Top 3 in KPO
• Top 3 in Graphics Design
• Outsourcing
30.5%
Second largest telco company in the country Ayala Automotive100.0%
Largest dealership network of
Manila Water Honda and Isuzu cars
43.2% nationwide
Pioneer in water infrastructure development
3 3
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
4. IMI Ownership Structure
For Common Shares % of Ownership
AYC Holdings, Ltd. 58.03%
Resins, Inc. 14.51%
EPIQ NV 12.12%
ESOWN Subscription 5.86%
POMS Investment PTE, LTD. 3.48%
Mitsubishi Corp. 0.73%
SiiX Corporation 0.40%
Others/Public 4.87%
Total 100%
As of May 2012
4
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
5. IMI Milestones
1980 IMI was established by Ayala Corporation and Resins Inc
1982 Expanded IC assembly business into contract manufacturing
1998 Started offering design and product development services
2001 Obtained the Philippine Quality Award level III for mastery in quality
management
2005 Established global footprint through acquisition of the EMS assets of Saturn
Electronics and Engineering Inc. and then Speedy-Tech Electronics Ltd.
2006 Made it to list of the top 50 EMS providers of Manufacturing Market Insider
2007 Received Circuits Assembly’s Service Excellence Award for Highest Overall
Customer Ranking
2010 Listed by way of introduction on the Philippine Stock Exchange, opened 6th
manufacturing facility in China, established IMI Energy Solutions, and acquired power
semiconductor company PSi Technologies, Inc.
2011 Acquired EPIQ subsidiaries in Bulgaria, the Czech Republic, and Mexico
5
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6. IMI Complete Solutions
OEMs:
Brand
Marketing
Design and Support and
Engineering Manufacturing
Fulfillment
OEMs:
Technology
R&D
• From PCB and FPCB Assembly • Materials Sourcing
• Design and Engineering Services to Complete Box Build and Logistics
• Low-Volume, High-Mix Solutions
• Advanced Manufacturing Manufacturing
Engineering • Product Reliability
• High-Volume Manufacturing and Failure Analysis
• Test and Systems • Power Semiconductor Assembly
Development and Test Solutions • Product Repair Services
• Flexible Business Set-ups
• New Product Introduction
• Plastic Injection
Services
6
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
7. Power Semiconductor Assembly and
Test Services
OEMs:
Brand
Marketing
Design and
Engineering Manufacturing Support and
OEMs:
Technology Fulfillment
R&D
• Design Services • Die Inspect Services • Materials Sourcing and
• Virtual Prototyping – • From Wafer Saw to Front- Logistics Solutions
Thermo-mechanical and of -Line to End-of -Line • Product Reliability and
Electrical Simulation Assembly Services Failure Analysis
• Prototype Builds • Testing Services
• Material Development • Caters to Power
and Qualification Semiconductor Packages
• Test Development (Metal Can/Hermetics,
• New Product TO Packages, PQFN and
Introduction Services Power Modules)
• High Volume Manufacturing
7
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8. Reputation
24th in Manufacturing Market
Insider’s list of Top 50 EMS
companies in 2011
Preferred supplier of a
number of global OEMs,
including Assa Abloy and
Bosch
Gold Awardee for Corporate
Governance from the
Institute of Corporate
Directors in the Philippines in
2011
8
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9. Quality Systems
Total Quality Management
Continuous Improvement and
innovation
International Standard Certifications include
Quality of Supply Chain and
ISO 9001:2008 Quality Management System
Supplier Partnerships
Environmental Management
ISO 14001:2004
System
Six Sigma and LEAN
ISO/TS Quality Management System for
Manufacturing Systems 16949:2009 Automotive Applications
ISO 13485:2003 Quality Management System for
Medical Devices
QC080000 Hazardous Substance Free
Process Management System
ISO/IEC Quality Management System for
17025:2005 Testing and Calibration Laboratories
9
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10. IMI Revenues
In Million US$
600.0
500.0
400.0
300.0
200.0
100.0
0.0
2005 2006 2007 2008 2009 2010 2011
IMI Group 182.1 395.0 422.1 441.1 395.5 412.3 575.5
10
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11. Revenues by Customer Nationality
2011 Sales: US$575.5 Million
Rest of
Asia, 13%
Japan, 13%
EMEA*, 50%
North
America, 24%
* EMEA – Europe, Middle East and Africa
11
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12. Revenues by Market Segment
2011 Sales: US$575.5 Million
Medical, 4%
Computing, 6%
Consumer, 20%
Multiple Markets,
15%
Telecom, 19%
Automotive, 18%
Industrial, 18%
12
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13. Global Footprint
Shenzhen Shenzhen Shenzhen
(Liantang) (Kuichong) (Fu Yong) Jiaxing Chongqing Chengdu
Třemošná
Czech Republic Shenzhen 3x
Jiaxing
Chongqing
Chengdu
Botevgrad . Fremont, California
Bulgaria Japan
. . USA
China .
. Laguna 3x
. .
. Taguig .
Cavite
.
Tustin, California Guadalajara, Mexico
Philippines
Singapore
.
Laguna Site 3x
Singapore
Taguig
Cavite
Manufacturing
Total manufacturing space of about 245,000 sq.m. in 17 sites
Over 14,000 employees worldwide (as of March 2012) Engineering
13
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14. Sales Offices
Europe
USA
Japan
.
China
. Philippines
.
Sales Contacts
Philippines
Singapore .
China: Shenzhen,
Jiaxing, Chengdu,
Singapore
Nagoya, Japan
Germany
France
Bulgaria
Czech Republic
Tustin, CA USA
Fremont, CA USA
Toronto, Canada
Guadalajara, Mexico
14
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15. FLEXIBLE SOLUTIONS
15
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16. APQP Process*
Product Development Cycle
NPI
Program Management: CFT
Ph. 1 – Ph. 2 – Ph. 3 – Ph. 4 – Ph. 5 –
Requirements Product Design Process Design Product & Mass
Ph. 0 – RFQ Definition & & Development & Development Process Production
Process Planning Validation
Process Owner: Process Owner: Process Owner:
Process Owner: Process Owner: Process Owner:
CFT Program CFT Program Design & Advance Manufacturing Production
Manager Manager Development/ Manufacturing
Engineer, Manager
Test & System Engineering
Project
Development Project Manager
/Value Manager
Engineering
Project Manager
* Advance Product Quality Planning
16
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17. Supplier Quality Engineering
23 SQE teams in three continents
SQE specialization in PCB, Passives, E-
Mechanical
ZDAP (Zero Defect Action Plan) for strategic
suppliers
Global audit plan with process audits in
different sites
Supplier development plan implementation
and monitoring
Standardization and centralization of supplier
evaluation
Supplier management controlled by AVL
Quality contracts and targets with suppliers
17
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18. EMS Design & Engineering Solutions
Contract Design and Joint
Development Solutions in
Power Electronics
Embedded Systems
Camera and Imaging Systems
Lighting Systems
Power Semiconductors
Short-Range Wireless
Design Services
Hardware & Software Development
Mechanical Design
Printed Circuit Board Layout
Design for Manufacturability, Reliability,
and Testability
Simultaneous Engineering
Value Engineering
Prototyping and Pre-Certification Testing
Design of Plastic Enclosures
18
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
19. Power Design & Engineering Solutions
Contract Design and Joint
Development Solutions in
Power Modules
Power QFN
Power Components
Power Design Services
Mechanical Design
Design for Manufacturability,
Reliability, and Testability
Simultaneous Engineering
Value Engineering
Virtual Protoyping
High Power Prototyping and Pre-Certification
Module Testing
13
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
20. EMS Advanced Manufacturing Engineering
Advanced Manufacturing Technology
Direct Chip Attach (COB, Flip Chip, and
Chip on Silicon)
Multi-Chip Module (MCM) and
Microsystem
Thermally Enhanced Direct Chip Attach
Advance Surface Metallurgies
Pre-flow Underfill Process (IMI Patent)
Traceless Flip Chip Technology ( IMI
Patent)
Substrate and Interconnect Technology
Small Precision Assembly
Traceability
Conformal Coating & Casting
equipment (selective & potting)
20
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21. Power Advanced Manufacturing
Advanced Manufacturing Technology
LED package
Low Rdson Cu-Clip solutions
Multi-Chip Module (MCM) and (SiP)
Thermally Enhanced Dual Cool
Technology
P-QFN package Advanced Die attach (Sintering)
LED packaging (IMI Patent)
Ceramic Isolated TO packages
Cu and Al-Ribbon bonding
High Temperature Packages
SiC/GaN technology
P-Comp
Hermetic package
14
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
22. EMS Manufacturing Solutions
PCB & FPCB Assembly Smallest Component Size
With 144 SMT Lines as of Mar 2012
0402
Chip
Flexible PCBA 01005 ready
Aluminum PCBA QFP Lead Pitch
0.40
0.30 mm ready
Ceramic PCBA
Connector Lead Pitch 0.40 mm
Flip Chip On Flex
Chip-On-Board BGA/CSP Bump Pitch 0.50 mm
Chip-On-flex
BGA/CSP Bump Diameter 0.30 mm
Chip-On-Glass
Chip-Scale Packaging Flip Chip Bump Pitch 0.16 mm
Hybrid Module PCBA
Flip Chip Bump Diameter 0.07 mm
PCBA with Multiple BGA SMT
Selective and Robotic Soldering Largest Component
QFP/SOP 45 x 45 mm
Complete Box Build
Connectors 90 x 100 mm
Cleanroom Operations
BGA Package Size 54 x 54 mm
22
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23. Power Manufacturing Solutions
Lead-frame and DBC Assembly
High Volume Core Processes
30mio device/week capacity
4mil min
TO220 2/3/5/7 leads Wafer Sawing
01005 ready
TO247 2/3 leads Lead and lead
Solder Die attach
free
T0252 2/3 leads
TO264 2/3leads Reflow (standard & Vacuum) void free soldering
TO257/58 Hermetics Cu-Clip power connection Low Rdson
SOT227
Au and Al bonding wire and ribbon
P-QFN 3x3, 3.3x3.3, 5x6
P-QFN system in package (SiP) Transfer molding Green
SSPM IGBT Modules
Saw singulation , Trim & Form flexible POD
Hybrid TO packages
Full-pack TO packages Advanced Processes
Cu Bonding up to 3mil wire
Complete Box Build high rel die
Sintering
attach
Customized packages on
Rapid Prototyping RnD line
request
15
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24. Injection Molding Capabilities
State-of-the-art injection
Molding and drying machines
Horizontal injection press
Vertical bi-injection press
Injects most of the
engineering resins : PA, PBT,
POM, PET, PC, PP
High precision thin wall focus
mineral and glass fiber filled
material injection capability
24
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
25. Plastic Injection Capabilities
From 50 to 850 tons
Injection, Over-molded, and
Optical Plastics Parts
Decorating, Painting, and Laser
Graving
Functional and Cosmetic
Tool Shop Services
Design and Manufacturing of
Molds
Partnerships for Inserts
25
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26. Test and Systems Development
Co-development of test specifications
concurrent to new product development
Design for testability and flexibility for
product revisions
Turnkey hardware design and
assembly
Parallel test solutions for high volume
manufacturing
Software development and upgrades
Test documentation
Training and 24x7 manufacturing
support
26
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
27. Reliability, Failure Analysis, and Calibration
Reliability Engineering
Accelerated testing to determine
product:
• Life Expectancy
• Warranty
• Reliability
Failure Analysis
Data analysis and identification of
failure cause as well as preventive
measures
Calibration Service
Offer services on the following:
• Thermometry
• Electrical equipment
• Metrology
27
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
28. MARKET SEGMENT
28
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29. Automotive Electronics
Key Capabilities
Electronics Manufacturing Services
(EMS) including
Experience • Automotive Camera Platform
• Sensors & Imaging Contract Design
• Automotive Camera
• Power Electronics
• PCBA for Electronic Stability Program (ESP) • COB Manufacturing
• Tire Pressure Sensor PCBA • Product Miniaturization
• Car Windshield Temperature and Humidity Sensor • DFM and DFT
• Electronic Power Steering (EPS) Rotor Position Sensor (RPS) • Test Equipment Development
• PCBA for Headlight • Rigid Printed Circuit Board Assembly
• Switch Controller for Main Light • Flex Printed Circuit Assembly
• Communication Power PCBA • Flip Chip Process
• Body Control Module (BCM) • Automatic Pin Insertion
• Antenna Receiver / DAB Tuner • Simultaneous Engineering
• Powertrain Control Solutions
• ISO/TS 16949:2002 Certified Lines
• Semiconductors used in Electric Drive/ Hybrid Electric Vehicles
• Fuel Management
• Critical Part Monitoring (CPM)
• Pump Driver • Reject Profile Analysis (RPA)
• Steering Wheel Control Device • Parts Average Test (PAT)
• Cockpit Control Device • Statistical Bin Analysis
• Audio Processor • RoHS Compliant Lines
• Plastic Injection
29
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30. Industrial Electronics
Experience
• Automated Meter Reading (AMR)
• Security Device Key Capabilities
• Electronic Door Access System
• Smart Card Electronics Manufacturing Services
• Point Of Sales System
• Printer Control Board (EMS) including
• Power Amplifier • Low-Volume / High-Mix Manufacturing
• DC-DC Power Converter • Power Supply Design
• Engine Controllers • Sensor & Imaging Contract Design
• Welding Machine Inverter • Mechanical Enclosure Design
• Motor Drivers for Conveyor • DFM and DFT
• Fan Motor Control Board • Test Equipment Development
• Computer Numerical Control (CNC) Control Board • Rigid Printed Circuit Board Assembly
• Main Power Supplies for LED Street Lighting • Automatic Pin Insertion
• Modules for Renewable Energy Generation, • COB (Au & Al Wires)
Transmission and Conversion • Complete Box Build
• Medium to High Power Discrete Packages
and Process
• Power Modules
• RoHS Compliant Lines
30
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31. Medical Electronics
Key Capabilities
Electronics Manufacturing Services
(EMS) including
• Low-Volume / High-Mix Manufacturing
• Product Design Co-development
• DFM and DFT
Experience • Product Miniaturization
• Rigid Printed Circuit Board Assembly
• Flex Printed Circuit Assembly
• Flat Panel Imaging Equipment • Flip Chip On Flex Assembly
• Auto Body Contouring Imaging Equipment • COB including Die Attach of Imager Die
• Dental Imaging System • ISO 13485:2003 Certified Lines
• Defibrillator Component
• Concealed Hearing Aid
• Biomedical and Laboratory Equipment
• Centrifuge Control Board
• Fitness Equipment Control Board
31
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32. Communications Electronics
Key Capabilities
Flexible Electronics Manufacturing
Services (EMS) including
• Design for Manufacturability
• Product Miniaturization
• Pre-certification Testing
• Test Equipment Development
Experience • Rigid Printed Circuit Board Assembly
• COB with Die Attach of Imager Die & Al Wires
• Complete Box Build
• Back Panel for Telecommunication Board • Repair Services
• Fiber to the “X” (FFTx) systems • RoHS Compliant Lines
• Booster Amplifier • Power QFN
TM
• GPON (Gigabit Passive Optical Network) Systems • Powermite
• Wireless Security System • Power Management (IC) Discrete Packaging,
• Base Station Power Supply e.g., 5-7L TO-220, TO-263, TO-252, and
TM
• Digital Station Control Board Powerflex
• Power Transistors for amplifiers in cellular base stations
• Power Conversion ICs in adapters and chargers for cell
phones and cordless phones
• DC Port and USB Port Protection for cell phones and satellite
radio peripherals
32
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33. Computing and Storage Devices
Experience
• CD/Combo Drive
• DVD Drive
• Blu-Ray Disc Drive
• Hard Disk Drive
• Solid State Drives
• Printer Sensor
Key Capabilities
• Printer Control Board Flexible Electronics Manufacturing
• Multi-Function Copier Machine Services (EMS) including
• DVD Recorder Power Supply
• Power Supplies for Servers, PCs, • Product Miniaturization
• Test Equipment Development
Notebooks, and Netbooks
• Rigid Printed Circuit Board Assembly
• Over-voltage Protection for HDD and DC • Flex Printed Circuit Assembly
Port Protection for Keyboard Mouse • Flip Chip Process
• Mechanical and Optical Precision Assembly
• Complete Box Build
• RoHS Compliant Lines
• Power QFN
• PowermiteTM
• Power Management (IC) discrete packaging, e.g.,
5-7L TO-220, TO-263, TO-252, and PowerflexTM
33
Strictly Confidential. All rights reserved by Integrated Micro-Electronics, Inc. (IMI) -- including any disposal, exploitation, reproduction, editing, distribution, as well as in the event of applications for industrial property rights. July 2011
34. Consumer Electronics
Experience
• Ultrasonic Toothbrush
• Hybrid IC
• Gas Ignitor and Re-Ignitor Key Capabilities
• Air-Conditioning (HVAC) Controller
• Projector Lamp Drivers Flexible Electronics Manufacturing
• Refrigerator and Cooker Hood Control Board
• Power Management & Home Appliance for Lighting Control
Services (EMS) including
• Household Metering Device • Cost-Effective High-Volume Manufacturing
• Bluetooth Headset • Firmware Development
• Electric Drive Control for Home Appliances • Mechanical Enclosure Design
• Main Power Supply for Flat-panel TV • Low Profile Switch Mode Power Supplies
• Power Supply for Game Consoles and Entertainment Electronics • Pre-certification Testing
• High Voltage Power Conversion ICs in Adapters and Chargers for • Test Equipment Development
Personal Electronics • Flip Chip Process
• Garage Door Control • Automatic Pin Insertion
• Programmable Timer • Complete Box Build Assembly
• Pressure Cooker Modules • Low to High Power Outline Packages
• Steamer Controller Modules • Small to Large Outline Packages
• Washing Machine controllers • Specialized Interconnect Process for Product
• Coffee Machine Power Requirements
• Plastic Injection
34
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35. Renewable Energy
Key Capabilities
Electronics Manufacturing Services (EMS)
including
• PV Module or Panel Design/Co-Development
• Materials Qualification
• Process Development
• Prototyping
• Panel Testing and Certification (with RETC) Low-
Volume Manufacturing of Engineering or
Experience Marketing Samples
• 2.3 MW Low Volume Capacity (in Fremont,
• PV Panel Assembly
CA , USA)
• PV Co-Design & Development
• PV Panel High Volume Mfg. • 30-60MW High Volume Capacity (in Jiaxing,
• PV Panel Platform China)
• PV Inverter Platform • Development of Solar Inverters (in Singapore)
• Inverter Electronics
35
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36. IMI SITES OVERVIEWS
36
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37. IMI Bulgaria – Botevgrad Overview
Site Details | Botevgrad
Date Founded 1998
Footprint 23,778 sq.m. (about 255, 944 sq.ft.)
Headcount 1,183 employees
Markets Served Automotive, Industrial, Consumer Electronics
Site Capabilities PCBA: SMT, COB/COF/ IC Encapsulation, Pin
Through Hole, Automatic Pin Insertion, Wave
Map: Soldering, Selective Soldering System, BGA, X-ray,
Nitrogen Equipment, Protective Coating, ICT/ FCT
Test, Thermopaste Dispensing, AOI,
Plastic Injection, Embedded Toolshop, Overmoulding,
Botevgrad
Box build: Mechanical Design and Assembly,
Experience Wiper Systems, Steering Wheel Controls, Cockpit
Control Devices, Dashboard Elements; Truck Opening
Site: Botevgrad, Bulgaria Systems, Security Devices, ECU Modules, Sensors
for Cars, Steering Sensors, Control Unit Panels, Audio
Location: 60km from Sofia International Airport
Processors; Power Management, Remote Control,
45 min by car
Fuel Management, RF Modules, Lighting Control
Address: Integrated Micro-Electronics Bulgaria Devices, Programmable Timers, Pressure Cooker
Industrial Zone "Microelektronika" P.O. 66 Modules, Steamer Controller Modules, Washing
2140 Botevgrad, Municipality of Botevgrad Machine Controllers, Coffee Machines
Sofia District, Bulgaria
Contact
Numbers: Tel: +359.72.36.83.00 Certifications ISO/ TS 16949, ISO 9001, ISO 14001
Fax: +359.72.36.82.46
37
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38. IMI China - Shenzhen (Liantang) Overview
Site Details | Shenzhen (Liantang)
Date Founded 1988
Footprint 18,600 sq. m. (about 200,208 sq. ft)
Headcount 1,637 employees
Map: Markets Communication, Backplane
Served Wireless Metering & Wireless Security
System
Site Turnkey & Consignment, HMLV &
Fuyong
Kuichong Capabilities LMHV, SMT & PTH lines, BGA &
Liantang
COB, X-ray, AOI, ICT, Functional
Testing, Test Development: H/W &
S/W PCBA Assembly & Full System
Box Build, New Product Introduction
Site: China, Shenzhen (Liantang) (NPI) Center; Central Warehouse,
Logistics Services, D&D Center
Location: 55km from Hong Kong International Airport;
around 75min by car Experience Back Panel for Telecommunication
Board, Fiber Optic Product, POA
Address: Shenzhen Speedy-Tech Electronics Co., Ltd. Product, Wireless Security System,
Speedy-Tech Industrial Building, RF Metering
Area 7 of Liantang Industrial Zone,
Luo Hu, Shenzhen P.R.C. 518004 Certifications ISO9001:2000, ISO14001:1996,
TL9000
Contact
Numbers: Tel: +86.25708382
Fax: +86.25708019
38
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