HDL stands for hardware description language. It is a textual language used to formally describe and design electronic circuits and digital logic. HDL allows for automated analysis, simulation, and testing of electronic circuits before they are physically implemented. Common HDLs include VHDL and Verilog. HDL is used to write executable specifications for hardware and model circuits before physical creation, enabling simulation and synthesis into programmable logic devices like FPGAs.

1. What is HDL??
 HDL is any language from a class of:
 Computer languages
 Specification languages
 Modeling languages
 It is a textual description consisting of expressions, statements and control
structures of:
 the spatial and temporal structure and behavior of electronic systems
 formal description and design of an electronic circuit and digital logic
 allows for the automated analysis, simulation, and simulated testing of an
electronic circuit.

2. Group
Members:

3. What is HDL??
 HDL is any language from a class of:
 Computer languages
 Specification languages
 Modeling languages
 It is a textual description consisting of expressions, statements and control
structures of:
 the spatial and temporal structure and behavior of electronic systems
 formal description and design of an electronic circuit and digital logic
 allows for the automated analysis, simulation, and simulated testing of an
electronic circuit.

5. Simulation: First it is used to write a model for the
expected behavior of the circuit before that circuit is
designed and built. The model is fed into a computer program
called a simulator which allows the designer to verify that the
solution behaves correctly. This process is known as Hardware
Simulation.
Synthesis: Second, it is used to write a detailed description
of a circuit that is input into another computer program called a
logic compiler. The output of the compiler is used to configure a
programmable logic device such as an FPGA to perform the
hardware function. This process is known as Hardware
Synthesis.

6. Uses of HDL:
 to write executable specifications for hardware.
 to model a piece of hardware before it is created
physically.
 It is this executability that gives HDLs the illusion of
being programming languages.
 they are more precisely classified as specification
languages or modeling languages.
 Simulators capable of supporting discrete-event
(digital) and continuous-time (analog) modeling exist,
and HDLs targeted for each are available.

7. Different levels of
Abstraction:
 Architecture / Algorithm Level
Describe the functionality (behavior)
of a circuit
 Register Transfer Logic (RTL) Level
Describe the data flow of a circuit
 Gate Level
Describe the connectivity (structure)
of a circuit
 Switch Level

8. Design Flow of using HDL:

9. Why use the HDL ?
 Difficult to design directly on hardware
 Mixed-level modeling and simulation
 Easier to explore different design options
 Reduce design time and cost
 These days, it would be impossible to design a
complex system on a chip for a mobile device or any
other consumer electronics product without an HDL.

10. Types of
HDLs:
There are three types of HDLs
 VHDL
 VERILOG
 SYSTEM VERILOG
VHDL and Verilog are considered general-purpose digital design
languages, while SystemVerilog represents an enhanced version of
Verilog. Each has its own style and characteristics. VHDL has roots in
the Ada programming language in both concept and syntax, while
Verilog’s roots can be tracked back to an early HDL called Hilo and the C
programming language.
System Verilog includes a set of extensions to the Verilog HDL to help
engineers design and verify larger and more complex designs.

11. Verilog
 Verilog Similar to
C.
 Popular in
commercial, on
coasts of US.
 Designs contained in
“modules.
VHDL
 Similar to Ada.
 Popular in Military,
Midwest US.
 Designs contained in
“entity”
“architecture” pairs.

12. C programming:
 General-purpose programming language
 C program can be compiles for a very wide variety
of commuter platforms and operating system
 This language has become available to wide range
of platforms and operating systems from
embedded computers to supercomputers.

13. Difference b/w CPL &
HDL
CPL
• C is a middle level
language
A mix of high level
language and an assembly
language.
• C can only handle
sequential instructions.
• C program can
successfully written with
pure logical and
algorithmic thinking
HDL
• HDL is a hardware description
language
It is uses for implementing the
hardware circuit
• VHDL also allows both
sequential and concurrent
executions
• VHDL programmer needs
thorough working knowledge of
the hardware circuits. He
should be able to predict how a
given code will be implemented
in hardware.

14. CPL
We don’t care about
resource usage in C.
Because C program runs
on a computer which uses
powerful processor with
high speed.
HDL
The memory and other
logic elements are limited
in a FPGA. It is very
difficult to implement
image processing
algorithms in VHDL than
in C.

15. Advantages of HDL:
Advantages compared to traditional schematic-
based design
• Design with RTL description + logic synthesis
tool
o Abstract level
o Independent to fabrication technology
o Reuse when fabrication technology changing
• Functional verification can be done early
o Optimized to meet the desired
functionality
• Analogous to computer programming
o Textual description with comments

16. Conclusion:
 Software programming languages and HDL are
very different languages.
 Because both have many basic level differences
even if they seem to have few similarities.
 In contrast to most software programming
languages like C, HDLS includes n explicit notion
of time which is the primary attribute of
hardware.