SlideShare a Scribd company logo
Page 1
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 1© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 1
Buck Converter
Design Example
Welcome to the Buck Converter Design Example Web seminar.
The following slides will show a process to calculate the component values
needed for a Buck converter.
Page 2
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 2© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 2
Session Agenda
G Calculate the required inductor
G Calculate the output capacitor
requirements
G Select the input capacitor
G Select the diode
G Choose the MOSFET
G Calculate the converter Efficiency
G Examine a Synchronous Buck Converter
This is the agenda for this course.
For a Buck DC-DC converter we will calculate the required inductor and
output capacitor specifications.
We will then determine the input capacitor, diode, and MOSFET
characteristics.
With the selected components, we will calculate the system efficiency and
then compare this asynchronous design to a synchronous buck converter.
Page 3
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 3© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 3
Buck Converter Design
Example Assumptions
Assume:
Vin = 12 V
VOUT = 5 volts
ILOAD = 2 amps
Fsw = 400 KHz
D = Vin / Vout = 5V /12V = 0.416
Define Ripple current:
Iripple = 0.3 •••••••• ILOAD (typically 30%)
This example converts a 12 volt power source to an output of 5 volts and 2
amps load.
The switching frequency is selected at 400 KHz.
The current ripple will be limited to 30% of maximum load.
Page 4
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 4© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 4
Buck Converter Design
Example
+Vin
L1
Vout
CoutCin
Q1
ILOAD + Iripple
ILOAD
PWM
Iripple
IrippleD1
Here is the schematic of the buck converter for which we will select
component values.
In this example either a P-channel or an N-channel MOSFET may be used.
The choice will be based on cost and complexity issues.
Page 5
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 5© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 5
Buck Converter:
Calculate Inductance
For an Inductor: V = L •••••••• ∆I / ∆T
Rearrange and substitute:
L = (Vin – Vout) •••• (D / Fsw ) / Iripple
Calculate:
L = 7 V •••••••• (0.416 / 400 kHz ) / 0.6A
L == 12.12 uh
Starting with the basic equation for current flow through an inductor:
V = L di/dt
We rearrange the terms to calculate “L” so :
L = V dt/di
For the design example, the calculated inductor value is 12 uh.
From a catalog, a 12 uH, 3 amp inductor has a resistance of 0.037 ohm and
costs about 85¢.
The power dissipated due to copper losses is:
(Iload)2
•••••••• ESR = 0.15 watt
Note: The vendor information on core loss characteristics are often
difficult to find.
Page 6
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 6© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 6
Buck Converter Calculate
Output Capacitance
For a capacitor:
∆V = ∆I •••••••• (ESR ++ ∆T / C + ESL / ∆T)
Define Ripple voltage: 50 mv
Given:
∆I = 0.6 amp
ESR = 0.03 ohm
ESL = 0
∆T =.416 / 400 kHz = 1.04 usec
The voltage ripple across the output capacitor is the sum of ripple voltages
due to the Effective Series resistance (ESR), the voltage sag due to the load
current that must be supplied by the capacitor as the inductor is discharged,
and the voltage ripple due to the capacitor’s Effect Series Inductance”.
The ESL specification is usually not specified by the capacitor vendor. For
this example, we will assume that the ESL value is zero. As switching
frequencies increase, the ESL specification will become more important.
The equation shown here shows that we are solving an equation with
multiple unknowns, ESR, C, and ESL.
A reasonable approach is to remove terms that are not significant, and then
make a reasonable estimate of the most important parameter that you can
control, ESR.
The capacitor ESR value was selected from a vendor’s catalog of smps
rated capacitors. Given the ripple current and the target output voltage
ripple, an ESR value of 0.030 ohm was selected from a list of capacitors
rated for 0.6 amp ripple current.
Page 7
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 7© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 7
Buck Converter
Select Output Capacitor
Simplify (assume ESL = 0):
∆V = ∆I •••••••• (ESR ++ ∆T / C)
Rearrange:
C = (∆I •••••••• ∆T) / (∆V - (∆I •••••••• ESR))
Calculate:
Cout = (0.6A •••••••• 1.04 usec) / (0.05V- (0.6A •••••••• 0.03))
Cout = 19.5 uF (minimum)
Now, we will calculate the required capacitance of the output capacitor given
the desired output voltage ripple is defined as 50 millivolts.
The term in the equation’s denominator (∆V - (∆I •••••••• ESR)) shows that the
capacitor’s ESR rating is more important than the capacitance value. If the
selected ESR is too large, the voltage due to the ripple current will equal or
exceed the target output voltage ripple. We will have a divide by zero issue,
indicating that an infinite output capacitance is required.
If a reasonable ESR is selected, then the actual capacitance value is
reasonable.
An electrolytic capacitor with the require ESR has a capacitance of 1,200 uf
which easily meets the minimum requirements and costs 12¢.
There are specialty polymer electrolytic capacitors with 47 uf, and an ESR of
0.025 ohm that are much smaller, but cost about $1.00.
The estimated power dissipation in the output capacitor is:
(Iripple)2
•••••••• ESR = 0.01 watt
Page 8
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 8© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 8
Output Capacitor
Parasitic
G The ESR dominates voltage ripple and
the output capacitor selection.
G The ESL is rarely specified by
manufacturers. Becomes significant at
high frequencies.
G When ESR requirement is met, the
capacitor’s capacitance is usually
adequate.
Estimate the maximum ESR your application can tolerate due to output
voltage ripple requirements.
Make sure the capacitor is rated for the ripple current.
If operating at high switching frequencies (>1 MHz) contact the manufacturer
to determine the ESL specifications for the capacitors you are considering to
use. When considering ESL, also include the ESL of the PCB traces that
interconnect the capacitor with the other components.
Rarely is the capacitor’s capacitance value an issue when operating at
moderate frequencies. (> 100 KHz).
Exotic capacitors such as specialty electrolytics, large ceramics, or film
capacitors are useful is space limited applications.
These advanced capacitors feature extremely low ESR for their small size,
BUT, their small size implies a very limited capacitance. The limited
capacitance of advanced capacitors may create issues with system stability
and voltage “droop”..
Page 9
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 9© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 9
Buck Converter
Select Input Capacitor
G Estimate Input Ripple Current:
IIRIPPLERIPPLE ≈ ILOAD / 2 = 1 amp
G Define acceptable input ripple voltage: 200 mv
G Select a Capacitor ESR value: 0.12 ohm
G Compute Capacitance:
C = ∆T / (/ ( (Vripple / IIripple)) -- ESR) = 13 uf
G Consult catalog:
16V 470 uf electrolytic capacitor meets ESR
and Capacitance requirements.
The worst case ripple current occurs when the duty cycle is 50% and the
worst case ripple current on the input of a buck converter is about one half of
the load current.
Like the output capacitor, the input capacitor selection is primarily dictated by
the ESR requirement needed to meet voltage ripple requirements. Usually,
the input voltage ripple requirement is not as stringent as the output voltage
ripple requirement. In this example, the maximum input voltage ripple was
defined as 200 millivolts.
The input ripple current rating for the input capacitors may be the most
important criteria for selecting the input capacitors. Often the input ripple
current will exceed the output ripple current.
From a catalog, a 16V, 470 uf electrolytic capacitor meets the ESR and
ripple current requirements for 8¢.
The estimated power dissipation in the input capacitor is:
(Iripple)2
•••••••• ESR = 0.12 watt
Page 10
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 10© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 10
Buck Converter
Diode Selection
G Estimate Diode Current:
ID = (1-D) •••••••• ILOAD
ID = (1.0- 0.416) •••••••• 2A = 1.17 A
Where D = Duty cycle
G Max Diode Reverse Voltage = 12V
G Select Schottky rectifier:
A 1N5820, 20V, 3 A Schottky meets requirements
G Power Dissipation: VF •••• ID = 0.47 w
The diode’s average current is equal to the load current times the portion of
time the diode is conducting.
The time the diode is on is: (1 – duty cycle)
The maximum reverse voltage on the diode is Vin which is 12 volts in this
example.
The current and voltage ratings are low enough that a small schottky diode
can be used for this application.
By using a schottky diode, switching losses are negligible.
The forward voltage drop for the selected diode is about 0.4 volts at the peak
current of 2.0 amps.
The estimated diode power dissipation is 0.47 watts.
Page 11
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 11© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 11
Assume: 12V input, 2 amp load, D = 0.416,
Trise = Tfall = 55 ns, Fsw = 400 KHz
Select P-Channel MOSFET for ease of driving gate.
Select -30V, -9.3 amp MOSFET for low Rds (0.02 ohm)
cost = $0.72
Pconduction = (ID)2 • Rds(hot) • D = 22 • 0.02 • 0.416 = 0.033 watt
Pswitching = (V • ID / 2) • (Ton + Toff) • Fsw + (Coss • V2 • Fsw)
Pswitching = ((7 • 2/2) • 100 nsec • 400 kHz) + (890pf • 72 • 400 kHz)
Pswitching = 0.28 watt + 0.017 watt = 0.297 watt
Ptotal = 0.3 watt
Buck Converter
MOSFET Selection
To simplify the gate drive circuitry for the MOSFET, a P-channel device was
selected. An N-channel device would require a gate drive circuit that
incorporates a method to drive the gate voltage about the source. The cost
of a level translator and charge pump will outweigh the savings of using an
N-channel device versus a P-channel device.
A 20 volt MOSFET was not selected because the available devices in the
catalog had maximum gate to source voltage ratings of only 12 volts. With a
12 volt input voltage, the applied gate volts might exceed the device
specifications. If a 20 volt MOSFET was used, it would be good design
practice to incorporate a voltage clamp in the gate driver circuit.
A 30 volt device was selected on the basis of the 20 volt gate to source
specification.
The device current rating is more than necessary, but the low Rds(on)
specification minimizes temperature rise. Most small surface mount
packages have thermal resistances of about 50 degrees Celsius per watt.
With a calculated power dissipation of 0.3 watt, the MOSFET should
experience a temperature rise of only 15 degrees C.
Page 12
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 12© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 12
Output Power : 10 watts (5V @ 2 amps)
Input capacitor loss: 0.12 w
MOSFET Loss: 0.3 w
Diode Loss: 0.47 w
Inductor Loss: 0.15 w
Output Capacitor Loss: 0.01 w
Total losses: 1.05 watts
Efficiency = 10w / (10w + 1.05w) = 90.5%
Buck Converter
Efficiency
This Buck converter design example has a calculated efficiency of 90.5%.
The diode losses represent almost one half of the total losses !
If the diode’s forward voltage drop could be lowered, the converter’s
efficiency could be raised.
This buck converter design example is called an Asynchronous Buck
converter because the diode commutation (switching) is independent of the
MOSFET switching.
Page 13
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 13© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 13
Synchronous Buck
Converter Design Example
+Vin
L1
Vout
CoutCin
Q1
ILOAD + Iripple
ILOAD
PWMH Iripple
Q2
PWML
PWM1H
PWM1L
Period
This slide shows a Synchronous Buck converter. It is similar to the previous
asynchronous buck converter except the diode is paralleled with another
transistor. It is called a synchronous buck converter because transistor Q2
is switched on and off synchronously with the operation of the primary switch
Q1.
The idea of a synchronous buck converter is to use a MOSFET as a rectifier
that has very low forward voltage drop as compared to a standard rectifier.
By lowering the diode’s voltage drop, the overall efficiency for the buck
converter can be improved.
The synchronous rectifier (MOSFET Q2) requires a second pwm signal that
is the complement of the primary PWM signal. Q2 is on when Q1 is off and
vice a versa. This pwm format is called Complementary PWM.
Page 14
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 14© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 14
Select N-channel MOSFET with RDS(on) = 0.0044 ohm
Pconduction = (ID)2 • Rds(hot) • (1 - D)
= 22 • 0.0044 • (1- 0.416) = 0.01 w
MOSFET Rectifier 0.01 w
Input capacitor loss: 0.12 w
MOSFET Loss: 0.30 w
Inductor Loss: 0.15 w
Output Capacitor Loss: 0.01 w
Total losses: 0.59 watts
Efficiency = 10w / (10w + 0.59w) = 94.4%
Synchronous Buck
Converter Efficiency
The MOSFET Q2 is clamped by a Schottky rectifier. The schottky rectifier
prevents the MOSFET’s intrinsic body diode from conducting which prevents
the body diode from developing a stored charge. The body diode in a
MOSFET is a slow rectifier and would add significant losses if it were
allowed to switch.
Because the MOSFET rectifier (synchronous rectifier) switches with less
than a volt across itself, the switching losses are almost zero.
The MOSFET conduction losses are very low compared to the schottky
rectifier's forward voltage drop.
The cost of the MOSFET chosen as the synchronous rectifier is about 11¢.
Synchronous Rectification can increase a power converter’s efficiency
significantly and for minimal cost.
Page 15
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 15© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 15
Key Support Documents
Device Selection Reference Document #
General Purpose and Sensor Family Data Sheet DS70083
Motor Control and Power Conv. Data Sheet DS70082
dsPIC30F Family Overview DS70043
Base Design Reference Document #
dsPIC30F Family Reference Manual DS70046
dsPIC30F Programmer’s Reference Manual DS70030
MPLAB® C30 C Compiler User’s Guide DS51284
MPLAB ASM30, MPLAB LINK30 & Utilities User’s
Guide DS51317
dsPIC® Language Tools Libraries DS51456
For more information, here are references to some important documents that
contain a lot of information about the dsPIC30F family of devices.
The Family Reference Manual contains detailed information about the
architecture and peripherals, whereas the Programmer’s Reference Manual
contains a thorough description of the instruction set.
Page 16
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 16© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 16
Key Support Documents
Microchip Web Sites: www.microchip.com/smps
www.microchip.com/16-bit
For device data sheets, Family Reference Manuals, and other related
documents please visit the following Microchip websites.
Page 17
© 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 17© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 17
Thank You
Note: The Microchip name and logo, dsPIC, MPLAB and PIC are registered trademarks of Microchip Technology
Inc. in the U.S.A. and other countries. dsPICDEM, dsPICDEM.net, dsPICworks, MPASM, MPLIB, MPLINK and
PICtail are trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All other trademarks
mentioned herein are property of their respective companies.
Thank you for attending this Webinar

More Related Content

What's hot

2 op-amp concepts
2 op-amp concepts2 op-amp concepts
2 op-amp concepts
MaYaNkShArMa846
 
Op amp
Op ampOp amp
Electronic Devices and Circuits Manual
Electronic Devices and Circuits ManualElectronic Devices and Circuits Manual
Electronic Devices and Circuits Manual
Shashank Thawkar
 
Integrator OP Amp
Integrator OP AmpIntegrator OP Amp
Integrator OP Amp
Dr.Raja R
 
OP AMP
OP AMPOP AMP
OP AMP
sahed dewan
 
Operating Amplifier
Operating AmplifierOperating Amplifier
Operating Amplifier
BalajiK109
 
Applications of op amps
Applications of op ampsApplications of op amps
Applications of op amps
SARITHA REDDY
 
Operational amplifier
Operational amplifierOperational amplifier
Operational amplifier
Mussayyab Alam
 
op-amp
op-ampop-amp
Exp. no. 4 setb118 Analog electronics
Exp. no. 4  setb118  Analog electronicsExp. no. 4  setb118  Analog electronics
Exp. no. 4 setb118 Analog electronics
Omkar Rane
 
Operational amplifiers
Operational amplifiersOperational amplifiers
Operational amplifiers
Rahul Singh
 
Ch 14
Ch 14Ch 14
Esr capacitor-meter-project
Esr capacitor-meter-projectEsr capacitor-meter-project
Esr capacitor-meter-project
Andres Covarrubias
 
Op-Amp 1
Op-Amp 1Op-Amp 1
Battery Monitor Circuit Using Op-Amp
Battery  Monitor  Circuit Using   Op-AmpBattery  Monitor  Circuit Using   Op-Amp
Battery Monitor Circuit Using Op-Amp
sahed dewan
 
Unit-II Applications of Operational Amplifier
Unit-II Applications of Operational AmplifierUnit-II Applications of Operational Amplifier
Unit-II Applications of Operational Amplifier
Dr.Raja R
 
Applied electronics-outcome-3
Applied electronics-outcome-3Applied electronics-outcome-3
Applied electronics-outcome-3doovood
 
Lesson 8 op amps
Lesson 8 op ampsLesson 8 op amps
Lesson 8 op amps
Patel Jay
 

What's hot (20)

2 op-amp concepts
2 op-amp concepts2 op-amp concepts
2 op-amp concepts
 
Op amp
Op ampOp amp
Op amp
 
Electronic Devices and Circuits Manual
Electronic Devices and Circuits ManualElectronic Devices and Circuits Manual
Electronic Devices and Circuits Manual
 
Integrator OP Amp
Integrator OP AmpIntegrator OP Amp
Integrator OP Amp
 
OP AMP
OP AMPOP AMP
OP AMP
 
Operating Amplifier
Operating AmplifierOperating Amplifier
Operating Amplifier
 
Applications of op amps
Applications of op ampsApplications of op amps
Applications of op amps
 
Operational amplifier
Operational amplifierOperational amplifier
Operational amplifier
 
op-amp
op-ampop-amp
op-amp
 
Operation amplifier
Operation amplifierOperation amplifier
Operation amplifier
 
Exp. no. 4 setb118 Analog electronics
Exp. no. 4  setb118  Analog electronicsExp. no. 4  setb118  Analog electronics
Exp. no. 4 setb118 Analog electronics
 
Op amp
Op ampOp amp
Op amp
 
Operational amplifiers
Operational amplifiersOperational amplifiers
Operational amplifiers
 
Ch 14
Ch 14Ch 14
Ch 14
 
Esr capacitor-meter-project
Esr capacitor-meter-projectEsr capacitor-meter-project
Esr capacitor-meter-project
 
Op-Amp 1
Op-Amp 1Op-Amp 1
Op-Amp 1
 
Battery Monitor Circuit Using Op-Amp
Battery  Monitor  Circuit Using   Op-AmpBattery  Monitor  Circuit Using   Op-Amp
Battery Monitor Circuit Using Op-Amp
 
Unit-II Applications of Operational Amplifier
Unit-II Applications of Operational AmplifierUnit-II Applications of Operational Amplifier
Unit-II Applications of Operational Amplifier
 
Applied electronics-outcome-3
Applied electronics-outcome-3Applied electronics-outcome-3
Applied electronics-outcome-3
 
Lesson 8 op amps
Lesson 8 op ampsLesson 8 op amps
Lesson 8 op amps
 

Viewers also liked

Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...
Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...
Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...
jackkumaran
 
Aviso informativo
Aviso informativoAviso informativo
Aviso informativo
Remedios Antioquia
 
Muhammad adeel ahmad original
Muhammad adeel ahmad originalMuhammad adeel ahmad original
Muhammad adeel ahmad original
Muhammad Adeel Ahmad
 
AGU poster 2015 LD Final v2
AGU poster 2015 LD Final v2AGU poster 2015 LD Final v2
AGU poster 2015 LD Final v2Laura Dafov
 
Pokolorować świat
Pokolorować światPokolorować świat
Pokolorować świat
madelenePL
 
MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*
MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*
MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*
Mairen Batalla Rodríguez
 
Historia socieconomica de venezuela
Historia socieconomica de venezuelaHistoria socieconomica de venezuela
Historia socieconomica de venezuela
Universidad Yacambú
 
tercero a enero
 tercero a enero tercero a enero
tercero a enero
Alexandre Bárez
 
01 Ciclo de Manufactura
01 Ciclo de Manufactura01 Ciclo de Manufactura
01 Ciclo de Manufactura
Leo Bonilla
 
Types of-restaurants
Types of-restaurantsTypes of-restaurants
Types of-restaurants
Florentina RC
 
Takaful presentation by muhammad ashfaq
Takaful presentation by muhammad ashfaqTakaful presentation by muhammad ashfaq
Takaful presentation by muhammad ashfaq
asfhaq
 
Pasivo a largo plazo cap.19 eqpo.9
Pasivo a largo plazo cap.19 eqpo.9Pasivo a largo plazo cap.19 eqpo.9
Pasivo a largo plazo cap.19 eqpo.9
Alfredo Hernandez
 

Viewers also liked (15)

Sachu 7
Sachu 7Sachu 7
Sachu 7
 
Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...
Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...
Bus 475 guide 1 41) ABC International carefully watches the actions of its mo...
 
Aviso informativo
Aviso informativoAviso informativo
Aviso informativo
 
Muhammad adeel ahmad original
Muhammad adeel ahmad originalMuhammad adeel ahmad original
Muhammad adeel ahmad original
 
AGU poster 2015 LD Final v2
AGU poster 2015 LD Final v2AGU poster 2015 LD Final v2
AGU poster 2015 LD Final v2
 
Pokolorować świat
Pokolorować światPokolorować świat
Pokolorować świat
 
MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*
MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*
MEDIOS DE COMUNICACIÓN Y EDUCACIÓN *MAIREN*
 
vms logo pdf
vms logo pdfvms logo pdf
vms logo pdf
 
NIKHIL
NIKHILNIKHIL
NIKHIL
 
Historia socieconomica de venezuela
Historia socieconomica de venezuelaHistoria socieconomica de venezuela
Historia socieconomica de venezuela
 
tercero a enero
 tercero a enero tercero a enero
tercero a enero
 
01 Ciclo de Manufactura
01 Ciclo de Manufactura01 Ciclo de Manufactura
01 Ciclo de Manufactura
 
Types of-restaurants
Types of-restaurantsTypes of-restaurants
Types of-restaurants
 
Takaful presentation by muhammad ashfaq
Takaful presentation by muhammad ashfaqTakaful presentation by muhammad ashfaq
Takaful presentation by muhammad ashfaq
 
Pasivo a largo plazo cap.19 eqpo.9
Pasivo a largo plazo cap.19 eqpo.9Pasivo a largo plazo cap.19 eqpo.9
Pasivo a largo plazo cap.19 eqpo.9
 

Similar to En528032

Buck converter design
Buck converter designBuck converter design
Buck converter design
Võ Hồng Quý
 
Basic Electronic UNIT-IV PPT
Basic Electronic UNIT-IV PPTBasic Electronic UNIT-IV PPT
Basic Electronic UNIT-IV PPT
Praveen Kunda
 
Design of a Non-Ideal Buck Converter
Design of a Non-Ideal Buck ConverterDesign of a Non-Ideal Buck Converter
Design of a Non-Ideal Buck Converter
IRJET Journal
 
IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...
IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...
IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...
IRJET Journal
 
Project Report
Project ReportProject Report
Project Report
Engineering Garage V=ir
 
Common collector Amp on Pspice(project),ALL slide animated show
Common collector Amp on Pspice(project),ALL slide animated showCommon collector Amp on Pspice(project),ALL slide animated show
Common collector Amp on Pspice(project),ALL slide animated show
Ismail khan
 
Assignment 1 Description Marks out of Wtg() Due date .docx
Assignment 1  Description Marks out of Wtg() Due date .docxAssignment 1  Description Marks out of Wtg() Due date .docx
Assignment 1 Description Marks out of Wtg() Due date .docx
fredharris32
 
Pre Final Year project/ mini project for Electronics and communication engine...
Pre Final Year project/ mini project for Electronics and communication engine...Pre Final Year project/ mini project for Electronics and communication engine...
Pre Final Year project/ mini project for Electronics and communication engine...
Shirshendu Das
 
2011 ced capacitors
2011 ced capacitors2011 ced capacitors
2011 ced capacitors
Emmanuel Entzana Hérnandez
 
basic-analog-electronics
basic-analog-electronicsbasic-analog-electronics
basic-analog-electronics
ATTO RATHORE
 
Basics of bypass capacitor, its functions and applications
Basics of bypass capacitor, its functions and applicationsBasics of bypass capacitor, its functions and applications
Basics of bypass capacitor, its functions and applications
elprocus
 
Igbt gate driver power supply flyback converter
Igbt gate driver power supply flyback converterIgbt gate driver power supply flyback converter
Igbt gate driver power supply flyback converter
Kunwar Aditya
 
A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...
A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...
A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...
International Journal of Power Electronics and Drive Systems
 
basic electronics
 basic   electronics basic   electronics
basic electronics
ATTO RATHORE
 
MOSFETs: Single Stage IC Amplifier
MOSFETs: Single Stage IC AmplifierMOSFETs: Single Stage IC Amplifier
MOSFETs: Single Stage IC Amplifier
A B Shinde
 
Design and implementation of cyclo converter for high frequency applications
Design and implementation of cyclo converter for high frequency applicationsDesign and implementation of cyclo converter for high frequency applications
Design and implementation of cyclo converter for high frequency applications
cuashok07
 
Aec manual for III SEM ECE Students VTU
Aec manual for III SEM ECE Students VTUAec manual for III SEM ECE Students VTU
Aec manual for III SEM ECE Students VTU
Gopal Krishna Murthy C R
 
Class e power amplifiers for qrp2 qro
Class e power amplifiers for qrp2 qroClass e power amplifiers for qrp2 qro
Class e power amplifiers for qrp2 qroDavid Cripe
 
Simple 100 w inverter circuit
Simple 100 w inverter circuitSimple 100 w inverter circuit
Simple 100 w inverter circuit
Narasimha Reddy
 

Similar to En528032 (20)

Buck converter design
Buck converter designBuck converter design
Buck converter design
 
Basic Electronic UNIT-IV PPT
Basic Electronic UNIT-IV PPTBasic Electronic UNIT-IV PPT
Basic Electronic UNIT-IV PPT
 
Design of a Non-Ideal Buck Converter
Design of a Non-Ideal Buck ConverterDesign of a Non-Ideal Buck Converter
Design of a Non-Ideal Buck Converter
 
IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...
IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...
IRJET- Design and Analysis of Single Ended Primary Inductance Converter (SEPI...
 
Project Report
Project ReportProject Report
Project Report
 
Common collector Amp on Pspice(project),ALL slide animated show
Common collector Amp on Pspice(project),ALL slide animated showCommon collector Amp on Pspice(project),ALL slide animated show
Common collector Amp on Pspice(project),ALL slide animated show
 
Assignment 1 Description Marks out of Wtg() Due date .docx
Assignment 1  Description Marks out of Wtg() Due date .docxAssignment 1  Description Marks out of Wtg() Due date .docx
Assignment 1 Description Marks out of Wtg() Due date .docx
 
Pre Final Year project/ mini project for Electronics and communication engine...
Pre Final Year project/ mini project for Electronics and communication engine...Pre Final Year project/ mini project for Electronics and communication engine...
Pre Final Year project/ mini project for Electronics and communication engine...
 
2011 ced capacitors
2011 ced capacitors2011 ced capacitors
2011 ced capacitors
 
capacitors
capacitorscapacitors
capacitors
 
basic-analog-electronics
basic-analog-electronicsbasic-analog-electronics
basic-analog-electronics
 
Basics of bypass capacitor, its functions and applications
Basics of bypass capacitor, its functions and applicationsBasics of bypass capacitor, its functions and applications
Basics of bypass capacitor, its functions and applications
 
Igbt gate driver power supply flyback converter
Igbt gate driver power supply flyback converterIgbt gate driver power supply flyback converter
Igbt gate driver power supply flyback converter
 
A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...
A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...
A Commercial Low Cost, Highly Efficient UC3842 based High Brightness LED (HBL...
 
basic electronics
 basic   electronics basic   electronics
basic electronics
 
MOSFETs: Single Stage IC Amplifier
MOSFETs: Single Stage IC AmplifierMOSFETs: Single Stage IC Amplifier
MOSFETs: Single Stage IC Amplifier
 
Design and implementation of cyclo converter for high frequency applications
Design and implementation of cyclo converter for high frequency applicationsDesign and implementation of cyclo converter for high frequency applications
Design and implementation of cyclo converter for high frequency applications
 
Aec manual for III SEM ECE Students VTU
Aec manual for III SEM ECE Students VTUAec manual for III SEM ECE Students VTU
Aec manual for III SEM ECE Students VTU
 
Class e power amplifiers for qrp2 qro
Class e power amplifiers for qrp2 qroClass e power amplifiers for qrp2 qro
Class e power amplifiers for qrp2 qro
 
Simple 100 w inverter circuit
Simple 100 w inverter circuitSimple 100 w inverter circuit
Simple 100 w inverter circuit
 

Recently uploaded

Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™
Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™
Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™
UiPathCommunity
 
Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !
KatiaHIMEUR1
 
Generative AI Deep Dive: Advancing from Proof of Concept to Production
Generative AI Deep Dive: Advancing from Proof of Concept to ProductionGenerative AI Deep Dive: Advancing from Proof of Concept to Production
Generative AI Deep Dive: Advancing from Proof of Concept to Production
Aggregage
 
DevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA ConnectDevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA Connect
Kari Kakkonen
 
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Ramesh Iyer
 
Epistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI supportEpistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI support
Alan Dix
 
Secstrike : Reverse Engineering & Pwnable tools for CTF.pptx
Secstrike : Reverse Engineering & Pwnable tools for CTF.pptxSecstrike : Reverse Engineering & Pwnable tools for CTF.pptx
Secstrike : Reverse Engineering & Pwnable tools for CTF.pptx
nkrafacyberclub
 
Monitoring Java Application Security with JDK Tools and JFR Events
Monitoring Java Application Security with JDK Tools and JFR EventsMonitoring Java Application Security with JDK Tools and JFR Events
Monitoring Java Application Security with JDK Tools and JFR Events
Ana-Maria Mihalceanu
 
Transcript: Selling digital books in 2024: Insights from industry leaders - T...
Transcript: Selling digital books in 2024: Insights from industry leaders - T...Transcript: Selling digital books in 2024: Insights from industry leaders - T...
Transcript: Selling digital books in 2024: Insights from industry leaders - T...
BookNet Canada
 
Introduction to CHERI technology - Cybersecurity
Introduction to CHERI technology - CybersecurityIntroduction to CHERI technology - Cybersecurity
Introduction to CHERI technology - Cybersecurity
mikeeftimakis1
 
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdfFIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance
 
Elevating Tactical DDD Patterns Through Object Calisthenics
Elevating Tactical DDD Patterns Through Object CalisthenicsElevating Tactical DDD Patterns Through Object Calisthenics
Elevating Tactical DDD Patterns Through Object Calisthenics
Dorra BARTAGUIZ
 
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Thierry Lestable
 
When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...
Elena Simperl
 
FIDO Alliance Osaka Seminar: Overview.pdf
FIDO Alliance Osaka Seminar: Overview.pdfFIDO Alliance Osaka Seminar: Overview.pdf
FIDO Alliance Osaka Seminar: Overview.pdf
FIDO Alliance
 
State of ICS and IoT Cyber Threat Landscape Report 2024 preview
State of ICS and IoT Cyber Threat Landscape Report 2024 previewState of ICS and IoT Cyber Threat Landscape Report 2024 preview
State of ICS and IoT Cyber Threat Landscape Report 2024 preview
Prayukth K V
 
PCI PIN Basics Webinar from the Controlcase Team
PCI PIN Basics Webinar from the Controlcase TeamPCI PIN Basics Webinar from the Controlcase Team
PCI PIN Basics Webinar from the Controlcase Team
ControlCase
 
Assuring Contact Center Experiences for Your Customers With ThousandEyes
Assuring Contact Center Experiences for Your Customers With ThousandEyesAssuring Contact Center Experiences for Your Customers With ThousandEyes
Assuring Contact Center Experiences for Your Customers With ThousandEyes
ThousandEyes
 
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
UiPathCommunity
 
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Albert Hoitingh
 

Recently uploaded (20)

Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™
Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™
Le nuove frontiere dell'AI nell'RPA con UiPath Autopilot™
 
Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !
 
Generative AI Deep Dive: Advancing from Proof of Concept to Production
Generative AI Deep Dive: Advancing from Proof of Concept to ProductionGenerative AI Deep Dive: Advancing from Proof of Concept to Production
Generative AI Deep Dive: Advancing from Proof of Concept to Production
 
DevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA ConnectDevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA Connect
 
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
 
Epistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI supportEpistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI support
 
Secstrike : Reverse Engineering & Pwnable tools for CTF.pptx
Secstrike : Reverse Engineering & Pwnable tools for CTF.pptxSecstrike : Reverse Engineering & Pwnable tools for CTF.pptx
Secstrike : Reverse Engineering & Pwnable tools for CTF.pptx
 
Monitoring Java Application Security with JDK Tools and JFR Events
Monitoring Java Application Security with JDK Tools and JFR EventsMonitoring Java Application Security with JDK Tools and JFR Events
Monitoring Java Application Security with JDK Tools and JFR Events
 
Transcript: Selling digital books in 2024: Insights from industry leaders - T...
Transcript: Selling digital books in 2024: Insights from industry leaders - T...Transcript: Selling digital books in 2024: Insights from industry leaders - T...
Transcript: Selling digital books in 2024: Insights from industry leaders - T...
 
Introduction to CHERI technology - Cybersecurity
Introduction to CHERI technology - CybersecurityIntroduction to CHERI technology - Cybersecurity
Introduction to CHERI technology - Cybersecurity
 
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdfFIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
 
Elevating Tactical DDD Patterns Through Object Calisthenics
Elevating Tactical DDD Patterns Through Object CalisthenicsElevating Tactical DDD Patterns Through Object Calisthenics
Elevating Tactical DDD Patterns Through Object Calisthenics
 
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
 
When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...
 
FIDO Alliance Osaka Seminar: Overview.pdf
FIDO Alliance Osaka Seminar: Overview.pdfFIDO Alliance Osaka Seminar: Overview.pdf
FIDO Alliance Osaka Seminar: Overview.pdf
 
State of ICS and IoT Cyber Threat Landscape Report 2024 preview
State of ICS and IoT Cyber Threat Landscape Report 2024 previewState of ICS and IoT Cyber Threat Landscape Report 2024 preview
State of ICS and IoT Cyber Threat Landscape Report 2024 preview
 
PCI PIN Basics Webinar from the Controlcase Team
PCI PIN Basics Webinar from the Controlcase TeamPCI PIN Basics Webinar from the Controlcase Team
PCI PIN Basics Webinar from the Controlcase Team
 
Assuring Contact Center Experiences for Your Customers With ThousandEyes
Assuring Contact Center Experiences for Your Customers With ThousandEyesAssuring Contact Center Experiences for Your Customers With ThousandEyes
Assuring Contact Center Experiences for Your Customers With ThousandEyes
 
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
 
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
 

En528032

  • 1. Page 1 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 1© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 1 Buck Converter Design Example Welcome to the Buck Converter Design Example Web seminar. The following slides will show a process to calculate the component values needed for a Buck converter.
  • 2. Page 2 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 2© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 2 Session Agenda G Calculate the required inductor G Calculate the output capacitor requirements G Select the input capacitor G Select the diode G Choose the MOSFET G Calculate the converter Efficiency G Examine a Synchronous Buck Converter This is the agenda for this course. For a Buck DC-DC converter we will calculate the required inductor and output capacitor specifications. We will then determine the input capacitor, diode, and MOSFET characteristics. With the selected components, we will calculate the system efficiency and then compare this asynchronous design to a synchronous buck converter.
  • 3. Page 3 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 3© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 3 Buck Converter Design Example Assumptions Assume: Vin = 12 V VOUT = 5 volts ILOAD = 2 amps Fsw = 400 KHz D = Vin / Vout = 5V /12V = 0.416 Define Ripple current: Iripple = 0.3 •••••••• ILOAD (typically 30%) This example converts a 12 volt power source to an output of 5 volts and 2 amps load. The switching frequency is selected at 400 KHz. The current ripple will be limited to 30% of maximum load.
  • 4. Page 4 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 4© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 4 Buck Converter Design Example +Vin L1 Vout CoutCin Q1 ILOAD + Iripple ILOAD PWM Iripple IrippleD1 Here is the schematic of the buck converter for which we will select component values. In this example either a P-channel or an N-channel MOSFET may be used. The choice will be based on cost and complexity issues.
  • 5. Page 5 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 5© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 5 Buck Converter: Calculate Inductance For an Inductor: V = L •••••••• ∆I / ∆T Rearrange and substitute: L = (Vin – Vout) •••• (D / Fsw ) / Iripple Calculate: L = 7 V •••••••• (0.416 / 400 kHz ) / 0.6A L == 12.12 uh Starting with the basic equation for current flow through an inductor: V = L di/dt We rearrange the terms to calculate “L” so : L = V dt/di For the design example, the calculated inductor value is 12 uh. From a catalog, a 12 uH, 3 amp inductor has a resistance of 0.037 ohm and costs about 85¢. The power dissipated due to copper losses is: (Iload)2 •••••••• ESR = 0.15 watt Note: The vendor information on core loss characteristics are often difficult to find.
  • 6. Page 6 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 6© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 6 Buck Converter Calculate Output Capacitance For a capacitor: ∆V = ∆I •••••••• (ESR ++ ∆T / C + ESL / ∆T) Define Ripple voltage: 50 mv Given: ∆I = 0.6 amp ESR = 0.03 ohm ESL = 0 ∆T =.416 / 400 kHz = 1.04 usec The voltage ripple across the output capacitor is the sum of ripple voltages due to the Effective Series resistance (ESR), the voltage sag due to the load current that must be supplied by the capacitor as the inductor is discharged, and the voltage ripple due to the capacitor’s Effect Series Inductance”. The ESL specification is usually not specified by the capacitor vendor. For this example, we will assume that the ESL value is zero. As switching frequencies increase, the ESL specification will become more important. The equation shown here shows that we are solving an equation with multiple unknowns, ESR, C, and ESL. A reasonable approach is to remove terms that are not significant, and then make a reasonable estimate of the most important parameter that you can control, ESR. The capacitor ESR value was selected from a vendor’s catalog of smps rated capacitors. Given the ripple current and the target output voltage ripple, an ESR value of 0.030 ohm was selected from a list of capacitors rated for 0.6 amp ripple current.
  • 7. Page 7 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 7© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 7 Buck Converter Select Output Capacitor Simplify (assume ESL = 0): ∆V = ∆I •••••••• (ESR ++ ∆T / C) Rearrange: C = (∆I •••••••• ∆T) / (∆V - (∆I •••••••• ESR)) Calculate: Cout = (0.6A •••••••• 1.04 usec) / (0.05V- (0.6A •••••••• 0.03)) Cout = 19.5 uF (minimum) Now, we will calculate the required capacitance of the output capacitor given the desired output voltage ripple is defined as 50 millivolts. The term in the equation’s denominator (∆V - (∆I •••••••• ESR)) shows that the capacitor’s ESR rating is more important than the capacitance value. If the selected ESR is too large, the voltage due to the ripple current will equal or exceed the target output voltage ripple. We will have a divide by zero issue, indicating that an infinite output capacitance is required. If a reasonable ESR is selected, then the actual capacitance value is reasonable. An electrolytic capacitor with the require ESR has a capacitance of 1,200 uf which easily meets the minimum requirements and costs 12¢. There are specialty polymer electrolytic capacitors with 47 uf, and an ESR of 0.025 ohm that are much smaller, but cost about $1.00. The estimated power dissipation in the output capacitor is: (Iripple)2 •••••••• ESR = 0.01 watt
  • 8. Page 8 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 8© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 8 Output Capacitor Parasitic G The ESR dominates voltage ripple and the output capacitor selection. G The ESL is rarely specified by manufacturers. Becomes significant at high frequencies. G When ESR requirement is met, the capacitor’s capacitance is usually adequate. Estimate the maximum ESR your application can tolerate due to output voltage ripple requirements. Make sure the capacitor is rated for the ripple current. If operating at high switching frequencies (>1 MHz) contact the manufacturer to determine the ESL specifications for the capacitors you are considering to use. When considering ESL, also include the ESL of the PCB traces that interconnect the capacitor with the other components. Rarely is the capacitor’s capacitance value an issue when operating at moderate frequencies. (> 100 KHz). Exotic capacitors such as specialty electrolytics, large ceramics, or film capacitors are useful is space limited applications. These advanced capacitors feature extremely low ESR for their small size, BUT, their small size implies a very limited capacitance. The limited capacitance of advanced capacitors may create issues with system stability and voltage “droop”..
  • 9. Page 9 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 9© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 9 Buck Converter Select Input Capacitor G Estimate Input Ripple Current: IIRIPPLERIPPLE ≈ ILOAD / 2 = 1 amp G Define acceptable input ripple voltage: 200 mv G Select a Capacitor ESR value: 0.12 ohm G Compute Capacitance: C = ∆T / (/ ( (Vripple / IIripple)) -- ESR) = 13 uf G Consult catalog: 16V 470 uf electrolytic capacitor meets ESR and Capacitance requirements. The worst case ripple current occurs when the duty cycle is 50% and the worst case ripple current on the input of a buck converter is about one half of the load current. Like the output capacitor, the input capacitor selection is primarily dictated by the ESR requirement needed to meet voltage ripple requirements. Usually, the input voltage ripple requirement is not as stringent as the output voltage ripple requirement. In this example, the maximum input voltage ripple was defined as 200 millivolts. The input ripple current rating for the input capacitors may be the most important criteria for selecting the input capacitors. Often the input ripple current will exceed the output ripple current. From a catalog, a 16V, 470 uf electrolytic capacitor meets the ESR and ripple current requirements for 8¢. The estimated power dissipation in the input capacitor is: (Iripple)2 •••••••• ESR = 0.12 watt
  • 10. Page 10 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 10© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 10 Buck Converter Diode Selection G Estimate Diode Current: ID = (1-D) •••••••• ILOAD ID = (1.0- 0.416) •••••••• 2A = 1.17 A Where D = Duty cycle G Max Diode Reverse Voltage = 12V G Select Schottky rectifier: A 1N5820, 20V, 3 A Schottky meets requirements G Power Dissipation: VF •••• ID = 0.47 w The diode’s average current is equal to the load current times the portion of time the diode is conducting. The time the diode is on is: (1 – duty cycle) The maximum reverse voltage on the diode is Vin which is 12 volts in this example. The current and voltage ratings are low enough that a small schottky diode can be used for this application. By using a schottky diode, switching losses are negligible. The forward voltage drop for the selected diode is about 0.4 volts at the peak current of 2.0 amps. The estimated diode power dissipation is 0.47 watts.
  • 11. Page 11 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 11© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 11 Assume: 12V input, 2 amp load, D = 0.416, Trise = Tfall = 55 ns, Fsw = 400 KHz Select P-Channel MOSFET for ease of driving gate. Select -30V, -9.3 amp MOSFET for low Rds (0.02 ohm) cost = $0.72 Pconduction = (ID)2 • Rds(hot) • D = 22 • 0.02 • 0.416 = 0.033 watt Pswitching = (V • ID / 2) • (Ton + Toff) • Fsw + (Coss • V2 • Fsw) Pswitching = ((7 • 2/2) • 100 nsec • 400 kHz) + (890pf • 72 • 400 kHz) Pswitching = 0.28 watt + 0.017 watt = 0.297 watt Ptotal = 0.3 watt Buck Converter MOSFET Selection To simplify the gate drive circuitry for the MOSFET, a P-channel device was selected. An N-channel device would require a gate drive circuit that incorporates a method to drive the gate voltage about the source. The cost of a level translator and charge pump will outweigh the savings of using an N-channel device versus a P-channel device. A 20 volt MOSFET was not selected because the available devices in the catalog had maximum gate to source voltage ratings of only 12 volts. With a 12 volt input voltage, the applied gate volts might exceed the device specifications. If a 20 volt MOSFET was used, it would be good design practice to incorporate a voltage clamp in the gate driver circuit. A 30 volt device was selected on the basis of the 20 volt gate to source specification. The device current rating is more than necessary, but the low Rds(on) specification minimizes temperature rise. Most small surface mount packages have thermal resistances of about 50 degrees Celsius per watt. With a calculated power dissipation of 0.3 watt, the MOSFET should experience a temperature rise of only 15 degrees C.
  • 12. Page 12 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 12© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 12 Output Power : 10 watts (5V @ 2 amps) Input capacitor loss: 0.12 w MOSFET Loss: 0.3 w Diode Loss: 0.47 w Inductor Loss: 0.15 w Output Capacitor Loss: 0.01 w Total losses: 1.05 watts Efficiency = 10w / (10w + 1.05w) = 90.5% Buck Converter Efficiency This Buck converter design example has a calculated efficiency of 90.5%. The diode losses represent almost one half of the total losses ! If the diode’s forward voltage drop could be lowered, the converter’s efficiency could be raised. This buck converter design example is called an Asynchronous Buck converter because the diode commutation (switching) is independent of the MOSFET switching.
  • 13. Page 13 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 13© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 13 Synchronous Buck Converter Design Example +Vin L1 Vout CoutCin Q1 ILOAD + Iripple ILOAD PWMH Iripple Q2 PWML PWM1H PWM1L Period This slide shows a Synchronous Buck converter. It is similar to the previous asynchronous buck converter except the diode is paralleled with another transistor. It is called a synchronous buck converter because transistor Q2 is switched on and off synchronously with the operation of the primary switch Q1. The idea of a synchronous buck converter is to use a MOSFET as a rectifier that has very low forward voltage drop as compared to a standard rectifier. By lowering the diode’s voltage drop, the overall efficiency for the buck converter can be improved. The synchronous rectifier (MOSFET Q2) requires a second pwm signal that is the complement of the primary PWM signal. Q2 is on when Q1 is off and vice a versa. This pwm format is called Complementary PWM.
  • 14. Page 14 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 14© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 14 Select N-channel MOSFET with RDS(on) = 0.0044 ohm Pconduction = (ID)2 • Rds(hot) • (1 - D) = 22 • 0.0044 • (1- 0.416) = 0.01 w MOSFET Rectifier 0.01 w Input capacitor loss: 0.12 w MOSFET Loss: 0.30 w Inductor Loss: 0.15 w Output Capacitor Loss: 0.01 w Total losses: 0.59 watts Efficiency = 10w / (10w + 0.59w) = 94.4% Synchronous Buck Converter Efficiency The MOSFET Q2 is clamped by a Schottky rectifier. The schottky rectifier prevents the MOSFET’s intrinsic body diode from conducting which prevents the body diode from developing a stored charge. The body diode in a MOSFET is a slow rectifier and would add significant losses if it were allowed to switch. Because the MOSFET rectifier (synchronous rectifier) switches with less than a volt across itself, the switching losses are almost zero. The MOSFET conduction losses are very low compared to the schottky rectifier's forward voltage drop. The cost of the MOSFET chosen as the synchronous rectifier is about 11¢. Synchronous Rectification can increase a power converter’s efficiency significantly and for minimal cost.
  • 15. Page 15 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 15© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 15 Key Support Documents Device Selection Reference Document # General Purpose and Sensor Family Data Sheet DS70083 Motor Control and Power Conv. Data Sheet DS70082 dsPIC30F Family Overview DS70043 Base Design Reference Document # dsPIC30F Family Reference Manual DS70046 dsPIC30F Programmer’s Reference Manual DS70030 MPLAB® C30 C Compiler User’s Guide DS51284 MPLAB ASM30, MPLAB LINK30 & Utilities User’s Guide DS51317 dsPIC® Language Tools Libraries DS51456 For more information, here are references to some important documents that contain a lot of information about the dsPIC30F family of devices. The Family Reference Manual contains detailed information about the architecture and peripherals, whereas the Programmer’s Reference Manual contains a thorough description of the instruction set.
  • 16. Page 16 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 16© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 16 Key Support Documents Microchip Web Sites: www.microchip.com/smps www.microchip.com/16-bit For device data sheets, Family Reference Manuals, and other related documents please visit the following Microchip websites.
  • 17. Page 17 © 2005 Microchip Technology Incorporated. All Rights Reserved. Intro to SMPS 17© 2006 Microchip Technology Incorporated. All Rights Reserved. Buck Converter Design Example Slide 17 Thank You Note: The Microchip name and logo, dsPIC, MPLAB and PIC are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. dsPICDEM, dsPICDEM.net, dsPICworks, MPASM, MPLIB, MPLINK and PICtail are trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All other trademarks mentioned herein are property of their respective companies. Thank you for attending this Webinar