For more classes visit www.snaptutorial.com Chapter# 3: 2, 8, 14, 22, and 34 (pp. 158–160) Chapter# 4:2, 4, and 14 (pp. 233–236)

1. ECET 220 Week 1 Homework
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Chapter# 3: 2, 8, 14, 22, and 34 (pp. 158–160)
Chapter# 4:2, 4, and 14 (pp. 233–236)
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ECET 220 Week 1 iLab Analysis of BJT
Characteristics comprisingof BJT Biasing using
Simulation and Actual Construction
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2. Objectives:
To analyze a normally biased BJT circuit comprising of a BJT and
resistors and measure the circuit voltages between emitter, common,
base, and collector.
To theoretically calculate and verify the circuit using Ohm’s law or
Kirchhoff’s law, which were learned in previous classes.
Determine the voltage drop across the collector load resistance and
measure the current passing through emitter and collector resistors.
Determine if the collector-based junction is forward or reversed biased.
Questions:
What is the total resistance between the base and +Vcc?
Is the base-to-emitter voltage close to 0.7 V?
Is the collector-to-emitter voltage less than Vcc?
Is the collector-to-emitter voltage greater than 0.3 V?
How much current must be passing through the emitter resistor in mA?
What is the voltage drop across the collector load resistance (VRC) in
V?
What is the collector current in mA? Approximately.
By removing R4 and therefore changing the value of the base-to-VCC
Has it changed the collector-to-emitter voltage? How?
By removing R4 and therefore changing the value of the base-to-VCC
Has it changed the collector current? How?

3. By removing R4 and therefore changing the value of the base-to-VCC
Has it changed the base-to-emitter voltage? By how much?
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ECET 220 Week 2 Homework
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Chapter 5: Problems 1, 7, 8, and 12
5.1 a. What is the expected amplification of a BJT transistor amplifier if
the dc supply is set to zero volts? 0
What will happen to the output ac signal if the dc level is insufficient?
Sketch the effect on the waveform. It will be clipped
What is the conversion efficiency of an amplifier in which the effective
value of the current through a 2.2-kΩ load is 5 mA and the drain on the
18-V dc supply is 3.8 mA? 80

4. 5.7 Using the model of Fig. 16, determine the following for a common-
emitter amplifier if β = 80, IE (dc) = 2 mA, and r0 = 40 kΩ.
5.8 The input impedance to a common-emitter transistor amplifier is 1.2
kΩ with β = 140, ro = 50 kΩ, and RL= 2.7 kΩ. Determine:
5.12 For the network of Fig. 153:
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ECET 220 Week 2 iLab Analysis of BJT
Amplifier Classes of Operation using Simulation
and Actual Construction
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Objectives:

5. To analyze a BJT Amplifier Classes Amplifier comprising of two
capacitors (C) and resistors (R) and measure voltage drops and currents
at different locations.
To theoretically calculate and verify the circuit using Ohm’s law and
Kirchhoff’s law, which were learned in previous courses.
Determine the voltages (VE, VC, VB) with respect to the circuit
common. Measure and verify the same using the simulation.
Determine if the output voltage is in-phase or out-of-phase with its input
waveform.
Did your theoretical calculations closely match the results obtained from
the Multisim simulation? (Yes, No)
Did your theoretical calculations closely match the results obtained from
the Proto Board circuit? (Yes, No)
Did your results obtained from the Multisim simulation closely match
the results obtained from the Proto Board circuit? (Yes, No)
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6. ECET 220 Week 3 Homework
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# 2 (e book, Qn.# 2, pg.# 416 & Hard Cover Ed., Qn.# 2, pg.# 418)
Using the characteristics of Fig. 11, determine ID for the following
levels of VGS(with VDS > VP):
# 6 (e Book, pg.# 416-417)Hard Cover Ed. Prob.# 7, pg.# 419
a. Describe in your own words why IG is effectively 0 A for a JFET
transistor.
b. Why is the input impedance to a JFET so high?
c. Why is the terminology field effect appropriate for this important
three-terminal device?
# 16 (e book, pg.# 418) Hard Cover Ed., Qn.# 18, pg.# 420
Define the region of operation for the 2N5457 JFET of Fig. 22 using the
range of IDSS and VP provided. That is, sketch the transfer curve
defined by the maximum IDSS and VP and the transfer curve for the
minimum IDSS and VP. Then, shade in the resulting area between the
two curves.
# 17 (E book, Qn.# 17, pg.# 418) & hard cover Ed., Qn.# 20, pg.# 428.
The numbers given are different and they are 30 V & 100 mW

7. Chapter 7
# 1 Fixed-Bias Configuration
For the fixed-bias configuration of Fig. 80:
Sketch the transfer characteristics of the device.
Superimpose the network equation on the same graph.
Determine and IDQ and VDSQ
Using Shockley’s equation, solve for and then find IDQ and VDSQ.
Compare with the solutions of part (c).
# 2 (e book, Pg.# 476)
# 6 (e book, pg.# 477) Hard cover Ed., Prob.# 7, pg.# 474
For the self-bias configuration of Fig. 85:
Sketch the transfer curve for the device.
Superimpose the network equation on the same graph.
Determine and ID Q & VGS Q
Calculate VDS, VD, VG, and VS.
# 11
Chapter 8
# 3 For a JFET having device parameters gm0 = 5 mS and VP = −3.5 V,
what is the device current at VGS = 0 V?
(Ebook, Pg.# 541)
# 12 Using the drain characteristic of Fig. 72:

8. a. What is the value of rd for VGS = 0 V?
b. What is the value of gm0 at VDS = 10 V?
# 17 Determine Zi, Zo, and AV for the network of Fig. 73 if IDSS = 10
mA, VP = −4 V, and rd = 40 kΩ.
# 23. Determine Zi, Zo, and Vo for the network of Fig. 76 if V = 20
mV.
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ECET 220 Week 3 iLab Analysis of JFET
Characteristics and Amplifiers
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Objectives:

9. To calculate and verify the common-source JFET Amplifier circuit of
Figure 1. Determine the voltages (VS, VG, VD) with respect to the
circuit common. Simulate and measure the circuit using Multisim 11
software. Construct the circuit using a prototyping board and necessary
components. Measure the key voltages of the constructed circuit with a
digital multi-meter and the AC input signal and its amplified output
signal using an oscilloscope. Determine the phase difference from input
to output and calculate the voltage gain.
Did your theoretical calculations closely match the results obtained from
the Multisim simulation?
Did your theoretical calculations closely match the results obtained from
the Proto Board circuit?
Did your results obtained from the Multisim simulation closely match
the results obtained from the Proto Board circuit?
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ECET 220 Week 4 Homework
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Chapter 10 Questions 1, 2, 4, 5, 6, 9, 12.
What is the output voltage in the circuit of Fig. 62.
What is the range of the voltage-gain adjustment in the circuit of Fig. 63.
What is the range of the output voltage in the circuit of Fig. 65 if the
input can vary from 0.1 to 0.5 V?
What output voltage results in the circuit of Fig. 66 for an input of V1=
−0.3 V?
What input must be applied to the input of Fig. 66 to result in an output
of 2.4 V?
Calculate the output voltage of the circuit in Fig. 68 for Rf = 68 kΩ.
Calculate the output voltage for the circuit of Fig. 71.
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ECET 220 Week 4 iLab Inverting and Non-
Inverting Op Amp Circuits

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Objectives: To analyze the characteristics of the inverting and non-
inverting Operational Amplifier.
To calculate gain as well as expected output voltages in accordance with
the input voltages.
To design a simulation as well as construct the proto board to test and
analyze all theories.
Results: The results matched well with expected calculation until the
Op-amp reached 14.9v. I am sure this is something I overlooked in my
homework.
1. Design an amplifier with a gain of -2 using Multisim. Copy and paste
your circuit below
2. Design an amplifier with a gain of 2 using Multisim. Copy and paste
your circuit below:
3. What is the phase shift between the input and output signals of an
inverting op amp?
4. What is the phase shift between the input and output signals of a non-
inverting op amp?

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ECET 220 Week 5 Homework
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Chapter 10
8. Calculate the output voltage developed by the circuit of Fig.68 for
Rf= 330kΩ.
13. Calculate the output voltages V2 and V3 in circuit Fig.72
16. Calculate the total offset voltage for the circuit Fig.75 for an op-amp
with specified values of input offset voltage Vio= 6mV and input offset
current Iio= 120nA.
24. Determine the output voltage of an op-amp for input voltages
Vi1=220µV and Vi2=140µV. The amplifier has a differential gain of
Ad= 6000 and value of CMRR is: (a) 200 (b) 105.

13. 29. Use schematic capture or MultiSim to calculate the output voltage in
circuit Fig.73. Vo=-1.875V
Chapter 11
2. Calculate the output voltage of the circuit Fig.48 for an input of
150mV rms.
3. Calculate the output voltage in circuit Fig.49.
8. Determine the output voltage for the circuit Fig.52.
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ECET 220 Week 5 iLab Summing Amplifier
(Inverting and Non-Inverting) and
Instrumentation Amplifier
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14. Objectives:
Demonstrate the operation of a summing amplifier inverting, non-
inverting using theoretical calculations and constructed circuits. Also
demonstrate the operation of an instrumentation amplifier using
theoretical calculations and constructed circuits.
Results:
During the results between theoretical and constructed both performed
as expected and the outputs were surprisingly close.
Conclusions:
Sing the op-amps to combine values or signals can be predicted through
calculations or circuit simulation. Depending tolerance values of the
resistors being used you results will all be within 5% or closer in most
cases.
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ECET 220 Week 6 Homework
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Ch. 10
10. Sketch the output waveform resulting in Fig. 69.
Ch. 11
2. Calculate the output voltage of the circuit of Fig. 48 for an input of
150 mV rms
5. Show the connection of two op-amp stages using an LM358 IC to
provide outputs that are 15 and—30 times larger than the input. Use a
feedback resistor, RF = 150 kΩ, in all stages
6. Calculate the output voltage for the circuit of Fig. 50 with inputs of
V1 = 40 mV rms and V2 = 20 mV rms.
7. Determine the output voltage for the circuit of Fig. 51.
14. Calculate Vo in the circuit of Fig. 56.
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ECET 220 Week 6 iLab Differentiator and
Integrator Circuits

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Objectives:
To demonstrate the operation of a differentiator
To demonstrate the operation of an integrator
Design a practical differentiator circuit similar to what is shown in
Figure 2 for a frequency range of 1 kHz to 10 kHz using the formulas
provided in the PRE-LAB.
Use C = 0.0047 μF.
Design a practical integrator circuit similar to what is shown in Figure 4
for a frequency range of 1 kHz to 10 kHz using the formulas provided in
the PRE-LAB.
Use C = 0.01 μF
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ECET 220 Week 7 Homework

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Chapter 13: Linear-Digital ICs
Problems 1, 2, 4, 9, and 10
Draw the diagram of a 741 op-amp operated from ±15-V supplies with
Vi(−) = 0 V and Vi(+) = +5 V. Include terminal pin connections.
Sketch the output waveform for the circuit of Fig. 40.
Draw the resulting output waveform for the circuit of Fig. 41.
Sketch a five-stage ladder network using 15-kΩ and 30-kΩ resistors.
For a reference voltage of 16 V, calculate the output voltage for an input
of 11010 to the circuit of Problem 8.
What voltage resolution is possible using a 12-stage ladder network with
a 10-V reference voltage?
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ECET 220 Week 7 iLab Differential (Difference)
Amplifier and Audio Amplifier

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Objectives:
Construct and take measurements of a Differential (Difference)
Amplifier.
Construct and take measurements of an audio amplifier.
Results:
The measurements of the Vout of the constructed differential amplifiers
yielded comparable result to the theoretical calculations. In each of the
three configurations of VA and VB, the actual output was less than 1%
margin of error from the theoretical calculations.
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