This document discusses state diagrams and their use in representing the states and transitions of sequential circuits. It provides an example state diagram with 7 states labeled a-g and explains how to derive the state table and outputs for given input sequences. It describes how to reduce states by eliminating equivalent states and provides steps for designing synchronous sequential circuits from specifications and state diagrams/tables. An example circuit is given and its state table represented using both D and JK flip-flops.

1. Digital system design
Lec 3

2. State diagram
• The information available in a state table can
be represented graphically in the form of a
state diagram.
• In this type of diagram, a state is represented
by a circle, and the (clock-triggered)
transitions between states are indicated by
directed lines connecting the circles.

3. Example

4. State Diagram
• The figure is a state diagram of a sequential circuit.
• The circuit has seven states a, b, c, d, e, f and g and has one
input and one output.
• There is two next state for input =0 and input = 1.
• The state table can be filled from state diagram as :

5. State Diagram
Persent state Next stat
X=0 X=1
Output
X=0 X=1
A A B 0 0
B C D 0 0
C A D 0 0
D E F 0 1
E A F 0 1
F G F 0 1
G A F 0 1

6. State Diagram
• There are an infinite number of input sequences that may
be applied to the circuit; each results in a unique output
sequence.
• As an example, consider the input sequence 01010110100
starting from the initial state a . Each input of 0 or 1
produces an output of 0 or 1 and causes the circuit to go to
the next state. From the state diagram, we obtain the
output and state sequence for the given input sequence as
follows:

7. State Diagram

8. STATE REDUCTION
• The state reduction of a completely specified state table is given here
without proof:
• “Two states are said to be equivalent if, for each member of the set
of inputs, they give exactly the same output and send the circuit
either to the same state or to an equivalent state.”
• When two states are equivalent, one of them can be removed
without altering the input–output relationships.

9. State Diagram
• we look for two present states that go to the same next state and
have the same output for both input combinations.
• States e and g are two such states: They both go to states a and f and
have outputs of 0 and 1 for x = 0 and x = 1, respectively.
• Therefore, states g and e are equivalent, and one of these states can
be removed.

10. The reduced table:
PS NS
X=0 X=1
O/P
X=0 X=1
A A B 0 0
B C D 0 0
C A D 0 0
D E D 0 1
E E A 0 1

11. DESIGN PROCEDURES
• The design of a clocked sequential circuit starts from a set of
specifications and culminates in a logic diagram or a list of
Boolean functions from which the logic diagram can be
obtained.
• In contrast to a combinational circuit, which is fully specified by
a truth table, a sequential circuit requires a state table for its
specification.
• The first step in the design of sequential circuits is to obtain a
state table or an equivalent representation, such as a state
diagram

12. State Diagram
The procedure for designing synchronous sequential
circuits can be summarized by a list of recommended
steps:
1. From the word description and specifications of the
desired operation, derive a state diagram for the circuit.
2. Reduce the number of states if necessary.

13. State Diagram
3. Assign binary values to the states.
4. Obtain the binary-coded state table.
5. Choose the type of flip-flops to be used.
6. Derive the simplified flip-flop input equations and
output equations.
7. Draw the logic diagram.

14. example
A sequential circuit has the following state diagram
use D flip flop to design it.

15. Example
List the state table :

16. Example

17. Example

18. Example
If we use JK FF to design the circuit the state
become:

19. Example

20. Example