AI/ML Infra Meetup | Reducing Prefill for LLM Serving in RAG
Dell Inspiron Mini 1012 Compal LA-5732P Rev 0.2 Schematics.pdf
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
1 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
1 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
1 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Intel Pineview-M Processor with TigerPoint
SAMOS Schematics Document
2009-8-21
REV: 0.2
Compal Confidential
NIM10
BOM P/N :
PCB NO :
MODEL NAME :
@ : Nopop Component
LA-5732P (DA60000EI00)
43178431L01
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
2 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
2 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
2 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
SPI
RGB
USB
HDA
page 24
page 30
page 25
CHARGER
DC IN
DC/DC Interface
3VALW/5VALW
1.8V/VCCP
1.5VS/0.9VS/
0.89VS
CPU CORE
SATA
Compal Confidential
Model Name : NIM10
X2 mode
CRT Conn
LPC BUS
DMI
Power ON/OFF
page 19
page 5
1.8V/667MHz
page 19
Memory BUS(DDRII)
17x17mm
page 4,5,6
Thermal Sensor
page 10,11,12,13
ENE KBC
KB926
PCI-Express
page 24 page 22
page 29
page 26
page 27
page 28
page 16
HeadPhone &
MIC Jack
page 17
2.5" HDD
page 15
page 16
Audio Codec AMP & Speaker
Int.KBD
Clock Generator
CK505 page 08
page 20
Touch Pad
page 20
SPI ROM
Pineview-M
22x22mm
Tiger Pointer
Chipset
Processor
WLAN
USB Port 6
RJ45
10/100 Ethernet
page 18
MINI Card
page 14
DDRII-DIMM X1
P 07
RTL8103EL
ALC272-VB-GR
W83L771AWG
Broadcom MCP
MINI Card
page 14
PCIE-Port 4
PCIE-Port 2 PCIE-Port 1
WWAN
MINI Card
page 14
PCIE-Port 3
page 18
USB Port 4
page 09
LCD Conn. LVDS
Daughter board
USB Port X1
USB Port X1
Port 1
Port 2
Card Reader
RTS5159
SD/MMC/MS
Port 7
LS-5731P
USB
Port 4
(R)
Port 0 USB Port X1
Through BT cable
Port 5
BlueTooth
Port 3
CMOS CAM
page 09
Through LVDS cable
WWAN
SIM card
PWR buttom board
LS-5732P
Through power buttom cable
Project Name : LA-5732P
Project Code:
page 21
page 21
page 21
page 21
page 14
page 21
page 14
BATT CONN/OTP
LED/B
LS-5733P
Through LED cable
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
3 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
3 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
3 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
ON
SLP_S3#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ON
ON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOW
LOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGH
HIGH
HIGH
LOW
LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATE
OFF
OFF
ON
ON OFF
OFF
OFF
ON
ON
+CPU_CORE
1.5V switched power rail
OFF
Voltage Rails
+0.89VS
+1.5VS
0.9V switched power rail for DDR terminator
+0.9VS
OFF
OFF
ON
Adapter power supply (19V)
1.8V power rail for DDR
B+
VIN
S5
+1.8V
S3
S1
VCCP switched power rail
Core voltage for CPU
AC or battery power rail for power circuit.
OFF
ON
OFF
ON
Description
Power Plane
N/A N/A N/A
N/A
N/A
N/A
OFF
SIGNAL
Address
1001_100X b
0001 011X b
EEPROM(24C16/02)
IDSEL #
DEVICE REQ/GNT #
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Address
PIRQ
EMC1402
1010 000X b
External PCI Devices
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
No PCI Device
+VCCP
ON
OFF
OFF
+5VS
3.3V always on power rail
5V always on power rail
3.3V switched power rail
+RTCBATT RTC power
+3VALW
+3VS
+5VALW
ON ON*
5V switched power rail
+VS VS always on power rail ON ON*
ON
ON
ON
ON
OFF
ON
ON
ON ON*
OFF
ON
CORE VOLTAGE FOR CPU VGA
ID
0
8.2K +/- 5%
R01 (SSI)
R10 (X build)
0V
0.168V
0.375V
0.634V
R02 (ST)
Reserved
Rb Vab (Min)
BRD ID
0
1
2
3
BOARD ID Table(Page 19)
Ra
NC
100K +/- 5% 1010 000Xb
DDR DIMMA
1101 001Xb
Tiger Point SM Bus address
Address
Clock Generator
(SLG8SP556VTR)
Device
*
4
Vab (Type) Vab (Max)
5
6
7 MP
Reserved
Reserved
Reserved
VCC 3.3V +/-5%
100K +/- 5%
100K +/- 5%
100K +/- 5%
100K +/- 5%
100K +/- 5%
100K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
0.958V
1.372V
1.851V
2.433V
0V
0.250V
0.503V
0.819V
1.185V
1.650V
2.200V
3.300V
0.155V
0.362V
0.621V
0.945V
1.359V
1.838V
2.420V
3.300V
100_1100X b
W83L771AWG
ZZZ
PCB
DA60000EI00
ZZZ
PCB
DA60000EI00
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5
DDR_A_MA6
XDP_PREQ#
XDP_TDI
XDP_TMS
XDP_TCK
XDP_TDO
XDP_TRST#
DDR_CKE1
DDR_A_CAS#
DDR_A_BS0
DDR_A_BS2
M_CLK_DDR#1
M_ODT1
DDR_A_WE#
M_CLK_DDR0
DDR_CS#1
M_CLK_DDR1
M_ODT0
DDR_A_RAS#
DDR_CS#0
DDR_CKE0
M_CLK_DDR#0
DDR_A_BS1
DDR_A_MA14
DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
XDP_TDI
XDP_TMS
XDP_TDO
XDP_PREQ#
XDP_TRST#
XDP_TCK
XDP_TDI
XDP_BPM#2
XDP_BPM#0
XDP_BPM#1
XDP_TMS
XDP_PREQ#
XDP_TRST#
XDP_BPM#3
XDP_PRDY#
PLTRST#
XDP_TCK
XDP_TDO
CPU_ITP
CPU_ITP#
DDR_A_MA[0..14]
<7>
DDR_A_DQS#[0..7]
<7>
DDR_A_D[0..63]
<7>
DDR_A_DQS[0..7]
<7>
DDR_A_DM[0..7]
<7>
CLK_CPU_EXP#
<8>
CLK_CPU_EXP
<8>
DMI_RX#0
<12>
DMI_RX1
<12>
DMI_RX#1
<12>
DMI_RX0
<12>
DDR_A_WE#
<7>
DDR_A_CAS#
<7>
DDR_A_RAS#
<7>
M_CLK_DDR1
<7>
M_CLK_DDR#1
<7>
DDR_CS#0
<7>
DDR_CS#1
<7>
DDR_CKE0
<7>
DDR_CKE1
<7>
M_ODT0
<7>
M_ODT1
<7>
M_CLK_DDR0
<7>
M_CLK_DDR#0
<7>
DDR_A_BS0
<7>
DDR_A_BS1
<7>
DDR_A_BS2
<7>
DMI_TX0 <12>
DMI_TX#0 <12>
DMI_TX1 <12>
DMI_TX#1 <12>
CPU_ITP
<8>
CPU_ITP#
<8>
SLPIOVR#
<12>
XDP_TRST#
<5>
XDP_TDI
<5>
XDP_TCK
<5>
H_PWRGD
<5,12>
XDP_BPM#0
<5>
XDP_BPM#1
<5>
XDP_BPM#2
<5>
XDP_BPM#3
<5>
XDP_TMS
<5>
XDP_TDO
<5>
XDP_PREQ#
<5>
XDP_PRDY#
<5>
PLTRST#
<5,12,14,18,19>
+1.8V +1.8V
+VCCP
+1.8V
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
4 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
4 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
4 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Close to CPU
XDP Reserve
BCLKP[0]
BCLKN[0]
HPL_CLKINP
HPL_CLKINN
EXP_CLKINP
EXP_CLKINN
REFCLKINP
REFCLKINN
REFSSCLKINP
REFSSCLKINN
Signal Name Description
Differential Core Clock In
Differential Host Clock In
Differential DMI Clock In
Differential PLL Clock In
Differential Spread Spectrum Clock In
Differential Clock Signal Table
Diff Clk CMOS
Diff Clk CMOS
Diff Clk CMOS
Diff Clk CMOS
Type
Direction
I
I
I
I
I
Diff Clk CMOS
2009-4-27-MODIFY
C907
0.1U_0402_10V7K
C907
0.1U_0402_10V7K
1 2
R1174 1K_0402_1%
@R1174 1K_0402_1%
@ 1 2
R1181
80.6_0402_1%
R1181
80.6_0402_1%
R1184 51_0402_5%~D
R1184 51_0402_5%~D
1 2
T1
T1
R1187 51_0402_5%~D
R1187 51_0402_5%~D
1 2
C909
0.1U_0402_10V7K
C909
0.1U_0402_10V7K
1 2
R1186 51_0402_5%~D
R1186 51_0402_5%~D
1 2
T6
T6
D8
PSOT24C_SOT23-3
@
D8
PSOT24C_SOT23-3
@
2
3
1
C906
0.1U_0402_10V7K
C906
0.1U_0402_10V7K
1 2
T7
T7
R1178
10K_0402_5%
@
R1178
10K_0402_5%
@
R1183 51_0402_5%~D
R1183 51_0402_5%~D
1 2
T44
T44
R1175 1K_0402_1%
R1175 1K_0402_1%
1 2
C908
0.1U_0402_10V7K
C908
0.1U_0402_10V7K
1 2
D5
PSOT24C_SOT23-3
@
D5
PSOT24C_SOT23-3
@
2
3
1
R1180
1K_0402_1%
R1180
1K_0402_1%
1
2
R1171
750_0402_1%
R1171
750_0402_1%
R1177
1K_0402_1%
R1177
1K_0402_1%
1
2
T2
T2
D7
PSOT24C_SOT23-3
@
D7
PSOT24C_SOT23-3
@
2
3
1
R1182 51_0402_5%~D
R1182 51_0402_5%~D
1 2
DMI
PINEVIEW_M
REV = 1.1
1 OF 6
U31A
PINEVIEW-M_FCBGA8559
DMI
PINEVIEW_M
REV = 1.1
1 OF 6
U31A
PINEVIEW-M_FCBGA8559
RSVD M2
RSVD N2
EXP_ICOMPI L9
EXP_RBIAS L8
RSVD
N9
RSVD
N10
EXP_TCLKINP
R9
EXP_TCLKINN
R10
RSVD
M4
RSVD
J1
RSVD
K2
DMI_RXN_1
G3
DMI_RXP_1
H4
DMI_RXN_0
F2
DMI_RXP_0
F3
RSVD_TP P11
RSVD_TP N11
EXP_RCOMPO L10
RSVD L2
RSVD K3
DMI_TXN_1 J2
DMI_TXP_1 H3
DMI_TXN_0 G1
DMI_TXP_0 G2
EXP_CLKINP
N6
EXP_CLKINN
N7
RSVD
L3
R1172
49.9_0402_1%
R1172
49.9_0402_1%
R1179
80.6_0402_1%
R1179
80.6_0402_1%
R1185 51_0402_5%~D
R1185 51_0402_5%~D
1 2
PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U31B
PINEVIEW-M_FCBGA8559
PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U31B
PINEVIEW-M_FCBGA8559
DDR_A_DQS_0 AD3
DDR_A_DQS#_0 AD2
DDR_A_DM_0 AD4
DDR_A_DQ_0 AC4
DDR_A_DQ_1 AC1
DDR_A_DQ_2 AF4
DDR_A_DQ_3 AG2
DDR_A_DQ_4 AB2
DDR_A_DQ_5 AB3
DDR_A_DQ_6 AE2
DDR_A_DQ_7 AE3
DDR_A_DQS_1 AB8
DDR_A_DQS#_1 AD7
DDR_A_DM_1 AA9
DDR_A_DQ_8 AB6
DDR_A_DQ_9 AB7
DDR_A_DQ_10 AE5
DDR_A_DQ_11 AG5
DDR_A_DQ_12 AA5
DDR_A_DQ_13 AB5
DDR_A_DQ_14 AB9
DDR_A_DQ_15 AD6
DDR_A_DQS_2 AD8
DDR_A_DQS#_2 AD10
DDR_A_DM_2 AE8
DDR_A_DQ_16 AG8
DDR_A_DQ_17 AG7
DDR_A_DQ_18 AF10
DDR_A_DQ_19 AG11
DDR_A_DQ_20 AF7
DDR_A_DQ_21 AF8
DDR_A_DQ_22 AD11
DDR_A_DQ_23 AE10
DDR_A_DQS_3 AK5
DDR_A_DQS#_3 AK3
DDR_A_DM_3 AJ3
DDR_A_DQ_24 AH1
DDR_A_DQ_25 AJ2
DDR_A_DQ_26 AK6
DDR_A_DQ_27 AJ7
DDR_A_DQ_28 AF3
DDR_A_DQ_29 AH2
DDR_A_DQ_30 AL5
DDR_A_DQ_31 AJ6
DDR_A_DQS_4 AG22
DDR_A_DQS#_4 AG21
DDR_A_DM_4 AD19
DDR_A_DQ_32 AE19
DDR_A_DQ_33 AG19
DDR_A_DQ_34 AF22
DDR_A_DQ_35 AD22
DDR_A_DQ_36 AG17
DDR_A_DQ_37 AF19
DDR_A_DQ_38 AE21
DDR_A_DQ_39 AD21
DDR_A_DQS_5 AE26
DDR_A_DQS#_5 AG27
DDR_A_DM_5 AJ27
DDR_A_DQ_40 AE24
DDR_A_DQ_41 AG25
DDR_A_DQ_42 AD25
DDR_A_DQ_43 AD24
DDR_A_DQ_44 AC22
DDR_A_DQ_45 AG24
DDR_A_DQ_46 AD27
DDR_A_DQ_47 AE27
DDR_A_DQS_6 AE30
DDR_A_DQS#_6 AF29
DDR_A_DM_6 AF30
DDR_A_DQ_48 AG31
DDR_A_DQ_49 AG30
DDR_A_DQ_50 AD30
DDR_A_DQ_51 AD29
DDR_A_DQ_52 AJ30
DDR_A_DQ_53 AJ29
DDR_A_DQ_54 AE29
DDR_A_DQ_55 AD28
DDR_A_DQS_7 AB27
DDR_A_DQS#_7 AA27
DDR_A_DM_7 AB26
DDR_A_DQ_56 AA24
DDR_A_DQ_57 AB25
DDR_A_DQ_58 W24
DDR_A_DQ_59 W22
DDR_A_DQ_60 AB24
DDR_A_DQ_61 AB23
DDR_A_DQ_62 AA23
DDR_A_DQ_63 W27
DDR_A_MA_0
AH19
DDR_A_MA_1
AJ18
DDR_A_MA_2
AK18
DDR_A_MA_3
AK16
DDR_A_MA_4
AJ14
DDR_A_MA_5
AH14
DDR_A_MA_6
AK14
DDR_A_MA_7
AJ12
DDR_A_MA_8
AH13
DDR_A_MA_9
AK12
DDR_A_MA_10
AK20
DDR_A_MA_11
AH12
DDR_A_MA_12
AJ11
DDR_A_MA_13
AJ24
DDR_A_MA_14
AJ10
DDR_A_WE#
AK22
DDR_A_CAS#
AJ22
DDR_A_RAS#
AK21
DDR_A_BS_0
AJ20
DDR_A_BS_1
AH20
DDR_A_BS_2
AK11
DDR_A_CS#_0
AH22
DDR_A_CS#_1
AK25
DDR_A_CS#_2
AJ21
DDR_A_CS#_3
AJ25
DDR_A_CKE_0
AH10
DDR_A_CKE_1
AH9
DDR_A_CKE_2
AK10
DDR_A_CKE_3
AJ8
DDR_A_ODT_0
AK24
DDR_A_ODT_1
AH26
DDR_A_ODT_2
AH24
DDR_A_ODT_3
AK27
DDR_A_CK_0
AG15
DDR_A_CK_0#
AF15
DDR_A_CK_1
AD13
DDR_A_CK_1#
AC13
RSVD
AD17
RSVD
AC17
DDR_A_CK_3
AC15
DDR_A_CK_3#
AD15
DDR_A_CK_4
AF13
DDR_A_CK_4#
AG13
RSVD
AB15
RSVD
AB17
RSVD
AB4
RSVD
AK8
RSVD_TP
AB11
RSVD_TP
AB13
DDR_VREF
AL28
DDR_RPD
AK28
DDR_RPU
AJ26
RSVD
AK29
R1173 1K_0402_1%
R1173 1K_0402_1%
1 2
JP80
ACES_87151-24051
JP80
ACES_87151-24051
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
G1
25
G2
26
R1176
10K_0402_5%
R1176
10K_0402_5%
WWW.AliSaler.Com
5. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A20M#
H_SMI#
H_FERR#
H_IGNNE#
H_STPCLK#
H_PWRGD
H_DPRSTP#
H_DPSLP#
H_EXTBGREF
H_GTLREF
H_INIT#
H_INTR
H_NMI
H_PROCHOT#
H_PROCHOT#
H_THERMTRIP#
H_THERMDA
H_THERMDC
EC_SMB_DA2
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
PM_EXTTS#0
PM_EXTTS#0
H_PWROK
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
CPU_BSEL1
CPU_BSEL0
CPU_BSEL2
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK
CLK_CPU_BCLK#
CLK_CPU_BCLK
GMCH_ENBKL
GMCH_CRT_B
GMCH_CRT_G
GMCH_CRT_R
H_PWROK
CPU_DREFCLK
CPU_DREFCLK#
PLTRST#
EC_SMB_CK2
H_THERMDA
H_THERMDC
GMCH_ENBKL
XDP_TDI
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDO
PM_EXTTS#1
H_GTLREF
H_EXTBGREF
H_A20M# <11>
H_SMI# <11>
H_FERR# <11>
H_IGNNE# <11>
H_STPCLK# <11>
H_PWRGD <4,12>
H_DPSLP# <12>
H_INIT# <11>
H_INTR <11>
H_NMI <11>
H_THERMTRIP# <11>
EC_SMB_CK2 <19>
EC_SMB_DA2 <19>
GMCH_CRT_DATA <21>
GMCH_CRT_CLK <21>
GMCH_CRT_HSYNC <21>
GMCH_CRT_VSYNC <21>
GMCH_CRT_R <21>
GMCH_CRT_G <21>
GMCH_CRT_B <21>
PM_EXTTS#0 <7>
PLTRST# <4,12,14,18,19>
CPU_VID0 <29>
CPU_VID1 <29>
CPU_VID2 <29>
CPU_VID3 <29>
CPU_VID4 <29>
CPU_VID5 <29>
CPU_VID6 <29>
CPU_BSEL1 <8>
CPU_BSEL2 <8>
CPU_BSEL0 <8>
CPU_DREFCLK <8>
CPU_DREFCLK# <8>
CPU_SSCDREFCLK <8>
CPU_SSCDREFCLK# <8>
CLK_CPU_HPLCLK# <8>
CLK_CPU_HPLCLK <8>
VGATE <8,12,19,29>
PCH_POK <12,19>
H_DPRSTP# <12>
EDID_DAT_LCD
<9>
GMCH_LVDDEN
<9>
GMCH_ENBKL
<19>
LVDSAC-
<9>
LVDSAC+
<9>
EDID_CLK_LCD
<9>
LVDSA0-
<9>
LVDSA0+
<9>
LVDSA1-
<9>
LVDSA1+
<9>
LVDSA2-
<9>
LVDSA2+
<9>
XDP_TDI
<4>
XDP_TCK
<4>
XDP_TRST#
<4>
XDP_BPM#0
<4>
XDP_BPM#1
<4>
XDP_BPM#2
<4>
XDP_BPM#3
<4>
XDP_TMS
<4>
XDP_TDO
<4>
XDP_PRDY# <4>
XDP_PREQ# <4>
CLK_CPU_BCLK <8>
CLK_CPU_BCLK# <8>
PM_DPRSLPVR <12>
+VCCP
+VCCP
+VCCP
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
5 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
5 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
5 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
placed within 0.5"
of processor pin.
placed within 0.5"
of processor pin.
Close to Processor
pin
CPU THERMAL SENSOR
H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
Address:1001_100
Close to Processor
pin
Place closed to chipset
2009-5-05
T11
T11
T39
T39
T17
T17
T18
T18
R1253
0_0402_5%
R1253
0_0402_5%
1 2
R1192
100K_0402_5%
R1192
100K_0402_5%
C915
2200P_0402_50V7K
C915
2200P_0402_50V7K
1 2
R1193
0_0402_5%
@R1193
0_0402_5%
@
1 2
T14
T14
R1255 0_0402_5%
R1255 0_0402_5%
1 2
T25
T25
U33
W83L771AWG_TSSOP8
U33
W83L771AWG_TSSOP8
D-
3
D+
2
VDD
1
ALERT# 6
SCL 8
T_CRIT_A#
4 GND 5
SDA 7
R1203
150_0402_1%
R1203
150_0402_1%
1 2
R1214
0_0402_5%
R1214
0_0402_5%
1 2
T21
T21
T24
T24
R1196
68_0402_5%
R1196
68_0402_5%
R1190
2.37K_0402_1%
R1190
2.37K_0402_1%
T35
T35
R1252
0_0402_5%
R1252
0_0402_5%
T20
T20
R1202
3.3K_0402_1%
R1202
3.3K_0402_1%
T37
T37
T22
T22
T34
T34
T27
T27
T8
T8
T23
T23
R1189 665_0402_1%
R1189 665_0402_1%
T10
T10
T12
T12
T16
T16
C939
1U_0603_10V4Z
@
C939
1U_0603_10V4Z
@
1
2
T28
T28
R1205
100K_0402_5%
R1205
100K_0402_5%
T40
T40
R1209
0_0402_5%
R1209
0_0402_5%
1 2
T29
T29
R1204
150_0402_1%
R1204
150_0402_1%
1 2
MISC
VGA
PINEVIEW_M
3 OF 6
REV = 1.1
U31C
PINEVIEW-M_FCBGA8559
MISC
VGA
PINEVIEW_M
3 OF 6
REV = 1.1
U31C
PINEVIEW-M_FCBGA8559
RSVD_TP
R6
REFCLKINN Y29
REFCLKINP Y30
CRT_DDC_CLK L30
RSVD_TP
AA7
RSVD_TP
AA6
RSVD_TP
R5
RSVD
L11
XDP_RSVD_17
C11
XDP_RSVD_16
B12
XDP_RSVD_15
B10
XDP_RSVD_14
B11
XDP_RSVD_13
D10
XDP_RSVD_12
C10
XDP_RSVD_11
B8
XDP_RSVD_10
C8
XDP_RSVD_09
D9
XDP_RSVD_08
A9
XDP_RSVD_07
B7
XDP_RSVD_06
D8
XDP_RSVD_05
C6
XDP_RSVD_04
C7
XDP_RSVD_03
C5
XDP_RSVD_02
D6
XDP_RSVD_01
A7
XDP_RSVD_00
D12
HPL_CLKINP W9
HPL_CLKINN W8
RSTIN# AA3
PWROK L5
PM_EXTTS#_0 J30
PM_EXTTS#_1/DPRSLPVR K29
REFSSCLKINP AA30
DAC_IREF P28
CRT_DDC_DATA L31
CRT_IRTN N30
CRT_BLUE P29
CRT_GREEN P30
CRT_RED N31
CRT_VSYNC M29
CRT_HSYNC M30
REFSSCLKINN AA31
RSVD_TP
T21
RSVD_TP
W21
RSVD_TP
AA21
RSVD_TP
V21
T33
T33
T9
T9
T38
T38
PINEVIEW_M
ICH
LVDS
CPU
REV = 1.1
4 OF 6
U31D
PINEVIEW-M_FCBGA8559
PINEVIEW_M
ICH
LVDS
CPU
REV = 1.1
4 OF 6
U31D
PINEVIEW-M_FCBGA8559
LA_DATAP_0
R24
LA_DATAN_1
N26
LA_DATAN_2
R26
LIBG
R22
LVREFH
N22
LVREFL
N23
LBKLT_CTL
L26
LCTLA_CLK
L23
LBKLT_EN
L27
LVBG
J28
LCTLB_DATA
K25
LDDC_CLK
K23
LDDC_DATA
K24
LVDD_EN
H26
DPSLP# G10
DPRSTP# G6
VSS H27
THRMDA_2/RSVD
C30
THRMDC_1
E30
TRST#
C16
TMS
C14
TCK
B14
TDO
D13
TDI
D14
RSVD
G5
BPM_2_3#/RSVD
B21
BPM_2_2#/RSVD
C20
BPM_1_3#
F13
BPM_1_2#
G13
BPM_1_1#
E15
BPM_1_0#
G11
LA_CLKN
U25
RSVD D18
RSVD H13
RSVD L7
VID_6 E29
VID_5 F29
VID_3 G30
VID_2 H28
VID_1 H29
BSEL_2 K6
BSEL_1 H5
BSEL_0 K5
RSVD E17
RSVD L6
GTLREF A13
CPUPWRGOOD W1
PROCHOT# C18
THERMTRIP# E13
IGNNE# E5
LINT1 F11
LINT0 F10
FERR# H6
STPCLK# F8
INIT# G8
A20M# H7
LA_DATAP_1
N27
LA_DATAN_0
R23
LA_CLKP
U26
BPM_2_1#/RSVD
B20
BPM_2_0#/RSVD
B18
BCLKP J10
BCLKN H10
PREQ# F15
PRDY# E11
SMI# E7
VID_4 G29
RSVD D20
RSVD_TP D19
EXTBGREF K7
THRMDC_2/RSVD
D31
THRMDA_1
D30
RSVD_TP K9
VID_0 H30
LA_DATAP_2
R27
T32
T32
T26
T26
T19
T19
R1194
0_0402_5%
R1194
0_0402_5%
1 2
R1200
150_0402_1%
R1200
150_0402_1%
1 2
C940
1U_0603_10V4Z
@
C940
1U_0603_10V4Z
@
1
2
T30
T30
R1199
976_0402_1%
R1199
976_0402_1%
R1206
10K_0402_5%
R1206
10K_0402_5%
1
2
C914
0.1U_0402_16V4Z~D
C914
0.1U_0402_16V4Z~D
1
2
R1195
10K_0402_5%
R1195
10K_0402_5%
1
2
T13
T13
R1211
0_0402_5%
R1211
0_0402_5%
1 2
R1198
1K_0402_1%
R1198
1K_0402_1%
T31
T31
R1197
1K_0402_1%
R1197
1K_0402_1%
R1201
2K_0402_1%
R1201
2K_0402_1%
T15
T15
T36
T36
R1254 0_0402_5%
R1254 0_0402_5%
1 2
WWW.AliSaler.Com
6. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CRT_DAC
+VCC_CRT_DAC
+VCC_DMI
+VCC_ALVD
+VCC_DLVD
+RING_EAST
+RING_WEST
+RING_EAST
+RING_WEST
+DMI_HMPLL
+DMI_HMPLL
+VCC_ALVD
+VCC_DLVD
VCCSENSE
VSSSENSE
VCCSENSE
VSSSENSE
+VCC_DMI
VCCSENSE <29>
VSSSENSE <29>
+CPU_CORE
+0.89VS
+0.89VS
+1.8V
+1.8V
+1.8VS
+1.8VS
+3VS
+VCCP
+CPU_CORE
+1.5VS
+VCCP
+VCCP
+VCCP
+VCCP
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
6 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
6 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
6 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
PLACE IN CAVITY
2 x 330uF(9mohm/2)
Close to Pin T1
Close Chipset pin
Close to U31.U10
Close to U71.D4
Close to U71.E2
GFX supply current: 1.38A
Sustained GFX supply current: 1.05A
DDR supply current: 2.27A
DDR analog supply current: 1.32A
Display PLL SFR and CRT DAC supply
current: 0.154A
GIO supply current:0.006A
DAC, GIO, LVDS, & LGIO, DPLL, HMPLL
supply current: 0.33A
Processor Core analog supply current: 0.08A
LVDS supply current: 0.06A
DMI analog supply current: 0.48A
SFR & DMIHMPLL supply current: 0.104A
Add 22U x3
07/17
07/17
07/17
C948
1U_0402_6.3V6K
C948
1U_0402_6.3V6K
1
2
C937
1U_0603_10V4Z
C937
1U_0603_10V4Z
1
2
C947
1U_0402_6.3V6K
C947
1U_0402_6.3V6K
1
2
+
C927
330U
2.5V
Y
+
C927
330U
2.5V
Y
1
2
C271
22U_0805_6.3V6M
C271
22U_0805_6.3V6M
1
2
C924
22U_0805_6.3V6M
C924
22U_0805_6.3V6M
1
2
C952
1U_0402_6.3V6K
C952
1U_0402_6.3V6K
1
2
+
C921
330U 2.5V Y
+
C921
330U 2.5V Y
1
2
C944
1U_0603_10V4Z
C944
1U_0603_10V4Z
1
2
C56
22U_0805_6.3V6M
C56
22U_0805_6.3V6M
1
2
R1213
MBK2012601_YZF
R1213
MBK2012601_YZF
1 2
R1219
100_0402_1%
R1219
100_0402_1%
1 2
C1000
10U_0805_10V6K~D
C1000
10U_0805_10V6K~D
1
2
C942
1U_0603_10V4Z
C942
1U_0603_10V4Z
1
2
C930
2.2U_0603_10V6K
C930
2.2U_0603_10V6K
1
2
C931
2.2U_0603_10V6K
C931
2.2U_0603_10V6K
1
2
R1210
0_0805_5%
R1210
0_0805_5%
1 2
C950
1U_0402_6.3V6K
C950
1U_0402_6.3V6K
1
2
R1218
100_0402_1%
R1218
100_0402_1%
1 2
T41
T41
C919
1U_0402_6.3V6K
C919
1U_0402_6.3V6K
1
2
C391
0.01U_0402_16V7K
C391
0.01U_0402_16V7K
1
2
C269
22U_0805_6.3V6M
C269
22U_0805_6.3V6M
1
2
C951
1U_0402_6.3V6K
C951
1U_0402_6.3V6K
1
2
C946
2.2U_0603_10V6K
C946
2.2U_0603_10V6K
1
2
+ C918
330U 2.5V Y
+ C918
330U 2.5V Y
1
2
C926
1U_0603_10V4Z
C926
1U_0603_10V4Z
1
2
C916
1U_0402_6.3V6K
C916
1U_0402_6.3V6K
1
2
C272
22U_0805_6.3V6M
C272
22U_0805_6.3V6M
1
2
+
C923
330U 2.5V Y
@
+
C923
330U 2.5V Y
@
1
2
C932
1U_0603_10V4Z
C932
1U_0603_10V4Z
1
2
C949
1U_0402_6.3V6K
C949
1U_0402_6.3V6K
1
2
C929
2.2U_0603_10V6K
C929
2.2U_0603_10V6K
1
2
C920
1U_0402_6.3V6K
C920
1U_0402_6.3V6K
1
2
R1208
0_0603_5%
R1208
0_0603_5%
1 2
C954
1U_0402_6.3V6K
C954
1U_0402_6.3V6K
1
2
C995
0.1U_0402_10V6K
C995
0.1U_0402_10V6K
1
2
GND
PINEVIEW_M
6 OF 6
REV = 1.1
U31F
PINEVIEW-M_FCBGA8559
GND
PINEVIEW_M
6 OF 6
REV = 1.1
U31F
PINEVIEW-M_FCBGA8559
VSS
F19
VSS
F17
VSS
E8
VSS
E25
VSS
E21
VSS
E19
VSS
E10
RSVD_NCTF
E1
VSS
D22
RSVD_NCTF
C31
VSS
C25
VSS
C22
VSS
C21
VSS
C12
RSVD_NCTF
C1
VSS
B9
VSS
B5
RSVD_NCTF
B31
RSVD_NCTF
B30
VSS
B22
VSS
B19
VSS
B16
VSS
B13
VSS
AL9
RSVD_NCTF
AL30
RSVD_NCTF
AL3
RSVD_NCTF
AL29
VSS
AL23
RSVD_NCTF
AL2
VSS
AL19
VSS
AL13
RSVD_NCTF
AK31
RSVD_NCTF
AK30
VSS
AK23
RSVD_NCTF
AK2
RSVD_NCTF
AK1
RSVD_NCTF
AJ31
VSS
AJ16
RSVD_NCTF
AJ1
VSS
AH8
VSS
AH6
VSS
AH4
VSS
AH28
VSS
AH23
VSS
AH18
VSS
AG3
VSS
AG10
VSS
AF28
VSS
AF24
VSS
AF21
VSS
AF17
VSS
AF11
VSS
AE31
VSS
AE22
VSS
AE17
VSS
AE15
VSS
AE13
VSS
AE11
VSS
AE1
VSS
AD5
VSS
AD26
VSS
AC30
VSS
AC28
VSS
AC21
VSS
AC2
VSS
AC19
VSS
AC11
VSS
AC10
VSS
AB30
VSS
AB29
VSS
AB28
VSS
AB21
VSS
AB19
VSS
AA8
VSS
AA29
VSS
AA26
VSS
AA25
VSS
AA22
VSS
AA2
VSS
AA18
VSS
AA16
VSS
AA14
VSS
AA13
RSVD_NCTF
A4
RSVD_NCTF
A30
RSVD_NCTF
A3
RSVD_NCTF
A29
VSS
A19
VSS
A16
VSS
A11
VSS T29
VSS Y4
VSS Y3
VSS Y28
VSS W7
VSS W6
VSS W5
VSS W4
VSS W30
VSS W28
VSS W26
VSS W25
VSS W23
VSS W2
VSS W13
VSS V29
VSS V28
VSS V18
VSS V16
VSS V14
VSS U27
VSS U24
VSS U23
VSS U22
VSS T11
VSS R8
VSS R7
VSS R25
VSS P4
VSS P3
VSS P21
VSS P19
VSS P18
VSS P16
VSS P14
VSS P13
VSS N8
VSS N5
VSS N4
VSS N28
VSS N25
VSS N24
VSS N18
VSS N13
VSS N1
VSS M3
VSS M28
VSS L29
VSS L25
VSS L24
VSS L22
VSS L18
VSS L13
VSS L1
VSS K8
VSS K4
VSS K30
VSS K28
VSS K27
VSS K26
VSS K19
VSS K13
VSS K11
VSS J4
VSS J15
VSS J13
VSS J11
VSS H8
VSS H25
VSS H21
VSS H2
VSS H15
VSS H11
VSS G31
VSS G27
VSS G22
VSS G17
VSS G15
VSS F4
VSS F28
VSS F24
C938
1U_0603_10V4Z
C938
1U_0603_10V4Z
1
2
C941
1U_0603_10V4Z
C941
1U_0603_10V4Z
1
2
C922
1U_0402_6.3V6K
@
C922
1U_0402_6.3V6K
@
1
2
R1215
0_0603_5%
R1215
0_0603_5%
1 2
C953
1U_0603_10V4Z
C953
1U_0603_10V4Z
1
2
C943
1U_0603_10V4Z
C943
1U_0603_10V4Z
1
2
C935
1U_0603_10V4Z
C935
1U_0603_10V4Z
1
2
DMI
EXPCRTPLL
POWER
DDR
CPU
LVDS
GFX/MCH
PINEVIEW_M
REV = 1.1
5 OF 6
U31E
PINEVIEW-M_FCBGA8559
DMI
EXPCRTPLL
POWER
DDR
CPU
LVDS
GFX/MCH
PINEVIEW_M
REV = 1.1
5 OF 6
U31E
PINEVIEW-M_FCBGA8559
VCCSFR_AB_DPL
AC31
VCC A23
VCC A25
VCC A27
VCC B23
VCC B24
VCC B25
VCC B26
VCC B27
VCC C24
VCC C26
VCC D23
VCC D24
VCC D26
VCC D28
VCC E22
VCC E24
VCC E27
VCC F21
VCC F22
VCC F25
VCC G19
VCC G21
VCC G24
VCC H17
VCC H19
VCC H22
VCC H24
VCC J17
VCC J19
VCC J21
VCC J22
VCC K15
VCC K17
VCC K21
VCC L14
VCC L16
VCC L19
VCC L21
VCC N14
VCC N16
VCC N19
VCC N21
VCCSENSE C29
VSSSENSE B29
VCCA Y2
VCCP D4
VCCP B4
VCCP B3
VCCALVDS V30
VCCDLVDS W31
VCCA_DMI T1
VCCA_DMI T2
VCCA_DMI T3
RSVD P2
VCCSFR_DMIHMPLL AA1
VCCP E2
VCCGFX
T13
VCCGFX
T14
VCCGFX
T16
VCCGFX
T18
VCCGFX
T19
VCCGFX
V13
VCCGFX
V19
VCCGFX
W14
VCCGFX
W16
VCCGFX
W18
VCCGFX
W19
VCCSM
AK13
VCCSM
AL16
VCCSM
AL21
VCCSM
AL25
VCCCK_DDR
AK7
VCCCK_DDR
AL7
VCCA_DDR
U10
VCCA_DDR
U5
VCCA_DDR
U6
VCCA_DDR
U7
VCCA_DDR
U8
VCCA_DDR
U9
VCCA_DDR
V2
VCCA_DDR
V3
VCCA_DDR
V4
VCCA_DDR
W10
VCCA_DDR
W11
VCCACK_DDR
AA10
VCCACK_DDR
AA11
VCCD_AB_DPL
AA19
VCCACRTDAC
T30
VCC_GIO
T31
VCCRING_EAST
J31
VCCRING_WEST
B2
VCCRING_WEST
C2
VCC_LGI
A21
VCCRING_WEST
C3
VCCSM
AK19
VCCSM
AK9
VCCSM
AL11
VCCD_HMPLL
V11
R1207
0_0603_5%
R1207
0_0603_5%
1 2
C925
4.7U_0603_6.3V6K~D
C925
4.7U_0603_6.3V6K~D
1
2
R1216
0.1UH_MLF1608DR10KT_10%~D
R1216
0.1UH_MLF1608DR10KT_10%~D
1 2
C917
1U_0402_6.3V6K
C917
1U_0402_6.3V6K
1
2
C928
2.2U_0603_10V6K
C928
2.2U_0603_10V6K
1
2
C933
22U_0805_6.3V6M
C933
22U_0805_6.3V6M
1
2
R1212
0_0603_5%
R1212
0_0603_5%
1
2
R1217
0_0805_5%
R1217
0_0805_5%
1 2
C934
1U_0603_10V4Z
C934
1U_0603_10V4Z
1
2
WWW.AliSaler.Com
7. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D29
DDR_A_D28
DDR_A_DQS3
DDR_A_D31
DDR_A_D23
DDR_A_DQS#3
DDR_CKE1
DDR_A_D30
DDR_A_DM2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_D3
DDR_A_D9
DDR_A_D10
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_D8
DDR_A_DQS0
DDR_A_DQS1
DDR_A_D11
DDR_A_DQS#2
DDR_A_D39
DDR_A_D25
DDR_A_D16
DDR_A_D17
DDR_A_D19
DDR_A_D18
DDR_A_D24
DDR_A_DM3
DDR_A_DQS2
DDR_A_DM4
DDR_A_D53
DDR_A_D52
DDR_A_D44
DDR_A_D47
DDR_A_D37
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_D36
DDR_A_D45
DDR_A_D38
DDR_A_D46
DDR_A_D54
DDR_A_D60
DDR_A_D63
DDR_A_D61
DDR_A_D55
DDR_A_D62
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_DM6
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_MA14
DDR_A_D27
DDR_A_D26
DDR_A_MA3
DDR_A_MA12
DDR_A_MA1
DDR_A_MA5
DDR_A_MA9
DDR_A_MA8
DDR_CS#1
DDR_A_CAS#
M_ODT1
DDR_A_WE#
DDR_A_MA10
DDR_A_BS0
DDR_CKE0
DDR_A_BS2
DDR_A_DM5
DDR_A_D40
DDR_A_D35
DDR_A_DQS#4
DDR_A_D34
DDR_A_D32
DDR_A_D43
DDR_A_DQS4
DDR_A_D49
DDR_A_D33
DDR_A_D48
DDR_A_D41
DDR_A_D42
DDR_A_DM7
DDR_A_D56
DDR_A_D59
CLK_SMBCLK
DDR_A_DQS#6
DDR_A_D57
DDR_A_D58
CLK_SMBDATA
DDR_A_D50
DDR_A_DQS6
DDR_A_D51
DDR_A_BS1
DDR_A_MA9
DDR_A_MA12
DDR_A_MA8
DDR_A_MA10
DDR_A_MA2
DDR_A_MA0
DDR_A_MA11
DDR_A_BS1
DDR_A_RAS#
DDR_A_MA6
M_ODT0
DDR_A_MA4
DDR_A_MA7
DDR_A_MA13
DDR_CS#0
DDR_A_D6
DDR_A_D5
DDR_A_D12
DDR_A_D7
DDR_A_D4
DDR_A_D13
DDR_A_DM1
DDR_A_DM0
DDR_A_D15
DDR_A_D14
M_CLK_DDR#0
M_CLK_DDR0
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_BS2
DDR_CKE0
DDR_CKE1
DDR_A_RAS#
DDR_CS#0
DDR_A_MA13
M_ODT0
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4
DDR_A_MA6
DDR_A_MA11
DDR_A_MA7
DDR_A_MA14
M_ODT1
DDR_CS#1
DDR_A_CAS#
DDR_A_WE#
DDR_A_BS0
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5
DDR_A_DQS#[0..7]
<4>
DDR_A_DM[0..7]
<4>
DDR_A_D[0..63]
<4>
DDR_A_MA[0..14]
<4>
DDR_A_DQS[0..7]
<4>
DDR_A_WE#
<4>
DDR_A_BS0
<4>
DDR_A_CAS#
<4>
DDR_CS#1
<4>
M_ODT1
<4>
DDR_A_BS1 <4>
DDR_A_RAS# <4>
DDR_CS#0 <4>
M_ODT0 <4>
M_CLK_DDR1 <4>
DDR_CKE1 <4>
CLK_SMBDATA
<8>
M_CLK_DDR#1 <4>
CLK_SMBCLK
<8>
M_CLK_DDR#0 <4>
DDR_A_BS2
<4>
M_CLK_DDR0 <4>
DDR_CKE0
<4>
PM_EXTTS#0 <5>
+0.9VS
+1.8V
+0.9VS
+3VS
+1.8V +1.8V
+DIMM_VREF
+DIMM_VREF
+1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784
A
SCHEMATIC, MB A5732
Custom
7 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784
A
SCHEMATIC, MB A5732
Custom
7 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784
A
SCHEMATIC, MB A5732
Custom
7 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Layout Note:
Place near JDIM1
20mils
Share +DIMM_VREF for
1.DDRII VREF
2.GMCH SM_VREF_0
SM_VREF_1
Schematic Note:
Follow Intel check list recommand, we add
8 CAP.
Layout Note:
Place one cap close to every 2 pull-up
resistors terminated to +0.9VS.
(check list page 18)
Layout Note:
Place these resistor
closely DIMMA,all
trace length Max=1.0"
Layout Note:
Place near JDIM1
2009-5-27 modify
2009-5-27 modify
DIMM_A(REV)
C1021
2.2U_0603_6.3V6K~D
C1021
2.2U_0603_6.3V6K~D
1
2
RP2
47_0804_8P4R_5%
RP2
47_0804_8P4R_5%
1
8
2
7
3
6
4
5
C1041
0.1U_0402_16V4Z~D
C1041
0.1U_0402_16V4Z~D
1
2
C1043
0.1U_0402_16V4Z~D
C1043
0.1U_0402_16V4Z~D
1
2
C1059
0.1U_0402_16V4Z~D
C1059
0.1U_0402_16V4Z~D
1
2
R59
47_0402_5%
R59
47_0402_5%
1 2
C1057
0.1U_0402_16V4Z~D
C1057
0.1U_0402_16V4Z~D
1
2
C1049
0.1U_0402_16V4Z~D
C1049
0.1U_0402_16V4Z~D
1
2
C1042
0.1U_0402_16V4Z~D
C1042
0.1U_0402_16V4Z~D
1
2
R1345
1K_0402_1%
R1345
1K_0402_1%
1
2
R1347 10K_0402_5%
R1347 10K_0402_5%
1 2
RP5
47_0804_8P4R_5%
RP5
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP1
47_0804_8P4R_5%
RP1
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
C1048
0.1U_0402_16V4Z~D
C1048
0.1U_0402_16V4Z~D
1
2
R168
47_0402_5%
R168
47_0402_5%
1 2
C1018
2.2U_0603_6.3V6K~D
C1018
2.2U_0603_6.3V6K~D
1
2
C1044
0.1U_0402_16V4Z~D
C1044
0.1U_0402_16V4Z~D
1
2
C1020
2.2U_0603_6.3V6K~D
C1020
2.2U_0603_6.3V6K~D
1
2
C1052
0.1U_0402_16V4Z~D
C1052
0.1U_0402_16V4Z~D
1
2
C1047
0.1U_0402_16V4Z~D
C1047
0.1U_0402_16V4Z~D
1
2
C1023
2.2U_0603_6.3V6K~D
C1023
2.2U_0603_6.3V6K~D
1
2
C1040
0.1U_0402_16V4Z~D
C1040
0.1U_0402_16V4Z~D
1
2
C1060
0.1U_0402_16V4Z~D
C1060
0.1U_0402_16V4Z~D
1
2
C1056
0.1U_0402_16V4Z~D
C1056
0.1U_0402_16V4Z~D
1
2
C1034
0.1U_0402_16V4Z~D
C1034
0.1U_0402_16V4Z~D
1
2
C1054
0.1U_0402_16V4Z~D
C1054
0.1U_0402_16V4Z~D
1
2
JDIM1
TYCO_292525-4
JDIM1
TYCO_292525-4
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SA0 198
SA1 200
G1
201 G2 202
C1051
0.1U_0402_16V4Z~D
C1051
0.1U_0402_16V4Z~D
1
2
R1344
0_0402_5%
R1344
0_0402_5%
1 2
RP6
47_0804_8P4R_5%
RP6
47_0804_8P4R_5%
1
8
2
7
3
6
4
5
C1032
0.1U_0402_16V4Z~D
C1032
0.1U_0402_16V4Z~D
1
2
+
C1030
220U_B2_2.5VM_R35
@
+
C1030
220U_B2_2.5VM_R35
@
1
2
RP4
47_0804_8P4R_5%
RP4
47_0804_8P4R_5%
1
8
2
7
3
6
4
5
C1022
2.2U_0603_6.3V6K~D
C1022
2.2U_0603_6.3V6K~D
1
2
RP3
47_0804_8P4R_5%
RP3
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
C1033
0.1U_0402_16V4Z~D
C1033
0.1U_0402_16V4Z~D
1
2
C1062
0.1U_0402_16V4Z~D
C1062
0.1U_0402_16V4Z~D
1
2
C1016
0.1U_0402_16V4Z~D
C1016
0.1U_0402_16V4Z~D
1
2
R1343
1K_0402_1%
R1343
1K_0402_1%
1
2
C1053
0.1U_0402_16V4Z~D
C1053
0.1U_0402_16V4Z~D
1
2
R1349 10K_0402_5%
R1349 10K_0402_5%
1 2
C1055
0.1U_0402_16V4Z~D
C1055
0.1U_0402_16V4Z~D
1
2
C1050
0.1U_0402_16V4Z~D
C1050
0.1U_0402_16V4Z~D
1
2
C1058
0.1U_0402_16V4Z~D
C1058
0.1U_0402_16V4Z~D
1
2
C1031
0.1U_0402_16V4Z~D
C1031
0.1U_0402_16V4Z~D
1
2
R64
47_0402_5%
R64
47_0402_5%
1 2
C1046
0.1U_0402_16V4Z~D
C1046
0.1U_0402_16V4Z~D
1
2
C1045
0.1U_0402_16V4Z~D
C1045
0.1U_0402_16V4Z~D
1
2
C1061
0.1U_0402_16V4Z~D
C1061
0.1U_0402_16V4Z~D
1
2
C1024
2.2U_0603_6.3V6K~D
C1024
2.2U_0603_6.3V6K~D
1
2
WWW.AliSaler.Com
8. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSB
CLK_XTAL_IN
CLK_XTAL_OUT
ITP_EN
H_STP_CPU#
CLK_SMBDATA
CLK_SMBCLK
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
CLK_XTAL_OUT
CLK_XTAL_IN
PCI2_TME
ITP_EN PCI4_SEL PCI2_TME
WLAN_CLKREQ#
WLAN_CLKREQ#
CLKREQ_LAN#
PCI4_SEL
H_STP_PCI#
FSA
CLKREQ_LAN#
CLK_PCIE_WWAN
CLK_PCIE_WWAN#
CLK_EN
CLK_EN
FSA
FSB
FSC
WWAN_REQ#11
WWAN_REQ#11
FSC
MCP_CLKREQ#
CLK_CPU_EXP
CLK_CPU_EXP#
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
CLK_PCIE_MCP
CLK_PCIE_SATA
CLK_PCIE_SATA#
CPU_ITP#
CPU_ITP
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_ICH#
CLK_PCIE_ICH
CPU_DREFCLK
CPU_DREFCLK#
MCP_CLKREQ#
H_STP_PCI#
H_STP_CPU#
CLK_PCIE_MCP#
VGATE
<5,12,19,29>
H_STP_PCI#
<12>
H_STP_CPU#
<12>
ICH_SMBDATA
<12>
ICH_SMBCLK
<12>
CLK_SMBDATA <7>
CLK_SMBCLK <7>
CLK_CPU_BCLK# <5>
CLK_CPU_BCLK <5>
CLK_CPU_HPLCLK <5>
CLK_CPU_HPLCLK# <5>
CPU_SSCDREFCLK <5>
CPU_SSCDREFCLK# <5>
WLAN_CLKREQ# <14>
CLKREQ_LAN# <18>
CLK_PCI_LPC
<19>
CLK_ICH_14M
<12>
CLK_PCI_ICH
<10>
CLK_PCIE_WWAN <14>
CLK_PCIE_WWAN# <14>
CLK_ENABLE#
<29>
CPU_BSEL0
<5>
CPU_BSEL1
<5>
CPU_BSEL2
<5>
CLK_ICH_48M
<12>
WWAN_REQ#11 <14>
MCP_CLKREQ# <14>
CLK_CPU_EXP# <4>
CLK_CPU_EXP <4>
CLK_PCIE_WLAN# <14>
CLK_PCIE_WLAN <14>
CLK_PCIE_SATA# <11>
CLK_PCIE_SATA <11>
CLK_PCIE_MCP# <14>
CLK_PCIE_MCP <14>
CPU_ITP# <4>
CPU_ITP <4>
CLK_PCIE_LAN <18>
CLK_PCIE_LAN# <18>
CLK_PCIE_ICH <12>
CLK_PCIE_ICH# <12>
CPU_DREFCLK <5>
CPU_DREFCLK# <5>
+1.05VM_CK505
+3VM_CK505
+3VS
+3VS
+3VS
+3VS +3VS
+3VS
+3VS
+VCCP
+1.05VM_CK505
+VCCP
+VCCP
+VCCP
+1.5VM_CK505
+1.5VS
+3VM_CK505
+3VS
+1.5VM_CK505
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
A
SCHEMATIC, MB A5732
8 33
Wednesday, September 16, 2009
2007/10/15 2009/06/22
Compal Electronics, Inc.
401784
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
A
SCHEMATIC, MB A5732
8 33
Wednesday, September 16, 2009
2007/10/15 2009/06/22
Compal Electronics, Inc.
401784
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
A
SCHEMATIC, MB A5732
8 33
Wednesday, September 16, 2009
2007/10/15 2009/06/22
Compal Electronics, Inc.
401784
REQ_3#
DEVICE
PORT
REQ PORT LIST
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS
PCIE_WLAN
PCIE_LAN
Routing the trace at least 10mil
SA000020K00 (Silego : SLG8SP556VTR )
SA000020H10 (ICS : ICS9LPRS387AKLFT)
For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed
Schematic Note:
33 ohm series-resistor need add for singal end clock.
100
0
CLKSEL1
0
PCI
MHz
266
SRC
MHz
CPU
MHz
CLKSEL2
33.3
0
FSA
CLKSEL0
FSC FSB REF
MHz
DOT_96
MHz
USB
MHz
14.318 96.0 48.0
0 100
0 133 33.3
1 14.318 96.0 48.0
0 100
1 200 33.3
0 14.318 96.0 48.0
0 100
1 166 33.3
1 14.318 96.0 48.0
1 100
0 333 33.3
0 14.318 96.0 48.0
1 100
0 100 33.3
1 14.318 96.0 48.0
1 100
1 400 33.3
0 14.318 96.0 48.0
1 1 1 Reserved
*
SRC PORT LIST
SRC10
SRC11
PCIE_TigerPoint
SRC6
SRC4
DMI
SRC0
DEVICE
SRC3
CPU_VGA
SRC2
SRC7
SRC9
SRC8
PCIE_LAN
PCIE_WLAN
PORT
PCIE_SATA
PCIE_WWAN
2009-5-27 modify
2009-5-27 modify
2009-5-27 modify
2009-5-27 modify
2009-08-04 modify
PCIE_MCP
CPU_XDP
PCIE_WWAN
PCIE_MCP
07/17
2009-08-04 modify
2009-08-04 modify
2009-08-04 modify
2009-8-10 modify
2009-8-10 modify
2009-08-17 modify
+3VS,+1.5VS
Silego,ICS +3VS
Realtek
De-pop R102,pop R94
De-pop R94,pop R102
Co-Layout circuit
U11
SLG8SP556VTR_QFN72_10X10
U11
SLG8SP556VTR_QFN72_10X10
CKPWRGD/PD#
1
FS_B/TEST_MODE
2
VSS_REF
3
XTAL_OUT
4
XTAL_IN
5
VDD_REF
6
REF_0/FS_C/TEST_
7
REF_1
8
SDA 9
SCL 10
NC
11
VDD_PCI
12
PCI_1
13
PCI_2
14
PCI_3
15
PCI_4/SEL_LCDCL
16
PCIF_5/ITP_EN
17
VSS_PCI
18
VDD_48
19
USB_0/FS_A
20
USB_1/CLKREQ_A# 21
VSS_48
22
VDD_IO
23
SRC_0/DOT_96 24
SRC_0#/DOT_96# 25
VSS_IO
26
VDD_PLL3
27
LCDCLK/27M 28
LCDCLK#/27M_SS 29
VSS_PLL3
30
VDD_PLL3_IO
31
SRC_2 32
SRC_2# 33
VSS_SRC
34
SRC_3 35
SRC_3# 36
VDD_CPU
72
CPU_0 71
CPU_0# 70
VSS_CPU
69
CPU_1 68
CPU_1# 67
VDD_CPU_IO
66
CLKREQ_7# 65
SRC_8/CPU_ITP 64
SRC_8#/CPU_ITP# 63
VDD_SRC_IO
62
SRC_7 61
SRC_7# 60
VSS_SRC
59
CLKREQ_6# 58
SRC_6 57
SRC_6# 56
VDD_SRC
55
PCI_STOP#
54
CPU_STOP#
53
VDD_SRC_IO
52
SRC_10# 51
SRC_10 50
SLKREQ_10# 49
SRC_11 48
SRC_11# 47
CLKREQ_11# 46
SRC_9# 45
SRC_9 44
CLKREQ_9# 43
VSS_SRC
42
CLKREQ_4# 41
SRC_4# 40
SRC_4 39
VDD_SRC_IO
38
CLKREQ_3# 37
VSS
73
R91
0_0402_5%
R91
0_0402_5%
1 2
C1012
10P_0402_50V8J~D
@
C1012
10P_0402_50V8J~D
@
1
2
C152
0.1U_0402_16V4Z~D
C152
0.1U_0402_16V4Z~D
1
2
R131 0_0805_5%
R131 0_0805_5%
1 2
R102 0_0805_5%
@R102 0_0805_5%
@
1 2
R97
470_0402_5%~D
@R97
470_0402_5%~D
@
1
2
R112
2.2K_0402_5%
R112
2.2K_0402_5%
C189
0.1U_0402_16V4Z~D
C189
0.1U_0402_16V4Z~D
1
2
R140
470_0402_5%~D
R140
470_0402_5%~D
1
2
R1335 33_0402_5%
R1335 33_0402_5%
1 2
R108
2.2K_0402_5%
R108
2.2K_0402_5%
R84
10K_0402_5%
R84
10K_0402_5%
1
2
C175
0.1U_0402_16V4Z~D
C175
0.1U_0402_16V4Z~D
1
2
R113
10K_0402_5%
R113
10K_0402_5%
1
2
C936
47P_0402_50V8J
@C936
47P_0402_50V8J
@
1
2
R98
0_0402_5%
@R98
0_0402_5%
@
1
2
R1334 33_0402_5%
R1334 33_0402_5%
1 2
R119
10K_0402_5%
@R119
10K_0402_5%
@
1
2
R1327
0_0402_5% @R1327
0_0402_5% @
1 2
C163
10U_0805_10V6K~D
C163
10U_0805_10V6K~D
1
2
C155
0.1U_0402_16V4Z~D
C155
0.1U_0402_16V4Z~D
1
2
R124
10K_0402_5%
R124
10K_0402_5%
1
2
Y6
14.31818MHZ_16PF_DSX840GA
Y6
14.31818MHZ_16PF_DSX840GA
1
2
R109
10K_0402_5%
R109
10K_0402_5%
1
2
R132
10K_0402_5%
@R132
10K_0402_5%
@
1
2
Q10B
2N7002DW-T/R7_SOT363-6
Q10B
2N7002DW-T/R7_SOT363-6
3
5
4
R121
10K_0402_5%
R121
10K_0402_5%
1
2
C156
10U_0805_10V6K~D
@C156
10U_0805_10V6K~D
@
1
2
R137
33_0402_5%
R137
33_0402_5%
1 2
Q32
DTC124EK_SC59
Q32
DTC124EK_SC59
2
1
3
R141
1K_0402_1%
@R141
1K_0402_1%
@
1
2
C198
0.1U_0402_16V4Z~D
C198
0.1U_0402_16V4Z~D
1
2
R82
0_0402_5%
@R82
0_0402_5%
@
1
2
Q10A
2N7002DW-T/R7_SOT363-6
Q10A
2N7002DW-T/R7_SOT363-6
6 1
2
R81
470_0402_5%~D
R81
470_0402_5%~D
1
2
R94 0_0805_5%
R94 0_0805_5%
1 2
C392 10P_0402_50V8J~D
@
C392 10P_0402_50V8J~D
@
1 2
R139
10K_0402_5%
R139
10K_0402_5%
1
2
C153
0.1U_0402_16V4Z~D
C153
0.1U_0402_16V4Z~D
1
2
C200
0.1U_0402_16V4Z~D
C200
0.1U_0402_16V4Z~D
1
2
C197
0.1U_0402_16V4Z~D
C197
0.1U_0402_16V4Z~D
1
2
R86
1K_0402_1%
R86
1K_0402_1%
1
2
R101
33_0402_5%
R101
33_0402_5%
1 2
R117
10K_0402_5%
R117
10K_0402_5%
1
2
R110
10K_0402_5%
@R110
10K_0402_5%
@
1
2
R129
10K_0402_5%
R129
10K_0402_5%
1
2
R95
0_0402_5%
R95
0_0402_5%
1 2
C181
0.1U_0402_16V4Z~D
C181
0.1U_0402_16V4Z~D
1
2
C832
5P_0402_50V8C @C832
5P_0402_50V8C @
1
2
R78 0_0805_5%
R78 0_0805_5%
1 2
R100
10K_0402_5%
R100
10K_0402_5%
1
2
C169 22P_0402_50V8J
C169 22P_0402_50V8J
R111
10K_0402_5%
R111
10K_0402_5%
1
2
C182
0.1U_0402_16V4Z~D
@C182
0.1U_0402_16V4Z~D
@
1
2
C1013
10P_0402_50V8J~D
@
C1013
10P_0402_50V8J~D
@
1
2
C199
0.1U_0402_16V4Z~D
C199
0.1U_0402_16V4Z~D
1
2
C162 22P_0402_50V8J
C162 22P_0402_50V8J
C945
47P_0402_50V8J
@
C945
47P_0402_50V8J
@
1
2
R435
10K_0402_5%
R435
10K_0402_5%
1
2
C151
10U_0805_10V6K~D
C151
10U_0805_10V6K~D
1
2
R138
2.2K_0402_5%
R138
2.2K_0402_5%
1
2
C167
0.1U_0402_16V4Z~D
C167
0.1U_0402_16V4Z~D
1
2
C154
0.1U_0402_16V4Z~D
C154
0.1U_0402_16V4Z~D
1
2
R147
0_0402_5%
R147
0_0402_5%
1 2
WWW.AliSaler.Com
9. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDC-
USBN3
USBP3
PWR_SRC_ON
BKOFF#
BKOFF#
LVDC+
LCD_TST
USB20_TS_P
USB20_TS_N
LVDSAC-
LVDSAC+
USB20_P3 <12>
USB20_N3 <12>
EDID_CLK_LCD <5>
EDID_DAT_LCD <5>
LVDSA1+ <5>
LVDSA1- <5>
LVDSAC+ <5>
LVDSAC- <5>
INVT_PWM <19>
GMCH_LVDDEN
<5>
BKOFF#
<19>
MIC_CLK
<15>
MIC_DATA
<15>
LVDSA2-
<5>
LVDSA2+
<5>
LVDSA0-
<5>
LVDSA0+
<5>
LCD_TST <19>
USB20_P6_TS
<12>
USB20_N6_TS
<12>
INVPWR_B+ +3VS_LCD +VMIC
+3VS
+LCDVDD
+LCDVDD +5VALW
+CAM_VDD
+5VALW
+LCDVDD +LCDVDD_R +3VS +3VS_LCD +3VS +VMIC
+3VS
INVPWR_B+
B+
+CAM_VDD
+3VS
+LCDVDD_R
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
A
SCHEMATIC, MB A5732
9 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
401784
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
A
SCHEMATIC, MB A5732
9 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
401784
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
A
SCHEMATIC, MB A5732
9 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
401784
W=60mils
LCD POWER CIRCUIT
W=60mils
LCD/PANEL BD. Conn.
W=20mils
40mil
40mil
Change to SP02000MD00
2009-4-15
08/04
(TouchScreen)
07/17 BITS
(TouchScreen)
2009-08-13 modify
2009-08-17 modify
C397
0.1U_0402_16V4Z~D
C397
0.1U_0402_16V4Z~D
1
2
R44
0_0402_5%
R44
0_0402_5%
1 2
C85
68P_0402_50V8J~D
C85
68P_0402_50V8J~D
1
2
Q29A
2N7002DW-T/R7_SOT363-6
Q29A
2N7002DW-T/R7_SOT363-6
6
1
2
G
D
S
Q81
RHU002N06_SOT323-3~D
@
G
D
S
Q81
RHU002N06_SOT323-3~D
@
2
1 3
C647
0.1U_0402_16V4Z~D
C647
0.1U_0402_16V4Z~D
1
2
R46
0_0402_5%
R46
0_0402_5%
1 2
C45
0.1U_0402_16V4Z~D
C45
0.1U_0402_16V4Z~D
1
2
JP24
ACES_87242-4001-09
JP24
ACES_87242-4001-09
1 1
2
2
3 3
4
4
5 5
6
6
7 7
8
8
9 9
10
10
11 11
12
12
13 13
14
14
17 17
18
18
19 19
21 21
22
22
23 23
24
24
25 25
26
26
27 27
28
28
29 29
30
30
31 31
32
32
33 33
34
34
35 35
36
36
37 37
38
38
39 39
40
40
GMD 41
GND
42
15 15
20
20
16
16
R73
100K_0402_5%
R73
100K_0402_5%
1 2
R70
470_0805_5%
R70
470_0805_5%
1
2
R1168
0_0402_5%
@ R1168
0_0402_5%
@
1
2
C398
4.7U_0805_10V4Z~D
C398
4.7U_0805_10V4Z~D
C600
100P_0402_50V8J
C600
100P_0402_50V8J
1
2
L37
FBMA-L11-201209-221LMA30T_0805
L37
FBMA-L11-201209-221LMA30T_0805
1 2
R1027 0_0402_5%
R1027 0_0402_5%
1 2
C394
0.1U_0402_16V4Z~D
C394
0.1U_0402_16V4Z~D
1
2
C231
100P_0402_50V8J
C231
100P_0402_50V8J
1
2
R69
2.2K_0402_5%
R69
2.2K_0402_5%
1
2
S
G
D
Q80
SI3457BDV-T1-E3_TSOP6~D
@
S
G
D
Q80
SI3457BDV-T1-E3_TSOP6~D
@
3
6
2
4 5
1
L64
WCM2012F2S-900T04_0805
@
L64
WCM2012F2S-900T04_0805
@
1
1 2 2
3 3
4
4
C829
1000P_0402_50V7K~D
@C829
1000P_0402_50V7K~D
@
1
2
R35
0_0603_5%
R35
0_0603_5%
1 2
C233
100P_0402_50V8J
@
C233
100P_0402_50V8J
@
1
2
L18
FBMA-L11-201209-221LMA30T_0805
L18
FBMA-L11-201209-221LMA30T_0805
1
2
Q29B
2N7002DW-T/R7_SOT363-6
Q29B
2N7002DW-T/R7_SOT363-6
3
5
4
C830
0.1U_0603_50V4Z~D
@C830
0.1U_0603_50V4Z~D
@
1
2
R60
4.7K_0402_5%
R60
4.7K_0402_5%
1
2
C396
4.7U_0805_10V4Z~D
@C396
4.7U_0805_10V4Z~D
@
R65
2.2K_0402_5%
R65
2.2K_0402_5%
1
2
R72
100K_0402_5%
R72
100K_0402_5%
1
2
L21
FBMA-L11-201209-221LMA30T_0805
L21
FBMA-L11-201209-221LMA30T_0805
1 2
R1026 0_0402_5%
R1026 0_0402_5%
1
2
R1159 100K_0402_5%
@R1159 100K_0402_5%
@
1 2
C399
0.1U_0402_16V4Z~D
C399
0.1U_0402_16V4Z~D
1
2
L65
WCM2012F2S-900T04_0805
@
L65
WCM2012F2S-900T04_0805
@
1 1
2
2
3
3 4 4
R1158
100K_0402_5%
@R1158
100K_0402_5%
@
1
2
R63
1M_0402_5%
R63
1M_0402_5%
1
2
C230
100P_0402_50V8J
@
C230
100P_0402_50V8J
@
1
2
C395
1000P_0402_50V7K
C395
1000P_0402_50V7K
1
2
G
D
S Q3
AO3413_SOT23
G
D
S Q3
AO3413_SOT23
2
1
3
C232
100P_0402_50V8J
@
C232
100P_0402_50V8J
@
1
2
C393
0.1U_0603_25V7K
C393
0.1U_0603_25V7K
1
2
C229
100P_0402_50V8J
@
C229
100P_0402_50V8J
@ 1
2
R1169
0_0402_5%
@ R1169
0_0402_5%
@
1
2
L25
FBMA-L10-160808 301LMT_0603
L25
FBMA-L10-160808 301LMT_0603
1 2
L22
FBMA-L11-201209-221LMA30T_0805
L22
FBMA-L11-201209-221LMA30T_0805
1 2
WWW.AliSaler.Com
10. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PERR#
PCI_REQ1#
PCI_REQ2#
PCI_PLOCK#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
CLK_PCI_ICH
CLK_PCI_ICH
CLK_PCI_ICH
<8>
PCI_RST#
<19>
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
10 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
10 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
10 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
For EMI, close to TigerPoint
R1228
8.2K_0402_5% R1228
8.2K_0402_5%
R1245
8.2K_0402_5% R1245
8.2K_0402_5%
C955
22P_0402_50V8J
@
C955
22P_0402_50V8J
@
1
2
R1225
8.2K_0402_5% R1225
8.2K_0402_5%
R1221
8.2K_0402_5% R1221
8.2K_0402_5%
R1241
8.2K_0402_5% R1241
8.2K_0402_5%
R1234
10K_0402_5%
@
R1234
10K_0402_5%
@
R1235
8.2K_0402_5% R1235
8.2K_0402_5%
R1226
8.2K_0402_5% R1226
8.2K_0402_5%
R1227
8.2K_0402_5% R1227
8.2K_0402_5%
R1230
10K_0402_5% R1230
10K_0402_5%
R1233
10K_0402_5%
@
R1233
10K_0402_5%
@
R1222
8.2K_0402_5%
R1222
8.2K_0402_5%
R1238
8.2K_0402_5% R1238
8.2K_0402_5%
R1244
8.2K_0402_5% R1244
8.2K_0402_5%
R1243
10K_0402_5%
@
R1243
10K_0402_5%
@
R1322
0_0402_5%
R1322
0_0402_5%
1 2
R1229
8.2K_0402_5% R1229
8.2K_0402_5%
R1223
8.2K_0402_5% R1223
8.2K_0402_5%
R1240
8.2K_0402_5% R1240
8.2K_0402_5%
R1237
8.2K_0402_5% R1237
8.2K_0402_5%
R1232
33_0402_5%
@
R1232
33_0402_5%
@
1
2
R1154
100K_0402_5%
R1154
100K_0402_5%
1
2
PCI
TGP
1
U34A
TIGERPOINT_ES1_BGA360
PCI
TGP
1
U34A
TIGERPOINT_ES1_BGA360
PIRQH#/GPIO5
F8
PIRQG#/GPIO4
H8
PIRQF#/GPIO3
D6
PIRQE#/GPIO2
E8
PIRQD#
H10
PIRQC#
B3
PIRQB#
D7
PIRQA#
B2
GPIO1
C9
GPIO22
C15
RSVD02
M13
REQ2#
A20
REQ1#
G16
RSVD01
K9
GPIO17/STRAP2#
A2
GPIO48/STRAP1#
G14
STRAP0#
D11
GNT2#
E16
GNT1#
A18
FRAME#
A16
PERR#
D10
TRDY#
A10
PLOCK#
A8
STOP#
F14
SERR#
B11
PME#
C22
IRDY#
B7
PCIRST#
A23
PCICLK
J12
DEVSEL#
B15
PAR
A5
C/BE3# L16
C/BE2# C13
C/BE1# M15
C/BE0# H16
AD31 B1
AD30 C1
AD29 C7
AD28 D9
AD27 C8
AD26 H12
AD25 G12
AD24 A6
AD23 B5
AD22 A3
AD21 B8
AD20 L12
AD19 B13
AD18 B9
AD17 E12
AD16 C11
AD15 E10
AD14 J14
AD13 L14
AD12 H14
AD11 E14
AD10 A13
AD9 D15
AD8 D16
AD7 B19
AD6 B18
AD5 C19
AD4 B17
AD3 C18
AD2 C17
AD1 D18
AD0 B22
R1224
8.2K_0402_5% R1224
8.2K_0402_5%
R1239
8.2K_0402_5% R1239
8.2K_0402_5%
R1236
8.2K_0402_5% R1236
8.2K_0402_5%
R1242
8.2K_0402_5% R1242
8.2K_0402_5%
R1231
10K_0402_5% R1231
10K_0402_5%
R1220
8.2K_0402_5% R1220
8.2K_0402_5%
WWW.AliSaler.Com
11. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SERIRQ
H_INIT#
H_INTR
H_FERR#
H_NMI
KB_RST#
SERIRQ
H_SMI#
SATA_ITX_C_DRX_N0_R
H_STPCLK#
SATA_LED#
SATARBIAS
SATA_ITX_C_DRX_P0_R
GATEA20
SATA_LED#
H_A20M#
GATEA20
H_IGNNE#
H_STPCLK#
H_FERR#
H_IGNNE#
H_A20M#
H_NMI
H_INIT#
H_SMI#
H_INTR
H_FERR#
H_INIT# <5>
H_FERR# <5>
CLK_PCIE_SATA <8>
CLK_PCIE_SATA# <8>
GATEA20 <19>
SATA_IRX_DTX_P0 <17>
SATA_ITX_C_DRX_N0 <17>
SATA_IRX_DTX_N0 <17>
H_IGNNE# <5>
SATA_ITX_C_DRX_P0 <17>
H_NMI <5>
H_STPCLK# <5>
H_INTR <5>
KB_RST# <19>
H_THERMTRIP# <5>
SERIRQ <19>
H_A20M# <5>
H_SMI# <5>
SATA_LED# <21>
+3VS
+3VS
+VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
11 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
11 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
11 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
56 ohm±5% pull-up resistor has
to be within 1" from the Tiger
Point chipset.
ESD request
Close to TigerPoint
pin Y22
Close to TigerPoint
pin U16
C451 100P_0402_50V8J
@
C451 100P_0402_50V8J
@
1 2
C452 100P_0402_50V8J
@
C452 100P_0402_50V8J
@
1 2
C455 100P_0402_50V8J
@
C455 100P_0402_50V8J
@
1 2
R1246 24.9_0402_1%
R1246 24.9_0402_1%
R1248
10K_0402_5%
R1248
10K_0402_5%
R1247
10K_0402_5%
R1247
10K_0402_5%
C957
0.01U_0402_16V7K C957
0.01U_0402_16V7K
3
TGP
HOST
SATA
U34C
TIGERPOINT_ES1_BGA360
3
TGP
HOST
SATA
U34C
TIGERPOINT_ES1_BGA360
SATA0RXN AE6
SATA0RXP AD6
SATA0TXN AC7
SATA0TXP AD7
SATA1RXN AE8
SATA1RXP AD8
SATA1TXN AD9
SATA1TXP AC9
SATA_CLKN AD4
GPIO36
AD23
A20M# Y20
CPUSLP# Y21
IGNNE# Y18
INIT3_3V# AD21
INIT# AC25
INTR AB24
FERR# Y22
NMI T17
RCIN# AC21
SERIRQ AA16
SMI# AA21
STPCLK# V18
THRMTRIP# AA20
RSVD03
R12
RSVD04
AE20
RSVD05
AD17
RSVD06
AC15
RSVD07
AD18
RSVD08
Y12
RSVD09
AA10
RSVD10
AA12
RSVD11
Y10
RSVD12
AD15
RSVD13
W10
RSVD14
V12
RSVD15
AE21
RSVD16
AE18
RSVD17
AD19
RSVD18
U12
RSVD19
AC17
RSVD20
AB13
RSVD21
AC13
RSVD22
AB15
RSVD23
Y14
RSVD24
AB16
RSVD25
AE24
RSVD26
AE23
RSVD27
AA14
RSVD28
V14
RSVD29
AD16
SATA_CLKP AC4
SATARBIAS# AD11
SATARBIAS AC11
SATALED# AD25
RSVD31
AB10
A20GATE U16
RSVD30
AB11
C450 100P_0402_50V8J
@
C450 100P_0402_50V8J
@
1 2
C453 100P_0402_50V8J
@
C453 100P_0402_50V8J
@
1 2
C454 100P_0402_50V8J
@
C454 100P_0402_50V8J
@
1 2
R198
56_0402_5%
R198
56_0402_5%
R1250 8.2K_0402_5%
R1250 8.2K_0402_5%
C456 100P_0402_50V8J
@
C456 100P_0402_50V8J
@
1 2
R1251
56_0402_5%
R1251
56_0402_5%
1
2
C956
0.01U_0402_16V7K C956
0.01U_0402_16V7K
R1249
10K_0402_5%
R1249
10K_0402_5%
C457 100P_0402_50V8J
@
C457 100P_0402_50V8J
@
1 2
WWW.AliSaler.Com
12. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PWRGD
H_DPRSTP#
H_DPSLP#
T_PWROK
PLTRST#
PCIE_ITX_C_PRX_P2_R
PCIE_ITX_C_PRX_N2_R
USBRBIAS
RTCRST#
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
SMLINK0
SMLINK1
RTCX1
RTCX2
INTRUDER#
INTRUDER#
PM_BATT_LOW#
PM_BATT_LOW#
PM_CLKRUN#
MCH_SYNC#
MCH_SYNC#
PBTN_OUT#
T_PWROK
ICH_RI#
EC_RSMRST#R
EC_RSMRST#R
SYS_RST#
EC_THERM#
VGATE
INTVRMEN
ICH_PCIE_WAKE#
ICH_PCIE_WAKE#
SYS_RST#
ICH_RI#
SMBALERT#
INTVRMEN
SB_SPKR
EC_SMI#
EC_SCI#
EC_LID_OUT#
ACIN_C
ACIN_C ACIN
SLPIOVR#
GPIO12
GPIO14
GPIO15
GPIO38
GPIO39
SLPIOVR#
GPIO38
GPIO39
GPIO0
GPIO0
GPIO6
GPIO6
T_PWROK VGATE
PCIE_ITX_C_PRX_P3_R
PCIE_ITX_C_PRX_N3_R
PM_CLKRUN#
GPIO12
GPIO14
GPIO15
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
ICH_SMBCLK
RTCX1
ICH_SMBDATA
SMLINK1
LINKALERT#
RTCX2
SMBALERT#
RTCRST#
SMLINK0
CLK_ICH_48M
EC_RSMRST#R
EC_LID_OUT#
USB_OC#1
USB_OC#2
USB_OC#0
USB_OC#5
USB_OC#7
USB_OC#4
USB_OC#6
USB_OC#3
PCIE_ITX_C_PRX_P1_R
PCIE_ITX_C_PRX_N1_R
PCIE_ITX_C_PRX_P4_R
PCIE_ITX_C_PRX_N4_R
USB20_P6_TS
USB20_N6
USB20_P6
USB20_N6_TS
H_PWRGD <4,5>
H_DPRSTP# <5>
H_DPSLP# <5>
PLTRST# <4,5,14,18,19>
PCIE_PTX_IRX_N2
<14>
PCIE_PTX_IRX_P2
<14>
PCIE_PTX_IRX_N3
<14>
PCIE_PTX_IRX_P3
<14>
PCIE_ITX_C_PRX_P3
<14>
PCIE_ITX_C_PRX_N3
<14>
PCIE_ITX_C_PRX_P2
<14>
PCIE_ITX_C_PRX_N2
<14>
CLK_PCIE_ICH#
<8>
CLK_PCIE_ICH
<8>
USB20_N0 <21>
USB20_P0 <21>
USB20_N1 <21>
USB20_P1 <21>
USB20_N2 <21>
USB20_P2 <21>
USB20_N3 <9>
USB20_P3 <9>
USB20_N7 <21>
USB20_P7 <21>
PM_SLP_S3# <19>
PM_SLP_S5# <19>
PM_SLP_S4# <19>
PM_DPRSLPVR <5>
PBTN_OUT# <19>
H_STP_PCI# <8>
H_STP_CPU# <8>
EC_THERM# <19>
ICH_PCIE_WAKE# <14>
CLK_ICH_48M <8>
SB_SPKR <15>
USB20_N4 <14>
USB20_P4 <14>
USB20_N5 <14>
USB20_P5 <14>
EC_SMI# <19>
EC_SCI# <19>
EC_LID_OUT# <19>
ACIN <19,24>
USB20_N6 <14>
USB20_P6 <14>
VGATE <5,8,19,29>
PCH_POK <5,19>
ICH_SMBCLK
<8>
ICH_SMBDATA
<8>
LPC_FRAME#
<19>
LPC_AD3
<19>
CLK_ICH_14M
<8>
LPC_AD2
<19>
LPC_AD1
<19>
LPC_AD0
<19>
HDA_BITCLK_AUDIO
<15>
HDA_RST_AUDIO#
<15>
HDA_SDIN0
<15>
HDA_SDOUT_AUDIO
<15>
HDA_SYNC_AUDIO
<15>
SLPIOVR# <4>
EC_RSMRST#
<19>
DMI_TX0
<4>
DMI_TX#0
<4>
DMI_RX0
<4>
DMI_RX#0
<4>
DMI_TX1
<4>
DMI_TX#1
<4>
DMI_RX1
<4>
DMI_RX#1
<4>
PCIE_PTX_IRX_N1
<18>
PCIE_PTX_IRX_P1
<18>
PCIE_ITX_C_PRX_P1
<18>
PCIE_ITX_C_PRX_N1
<18>
PCIE_PTX_IRX_P4
<14>
PCIE_ITX_C_PRX_P4
<14>
PCIE_PTX_IRX_N4
<14>
PCIE_ITX_C_PRX_N4
<14>
USB20_N6_TS <9>
USB20_P6_TS <9>
USB_OC#0 <21>
USB_OC#1 <21>
USB_OC#2 <21>
+1.5VS
+RTCBATT
+3VALW
+3VS
+RTCBATT
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
12 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
12 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
12 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
For EMI, Close to TigerPoint
For EMI, Close to TigerPoint
PCIE Port List
1
2
3
4
WLAN
LAN
USB Port List
0
1
2
3
4
5
6
7
USB1(Right)
WWAN
USB3(Left)
Routing the trace at least 10mil
Camera
CardReader
USB2(Left)
BT
WLAN
RSMRST circuit
2009-5-27
0612 update netname
WWAN
Broadcom
08/10
(TouchScreen)
2009-08-13 modify
2009-08-13 modify
2009-08-13 modify
2009-08-13 modify
2009-08-24 modify
2009-08-24 modify
C999 0.1U_0402_10V7K
C999 0.1U_0402_10V7K
C962 0.1U_0402_10V7K
C962 0.1U_0402_10V7K
D53 RB751V_SOD323
D53 RB751V_SOD323
2 1
D54B
BAV99DW-7_SOT363
@
D54B
BAV99DW-7_SOT363
@
4
5
3
C997 0.1U_0402_10V7K
C997 0.1U_0402_10V7K
R1263 0_0402_5%
R1263 0_0402_5%
1
2
C964
22P_0402_50V8J
@
C964
22P_0402_50V8J
@
1
2
R1264
33_0402_5% R1264
33_0402_5% 1 2
R1299
8.2K_0402_5% R1299
8.2K_0402_5%
R1300
8.2K_0402_5% R1300
8.2K_0402_5%
C
B
E
Q82
MMBT3906_SOT23-3
@
C
B
E
Q82
MMBT3906_SOT23-3
@
1
2
3
R1262
33_0402_5% R1262
33_0402_5% 1 2
R1274
2.2K_0402_5% R1274
2.2K_0402_5% 1 2
C960 0.1U_0402_10V7K
C960 0.1U_0402_10V7K
D54A
BAV99DW-7_SOT363
@
D54A
BAV99DW-7_SOT363
@
1
2
6
R1278
0_0402_5%
@
R1278
0_0402_5%
@
1 2
R1307
20K_0402_5%
R1307
20K_0402_5%
1 2
R1292
8.2K_0402_5% R1292
8.2K_0402_5%
R1268
33_0402_5%
@
R1268
33_0402_5%
@
1
2
C959
22P_0402_50V8J
@ C959
22P_0402_50V8J
@
1
2
R88
0_0402_5%
@R88
0_0402_5%
@
1 2
R1281
8.2K_0402_5% R1281
8.2K_0402_5% R1283
0_0402_5%
R1283
0_0402_5%
1 2
R1276
10K_0402_5% R1276
10K_0402_5% 1
2
Y5
32.768K_1TJS125BJ4A421P
Y5
32.768K_1TJS125BJ4A421P
OUT 4
IN 1
NC
3
NC
2
R1301
8.2K_0402_5% R1301
8.2K_0402_5%
2
TGP
USB
DMI
PCI-E
U34B
TIGERPOINT_ES1_BGA360
2
TGP
USB
DMI
PCI-E
U34B
TIGERPOINT_ES1_BGA360
DMI3RXN
V21
USBP0N H7
USBP0P H6
USBP1N H3
USBP1P H2
USBP2N J2
USBP2P J3
USBP3N K6
USBP3P K5
USBP4N K1
USBP4P K2
USBP5N L2
USBP5P L3
USBP6N M6
USBP6P M5
USBP7N N1
USBP7P N2
OC7#/GPIO31 C3
USBRBIAS G2
USBRBIAS# G3
CLK48 F4
DMI0RXN
R23
DMI0RXP
R24
DMI0TXN
P21
DMI0TXP
P20
DMI1RXN
T21
DMI1RXP
T20
DMI2RXP
T18
DMI2TXP
U24
DMI3RXP
V20
DMI3TXN
V24
DMI3TXP
V23
PERN1
K21
PERP1
K22
PETN1
J23
PETP1
J24
PERN2
M18
PERP2
M19
PETN2
K24
PETP2
K25
PERN3
L23
PERP3
L24
PETN3
L22
PETP3
M21
PERN4
P17
PERP4
P18
PETN4
N25
PETP4
N24
DMI_ZCOMP
H24
DMI_IRCOMP
J22
DMI_CLKN
W23
DMI_CLKP
W24
OC6#/GPIO30 C2
OC5#/GPIO29 E6
OC4# E5
OC1# C5
OC3# D2
OC2# D3
OC0# D4
DMI2RXN
T19
DMI1TXP
T25
DMI1TXN
T24
DMI2TXN
U23
R1296
8.2K_0402_5% R1296
8.2K_0402_5%
R1298
0_0402_5%
R1298
0_0402_5%
1 2
R1269 24.9_0402_1%
R1269 24.9_0402_1%
1 2
T42
T42
R247
10K_0402_5%
R247
10K_0402_5%
1 2
C416
10P_0402_50V8J~D
@
C416
10P_0402_50V8J~D
@
1
2
R1302
1M_0402_5%
R1302
1M_0402_5%
1 2
R1267
22.6_0402_1%
R1267
22.6_0402_1%
R1285
10K_0402_5% R1285
10K_0402_5% 1
2
R1290
10K_0402_5%
R1290
10K_0402_5%
1
2
R1265
1K_0402_1%
R1265
1K_0402_1%
1 2
R1294
8.2K_0402_5% R1294
8.2K_0402_5%
R1280
10K_0402_5% R1280
10K_0402_5% 1
2
R93
0_0402_5%
@R93
0_0402_5%
@
1 2
R1282
10K_0402_5% R1282
10K_0402_5% 1
2
R1308
2.2K_0402_5%
@
R1308
2.2K_0402_5%
@
1 2
R1303
8.2K_0402_5% R1303
8.2K_0402_5%
J9
3MM
@
J9
3MM
@
2
1
R1275
10K_0402_5% R1275
10K_0402_5% 1
2
C963 0.1U_0402_10V7K
C963 0.1U_0402_10V7K
R1304 4.7K_0402_5%
@
R1304 4.7K_0402_5%
@
1 2
R1309
10M_0402_5%
R1309
10M_0402_5%
1
2
R1295
8.2K_0402_5% R1295
8.2K_0402_5%
C966
1U_0603_10V4Z
C966
1U_0603_10V4Z
1 2
C967
15P_0402_50V8J
C967
15P_0402_50V8J
1
2
R1261
33_0402_5% R1261
33_0402_5% 1 2
R1306
2.2K_0402_5%
@
R1306
2.2K_0402_5%
@
1
2
R1266
33_0402_5%
@
R1266
33_0402_5%
@
1
2
R1273
2.2K_0402_5% R1273
2.2K_0402_5% 1 2
C965
15P_0402_50V8J
C965
15P_0402_50V8J
1
2
R1284
1K_0402_1% R1284
1K_0402_1% 1 2
C998 0.1U_0402_10V7K
C998 0.1U_0402_10V7K
R1287
10K_0402_5% R1287
10K_0402_5% 1
2
R1277
10K_0402_5% R1277
10K_0402_5% 1
2
R1293
8.2K_0402_5% R1293
8.2K_0402_5%
R1305
332K_0402_1%
R1305
332K_0402_1%
1 2
R1289
10K_0402_5% R1289
10K_0402_5% 1
2
R1286
8.2K_0402_5% R1286
8.2K_0402_5%
EPROM
TGP
MISC
RTC
SMB
SPI
LPC
AUDIO
LAN
U34D
TIGERPOINT_ES1_BGA360
EPROM
TGP
MISC
RTC
SMB
SPI
LPC
AUDIO
LAN
U34D
TIGERPOINT_ES1_BGA360
DPRSTP# AB23
DPSLP# AA18
RSVD31 F20
GPIO8 K18
GPIO9 H19
GPIO10 M17
GPIO12 A24
GPIO13 C23
GPIO14 P5
GPIO15 E24
DPRSLPVR AB20
STP_PCI# Y16
STP_CPU# AB19
GPIO24 R3
GPIO25 C24
GPIO26 D19
GPIO27 D20
GPIO28 F22
CLKRUN# AC19
GPIO33 U14
GPIO34 AC1
GPIO38 AC23
GPIO39 AC24
CPUPWRGD/GPIO49 AB22
THRM# AB17
VRMPWRGD V16
MCH_SYNC# AC18
PWRBTN# E21
RI# H23
SUS_STAT#/LPCPD# G22
SUSCLK D22
SYS_RESET# G18
PLTRST# G23
WAKE# C25
INTRUDER# T8
PWROK U10
RSMRST# AC3
INTVRMEN AD3
SPKR J16
SLP_S3# H20
SLP_S4# E25
SLP_S5# F21
BATLOW# B25
LDRQ1#/GPIO23
AA5
LAD0/FWH0
V6
LAD1/FWH1
AA6
LAD2/FWH2
Y5
LAD3/FWH3
W8
LFRAME#/FWH4
Y4
HDA_RST#
U2
HDA_SDIN0
W2
HDA_SDIN1
V2
HDA_SDIN2
P8
HDA_SDOUT
AA1
HDA_SYNC
Y1
CLK14
AA3
EE_CS
U3
EE_DIN
AE2
EE_DOUT
T6
EE_SHCLK
V3
LAN_CLK
T4
LANR_RSTSYNC
P7
LAN_RST#
B23
LAN_RXD0
AA2
LAN_RXD1
AD1
LAN_RXD2
AC2
LAN_TXD0
W3
LAN_TXD1
T7
LAN_TXD2
U4
RTCX1
W4
RTCX2
V5
RTCRST#
T5
SMBALERT#/GPIO11
E20
SMBCLK
H18
SMBDATA
E23
LINKALERT#
H21
SMLINK0
F25
SMLINK1
F24
SPI_MISO
R2
SPI_MOSI
T1
SPI_CS#
M8
SPI_CLK
P9
SPI_ARB
R4
GPIO6 W16
GPIO7 W14
BMBUSY#/GPIO0 T15
HDA_BIT_CLK
P6
LDRQ0#
Y8
R1259
33_0402_5% R1259
33_0402_5% 1 2
R249
10K_0402_5%
R249
10K_0402_5%
1 2
T43
T43
C996 0.1U_0402_10V7K
C996 0.1U_0402_10V7K
R248
10K_0402_5%
R248
10K_0402_5%
1 2
C961 0.1U_0402_10V7K
C961 0.1U_0402_10V7K
R1288
8.2K_0402_5% R1288
8.2K_0402_5%
R1260
33_0402_5% R1260
33_0402_5% 1 2
R1291
0_0402_5%
@
R1291
0_0402_5%
@
1
2
WWW.AliSaler.Com
13. WWW.AliSaler.Com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V5REF_SUS
+V5REF_RUN
+V5REF_SUS
+V5REF_RUN
+DMIPLL
+DMIPLL
+SATAPLL
+SATAPLL
+3VS
+5VS
+3VALW
+5VALW
+RTCBATT
+3VALW
+3VS
+VCCP
+1.5VS
+VCCP
+1.5VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
13 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
13 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
13 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Place closely pin Y25 within 100mlis.
Place closely pin Y6 within 100mlis.
10mA
14mA
1.3A
0.98A
0.29A
0.13A
2009-6-24
2009-6-24
2009-6-24
C985
1U_0603_10V4Z
C985
1U_0603_10V4Z
1
2
C975
1U_0603_10V4Z
C975
1U_0603_10V4Z
1
2
C980
1U_0603_10V4Z
C980
1U_0603_10V4Z
1
2
C976
10U_0805_10V6K~D
C976
10U_0805_10V6K~D
1
2
C970
0.1U_0402_10V6K
C970
0.1U_0402_10V6K
1
2
D56
RB751V-40TE17_SOD323-2
D56
RB751V-40TE17_SOD323-2
1
2
C986
1U_0603_10V4Z
C986
1U_0603_10V4Z
1
2
C43
0.01U_0402_16V7K
C43
0.01U_0402_16V7K
1
2
C992
4.7U_0603_6.3V6K~D
C992
4.7U_0603_6.3V6K~D
1
2
C994
0.1U_0402_25V4Z~D
C994
0.1U_0402_25V4Z~D
1
2
C971
0.1U_0402_10V6K
C971
0.1U_0402_10V6K
1
2
C983
0.1U_0402_10V6K
C983
0.1U_0402_10V6K
1
2
R1310
100_0402_5%
R1310
100_0402_5%
1
2
R1312
0_0805_5%
R1312
0_0805_5%
1 2
C987
0.1U_0402_10V6K
C987
0.1U_0402_10V6K
1
2
C984
1U_0603_10V4Z
C984
1U_0603_10V4Z
1
2
POWER
TGP
5
U34E
TIGERPOINT_ES1_BGA360
POWER
TGP
5
U34E
TIGERPOINT_ES1_BGA360
VCC1_5_2 M9
VCC1_5_3 M20
VCC1_5_4 N22
VCC1_05_4 V10
V_CPU_IO W18
VCC1_5_1 AA8
VCCSUS3_3_4 F1
VCCSUS3_3_3 K7
VCCSUS3_3_2 N4
VCCSUS3_3_1 F18
VCC3_3_6 T9
VCC3_3_5 R10
VCC3_3_4 G10
VCC3_3_3 F10
VCC3_3_2 AD13
VCC3_3_1 H25
VCC1_05_3 P15
VCC1_05_2 K17
VCC1_05_1 J10
VCCUSBPLL F6
VCCDMIPLL Y25
VCCRTC AE3
VCCSATAPLL Y6
VCC5REF_SUS F5
VCC5REF F12
C988
1U_0603_25V6-K~D
C988
1U_0603_25V6-K~D
1
2
R1311
10_0402_5%
R1311
10_0402_5%
1
2
C990
10U_0805_10V6K~D
C990
10U_0805_10V6K~D
1
2
C982
0.1U_0402_10V6K
C982
0.1U_0402_10V6K
1
2
C979
1U_0603_10V4Z
C979
1U_0603_10V4Z
1
2
R1313
0_0805_5%
R1313
0_0805_5%
1 2
C974
1U_0603_10V4Z
C974
1U_0603_10V4Z
1
2
C989
1U_0603_25V6-K~D
C989
1U_0603_25V6-K~D
1
2
D55
RB751V-40TE17_SOD323-2
D55
RB751V-40TE17_SOD323-2
1
2
C978
0.1U_0402_10V6K
C978
0.1U_0402_10V6K
1
2
C977
0.1U_0402_10V6K
C977
0.1U_0402_10V6K
1
2
C981
10U_0805_10V6K~D
C981
10U_0805_10V6K~D
1
2
C991
0.01U_0402_16V7K
C991
0.01U_0402_16V7K
1
2
C968
1U_0603_10V4Z
C968
1U_0603_10V4Z
1
2
C972
0.1U_0402_25V4Z~D
C972
0.1U_0402_25V4Z~D
1
2
TGP
U34F
TIGERPOINT_ES1_BGA360
TGP
U34F
TIGERPOINT_ES1_BGA360
VSS59 F2
VSS58 AE13
VSS57 G24
VSS56 AE25
VSS55 AE10
VSS54 AE1
VSS53 AD24
VSS52 AD20
VSS51 AD10
VSS50 AD2
VSS49 AC8
VSS48 AB8
VSS47 AB7
VSS46 AB6
VSS45 AB4
VSS44 Y24
VSS43 Y2
VSS42 W22
VSS41 W12
VSS40 V25
VSS39 V22
VSS38 V19
VSS37 V8
VSS36 V7
VSS35 V1
VSS34 T22
VSS33 T2
VSS32 R22
VSS31 R14
VSS30 P19
VSS29 P13
VSS28 P11
VSS27 N23
VSS26 N14
VSS25 N13
VSS24 N12
VSS23 N3
VSS22 M11
VSS21 M7
VSS20 L4
VSS19 K20
VSS18 K19
VSS17 K11
VSS16 K8
VSS15 K4
VSS14 H5
VSS13 H4
VSS12 H1
VSS11 G8
VSS10 G4
VSS09 F16
VSS08 E18
VSS07 B24
VSS06 B20
VSS05 B16
VSS04 B10
VSS03 B6
VSS02 A25
VSS01 A1
RSVD32 AE16
C993
10U_0805_10V6K~D
C993
10U_0805_10V6K~D
1
2
C973
0.1U_0402_25V4Z~D
C973
0.1U_0402_25V4Z~D
1
2
WWW.AliSaler.Com
14. WWW.AliSaler.Com
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
WLAN_CLKREQ#
EC_TX
WLAN_ACTIVE
BT_ACTIVE#
EC_RX
ICH_PCIE_WAKE# +3VS_WLAN
WL_OFF#
PLTRST#
USB20_WLAN_N
USB20_WLAN_P
EC_TX
EC_RX
+3VS_WWAN
PLTRST#
UICC_VPP
UICC_RESET
UICC_DATA
UICC_CLK
CLK_PCIE_WWAN
CLK_PCIE_WWAN#
WWAN_REQ#11
PCIE_PTX_IRX_N3 PCIE_C_RXN3
PCIE_PTX_IRX_P3 PCIE_C_RXP3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
PLTRST#
MCP_CLKREQ#
UICC_DATA
UICC_VPP
UICC_CLK
UICC_RESET
BT_ACTIVE#
WLAN_ACTIVE
USB20_P5
USB20_N5
BT_DET
BT_OFF#
BT_RADIO_OFF#
PLTRST# <4,5,12,18,19>
CLK_PCIE_WLAN
<8>
PCIE_PTX_IRX_P2
<12>
PCIE_PTX_IRX_N2
<12>
PCIE_ITX_C_PRX_N2
<12>
PCIE_ITX_C_PRX_P2
<12>
ICH_PCIE_WAKE#
<12>
WLAN_CLKREQ#
<8>
CLK_PCIE_WLAN#
<8>
WL_OFF# <19>
EC_RX
<19>
EC_TX
<19>
USB20_N6 <12>
USB20_P6 <12>
3G_OFF# <19>
USB20_N4 <12>
USB20_P4 <12>
EC_SWI#
<19>
WWAN_REQ#11
<8>
CLK_PCIE_WWAN
<8>
CLK_PCIE_WWAN#
<8>
PCIE_PTX_IRX_N3
<12>
PCIE_PTX_IRX_P3
<12>
PCIE_ITX_C_PRX_N3
<12>
PCIE_ITX_C_PRX_P3
<12>
PLTRST# <4,5,12,18,19>
CLK_PCIE_MCP
<8>
MCP_CLKREQ#
<8>
CLK_PCIE_MCP#
<8>
PCIE_PTX_IRX_P4
<12>
PCIE_ITX_C_PRX_P4
<12>
PCIE_ITX_C_PRX_N4
<12>
PCIE_PTX_IRX_N4
<12>
USB20_N5 <12>
USB20_P5 <12>
BT_OFF#
<19>
BT_RADIO_OFF#
<19>
BT_DET
<19>
+3VS
+3VS_WLAN
+3VS_WLAN
+3VS
+1.5VS
+1.5VS
+3VALW
+UICC_PWR
+3VS_WWAN
+3VS
+3VS_WWAN
+3VS_WWAN
+1.5VS
+3VS +1.5VS
+3VS
+3VS
+3VS
+UICC_PWR
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
14 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
14 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
14 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Mini-Express Card for WLAN
Mini-Express Card for WWAN
W=120mils
Mini-Express Card for Broadcom MCP
(MAX=200mA)
BlueTooth Interface
SIM Interface
2009-08-24 modify
C113
0.01U_0402_25V7K~D
C113
0.01U_0402_25V7K~D
1
2
C905
47P_0402_50V8J
C905
47P_0402_50V8J
1
2
R83 0_0402_5%
R83 0_0402_5%
1 2
C904
47P_0402_50V8J
C904
47P_0402_50V8J
1
2
JP73
ACES_87036-1001-CP
JP73
ACES_87036-1001-CP
9
9
10
10
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
GND
11
GND
12
C222
0.1U_0402_16V4Z~D C222
0.1U_0402_16V4Z~D
1 2
R1167 0_0402_5%
R1167 0_0402_5%
1 2
C413
0.1U_0402_16V4Z~D
C413
0.1U_0402_16V4Z~D
1 2
JP57
ACES_88910-5204
JP57
ACES_88910-5204
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
R85 0_0402_5%
R85 0_0402_5%
1 2
C412
0.1U_0402_16V4Z~D
C412
0.1U_0402_16V4Z~D
1
2
J5
JUMP_43X39
J5
JUMP_43X39
1
1 2 2
C185
4.7U_0805_10V4Z~D
C185
4.7U_0805_10V4Z~D
R406 0_0402_5%
R406 0_0402_5%
1 2
C118
0.1U_0402_16V4Z~D
C118
0.1U_0402_16V4Z~D
1
2
JP54
ACES_88910-5204
JP54
ACES_88910-5204
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
R114 0_0402_5%
R114 0_0402_5%
1 2
R87 0_0402_5%
R87 0_0402_5%
1 2
R348 0_0402_5%
@R348 0_0402_5%
@
1 2
C401
4.7U_0805_10V4Z~D
C401
4.7U_0805_10V4Z~D
R115 0_0402_5%
R115 0_0402_5%
1 2
C411
0.1U_0402_16V4Z~D
C411
0.1U_0402_16V4Z~D
1
2
C121
4.7U_0805_10V4Z~D
C121
4.7U_0805_10V4Z~D
R1166 0_0402_5%
R1166 0_0402_5%
1 2
R407 0_0402_5%
R407 0_0402_5%
1 2
C196
4.7U_0805_10V4Z~D
C196
4.7U_0805_10V4Z~D
R1350
0_1206_5%
R1350
0_1206_5%
1 2
C186
0.1U_0402_16V4Z~D
C186
0.1U_0402_16V4Z~D
1
2
R135 0_0402_5%
@R135 0_0402_5%
@ 1 2
C195
4.7U_0805_10V4Z~D
C195
4.7U_0805_10V4Z~D
JP56
ACES_88910-5204
JP56
ACES_88910-5204
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
R116 0_0402_5%
R116 0_0402_5%
1 2
R14
0_0402_5%
R14
0_0402_5%
1 2
C903
47P_0402_50V8J
C903
47P_0402_50V8J
1
2
C224
0.1U_0402_16V4Z~D C224
0.1U_0402_16V4Z~D
1 2
JP22
ACES_91016-01441
JP22
ACES_91016-01441
1
1 2 2
3
3 4 4
5
5 6 6
7
7 8 8
9
9 10 10
GND
15 GND 16
11
11 12 12
13
13 14 14
C409
4.7U_0805_10V4Z~D
C409
4.7U_0805_10V4Z~D
R62 0_0805_5%
R62 0_0805_5%
1 2
R118 0_0402_5%
R118 0_0402_5%
1 2
C98
0.1U_0402_16V4Z~D
C98
0.1U_0402_16V4Z~D
1
2
C106
0.1U_0402_16V4Z~D
C106
0.1U_0402_16V4Z~D
1
2
C135
0.01U_0402_25V7K
C135
0.01U_0402_25V7K
1
2
WWW.AliSaler.Com
15. WWW.AliSaler.Com
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HP_L
C_LINE_OUTL LINE_OUTL
LINE_OUTR
C_LINE_OUTR
ACZ_JDREF
HP_R
ACZ_VREF
MONO_IN
EAPD
ACZ_JDREF
ACZ_VREF
MONO_IN1 MONO_IN
LINE_OUTR
LINE_OUTL
JACK_PLUG_HP
<16>
JACK_PLUG_MIC
<16>
HDA_RST_AUDIO#
<12>
HDA_SDIN0 <12>
HDA_SYNC_AUDIO
<12>
HDA_SDOUT_AUDIO
<12>
MIC1_R
<16>
MIC1_L
<16>
MIC_DATA
<9>
EAPD
<19>
LINE_OUTL <16>
LINE_OUTR <16>
HP_R <16>
HP_L <16>
HDA_BITCLK_AUDIO <12>
MIC_CLK <9>
BEEP#
<19>
SB_SPKR
<12>
+AVDD_AC97
+VDDA +3VS
+VDDC
+MIC1_VREFO
+MIC1_VREFO
+MIC1_VREFO
+5VS +5VAMP +VDDA
+VDDA +VDDA
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
15 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
15 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
15 33
Wednesday, September 16, 2009
2009/03/25 2009/06/22
Compal Electronics, Inc.
40mil 20mil
DGND AGND
DGND AGND
HD Audio Codec
Close to codec
X5R for audio
performance considering
10mil
10mil
60mil 4.75V for LDO pop
(output = 150 mA)
40mil
Need to create symbol and footprint for Codec VA2
C373
2.2U_0603_6.3V6K~D
C373
2.2U_0603_6.3V6K~D
1
2
R79 0_0603_5%
R79 0_0603_5%
1 2
C403
0.1U_0402_16V4Z~D
C403
0.1U_0402_16V4Z~D
1
2
C387
2.2U_0603_6.3V6K~D
C387
2.2U_0603_6.3V6K~D
1
2
C
B
E
Q13
2SC2411KT146_SOT23-3
C
B
E
Q13
2SC2411KT146_SOT23-3
1
2
3
C220
1U_0603_10V4Z
C220
1U_0603_10V4Z
1
2
C374
2.2U_0603_6.3V6K~D
C374
2.2U_0603_6.3V6K~D
1
2
R92
20K_0402_1%
R92
20K_0402_1%
1
2
R313 0_0603_5%
R313 0_0603_5%
1 2
C400 10P_0402_50V8J~D
@C400 10P_0402_50V8J~D
@
1 2
C170
0.1U_0402_16V4Z~D
C170
0.1U_0402_16V4Z~D
1
2
R149
10K_0402_5%
R149
10K_0402_5%
1
2
U20
APL5151-475BC-TRL_SOT23-5
@U20
APL5151-475BC-TRL_SOT23-5
@
IN
1
GND
2
SHDN
3
OUT 5
BYP 4
C376
2.2U_0603_6.3V6K~D
C376
2.2U_0603_6.3V6K~D
1
2
R133 39_0402_5%
R133 39_0402_5%
1 2
C402
0.1U_0402_16V4Z~D
C402
0.1U_0402_16V4Z~D
1
2
C833 680P_0402_50V7K~D
C833 680P_0402_50V7K~D
C216
1U_0603_10V4Z
C216
1U_0603_10V4Z
1
2
C226
0.1U_0402_16V4Z~D
@C226
0.1U_0402_16V4Z~D
@
1
2
C406
1U_0603_10V4Z
C406
1U_0603_10V4Z
1
2
L23
FBMA-L11-160808-800LMT_0603
L23
FBMA-L11-160808-800LMT_0603
1 2
R1161
10K_0402_5%
@R1161
10K_0402_5%
@
1
2
R535
4.7K_0402_5%
R535
4.7K_0402_5%
1
2
C183
0.1U_0402_16V4Z~D
C183
0.1U_0402_16V4Z~D
1
2
L15
FBMA-L11-201209-221LMA30T_0805
L15
FBMA-L11-201209-221LMA30T_0805
1 2
C188
10U_0805_10V6K~D
C188
10U_0805_10V6K~D
1
2
R310 5.1K_0402_1%~D
R310 5.1K_0402_1%~D
1 2
C213 680P_0402_50V7K~D
C213 680P_0402_50V7K~D
U23
ALC272-GR_LQFP48
U23
ALC272-GR_LQFP48
LINE2_L
14
LINE2_R
15
MIC2_R
17
MIC2_L
16
LINE1_L
23
LINE1_R
24
LINE1_VREFO
18
LINE2_VREFO
20
MIC2_VREFO
19
MIC1_L
21
MIC1_R
22
SENSE A
13
PCBEEP_IN
12
LOUT1_L 35
LOUT_R 36
MONO_OUT 37
RESET#
11
SYNC
10
BITCLK 6
SDATA_OUT
5
SDATA_IN 8
GPIO0/DMIC_DATA1/2
2
GPIO1/DMIC_DATA3/4
3
CBP 29
CBN 30
MIC1_VREFO 28
VREF 27
DVDD
1
DVDD_IO
9
AVDD1
25
AVDD2
38
HPOUT_R 32
DMIC_CLK1/2 46
EAPD
47
SPDIFO1
48
DVSS1
4
DVSS2
7
CPVEE 31
HPOUT_L 33
SENSE B
34
NC 43
DMIC_CLK3/4 44
SPDIFO2 45
JDREF 40
AVSS1 26
AVSS2 42
LOUT2_L 39
LOUT2_R 41
R25
75_0402_1%
R25
75_0402_1%
1 2
L24
FBMA-L11-160808-800LMT_0603
L24
FBMA-L11-160808-800LMT_0603
1 2
C408
1U_0603_10V4Z
C408
1U_0603_10V4Z
1
2
C173 1U_0603_10V4Z
C173 1U_0603_10V4Z
1 2
R153 20K_0402_5%
R153 20K_0402_5%
1 2
R331 1K_0402_1%
R331 1K_0402_1%
1 2
C404
10U_0805_10V6K~D
C404
10U_0805_10V6K~D
1
2
C210
0.1U_0402_16V4Z~D
<BOM Structure>
C210
0.1U_0402_16V4Z~D
<BOM Structure>
1
2
C385 1000P_0402_50V7K~D
@C385 1000P_0402_50V7K~D
@
1 2
R290 1K_0402_1%
R290 1K_0402_1%
1 2
D13
CH751H-40PT_SOD323-2
<BOM Structure>
D13
CH751H-40PT_SOD323-2
<BOM Structure>
2
1
C192
0.1U_0402_16V4Z~D
@C192
0.1U_0402_16V4Z~D
@
1
2
R405 10_0402_5%
@ R405 10_0402_5%
@
1 2
R156
560_0402_5%
R156
560_0402_5%
1 2
R281 0_0603_5%
R281 0_0603_5%
1 2
R1170
10K_0402_5%
@R1170
10K_0402_5%
@
1
2
C174 1000P_0402_50V7K~D
@C174 1000P_0402_50V7K~D
@
1 2
C219
1U_0603_10V4Z
C219
1U_0603_10V4Z
1
2
R15
75_0402_1%
R15
75_0402_1%
1 2
R215 20K_0402_1%
R215 20K_0402_1%
1 2
C405
10U_0805_10V6K~D
C405
10U_0805_10V6K~D
1
2
C187 1U_0603_10V4Z
C187 1U_0603_10V4Z
1 2
R96 0_0402_5%
R96 0_0402_5%
1 2
R293
0_0603_5%
R293
0_0603_5%
1
2
C218
1U_0603_10V4Z
C218
1U_0603_10V4Z
1
2
R154
10K_0402_5%
@R154
10K_0402_5%
@
1
2
R1160
10K_0402_5%
@R1160
10K_0402_5%
@
1
2
R533
4.7K_0402_5%
R533
4.7K_0402_5%
1
2
R151
20K_0402_5%
R151
20K_0402_5%
1
2
C258
10U_0805_10V6K~D
C258
10U_0805_10V6K~D
1
2
D1
CH751H-40PT_SOD323-2
@
D1
CH751H-40PT_SOD323-2
@
2
1
C407
0.01U_0402_25V7K~D
@C407
0.01U_0402_25V7K~D
@
1
2
R152
10K_0402_5%
R152
10K_0402_5%
1
2
R155
560_0402_5%
R155
560_0402_5%
1 2
WWW.AliSaler.Com
16. WWW.AliSaler.Com
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HPR
JACK-AGND
MIC1_R_1
INL_A
INR_A
EC_MUTE#
SPKL-
SPKR-
SPKR+
SPKL+
GAIN1
GAIN0
GAIN1
GAIN0
SPKR-
SPKR+
SPKL-
SPKL+ SPK_L1+
SPK_R1+
SPK_R1-
SPK_L1-
JACK-AGND
HPL
MIC1_L_1
MIC1_R
<15>
MIC1_L
<15>
HP_L
<15>
HP_R
<15>
LINE_OUTR
<15>
LINE_OUTL
<15>
EC_MUTE# <19>
JACK_PLUG_HP
<15>
JACK_PLUG_MIC
<15>
+5VAMP
+3VALW
+5VAMP +5VAMP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
16 33
Wednesday, September 16, 2009
Compal Electronics, Inc.
2009/06/22
2009/03/25 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
16 33
Wednesday, September 16, 2009
Compal Electronics, Inc.
2009/06/22
2009/03/25 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401784 A
SCHEMATIC, MB A5732
Custom
16 33
Wednesday, September 16, 2009
Compal Electronics, Inc.
2009/06/22
2009/03/25
HeadPhone JACK
Ext.MIC JACK
APA2031A SPK Amplifier
W=40mil
GAIN0 GAIN1
0 0 6dB
0 1 10dB
1 0 15.6dB
1 1 21.6dB
Speaker Conn.
20mil
Close to Speaker CONN for ESD.
L50 BLM15AG121SN1D_0402
L50 BLM15AG121SN1D_0402
1 2
J8
JUMP_43X39
@J8
JUMP_43X39
@
1
1
2
2
C34
0.47U_0603_16VY5V
C34
0.47U_0603_16VY5V
1
2
D17
PJDLC05_SOT23-3
D17
PJDLC05_SOT23-3
2
3
1
D45
PJDLC05_SOT23-3
D45
PJDLC05_SOT23-3
2
3
1
C768
10P_0402_50V8J~D
@C768
10P_0402_50V8J~D
@
1
2
C814
0.1U_0603_25V7K
C814
0.1U_0603_25V7K
1
2
JP55
FCI_10094351-004711LF
JP55
FCI_10094351-004711LF
1
1
2
2
3
3
4
4
R205 0_0402_5%
R205 0_0402_5%
1 2
R197
0_0402_5%
@
R197
0_0402_5%
@
1
2
C270
22P_0402_50V8J
@
C270
22P_0402_50V8J
@
1
2
J7
JUMP_43X39
@J7
JUMP_43X39
@
1
1
2
2
R219 0_0402_5%
R219 0_0402_5%
1 2
C290
22P_0402_50V8J
@
C290
22P_0402_50V8J
@
1
2
C375
0.1U_0402_16V4Z~D
C375
0.1U_0402_16V4Z~D
1
2
C770
220P_0402_50V8J
@C770
220P_0402_50V8J
@
1
2
R292
47K_0402_5%
R292
47K_0402_5%
1
2
R306 0_0402_5%
R306 0_0402_5%
1 2
R714
100K_0402_1%
R714
100K_0402_1%
1
2
R711
10K_0402_5%
@
R711
10K_0402_5%
@
1
2
R715
100K_0402_1%
R715
100K_0402_1%
1
2
L52 BLM15AG121SN1D_0402
L52 BLM15AG121SN1D_0402
1 2
R308 0_0402_5%
R308 0_0402_5%
1 2
C769
10P_0402_50V8J~D
@C769
10P_0402_50V8J~D
@
1
2
L51 BLM15AG121SN1D_0402
L51 BLM15AG121SN1D_0402
1 2
R716
100K_0402_1%
@
R716
100K_0402_1%
@
1
2
U19
APA2031RI-TRL_TSSOP20
U19
APA2031RI-TRL_TSSOP20
GAIN0
2
LOUT+ 4
ROUT+ 18
LIN-
5
RIN-
17
PVDD
6
GND 1
NC 12
GAIN1
3
ROUT- 14
LOUT- 8
BYPASS 10
VDD
16
SHUTDOWN# 19
GND 11
PVDD
15
GND 13
GND 20
LIN+
9
RIN+
7 GND 21
D18
PJDLC05_SOT23-3
D18
PJDLC05_SOT23-3
2
3
1
C813
0.1U_0603_25V7K
C813
0.1U_0603_25V7K
1
2
D46
PJDLC05_SOT23-3
D46
PJDLC05_SOT23-3
2
3
1
R195 0_0402_5%
R195 0_0402_5%
1 2
C268
22P_0402_50V8J
@
C268
22P_0402_50V8J
@
1
2
R225 0_0402_5%
R225 0_0402_5%
1 2
C306
22P_0402_50V8J
@
C306
22P_0402_50V8J
@
1
2
C383
4.7U_0805_10V4Z~D
C383
4.7U_0805_10V4Z~D
1
2
JP61
SINGA_2SJ1012-000111
JP61
SINGA_2SJ1012-000111
10
2
3
6
4
5
7
8
9
1
C771
220P_0402_50V8J
@C771
220P_0402_50V8J
@
1
2
R713
100K_0402_1%
@ R713
100K_0402_1%
@
1
2
R712
10K_0402_5%
@
R712
10K_0402_5%
@
1
2
L53 BLM15AG121SN1D_0402
L53 BLM15AG121SN1D_0402
1 2
JP60
SINGA_2SJ1012-000111
JP60
SINGA_2SJ1012-000111
10
2
3
6
4
5
7
8
9
1
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