Call for Papers - African Journal of Biological Sciences, E-ISSN: 2663-2187, ...
Toshiba Satellite M600 M645 (Compal LA-6072P).pdf
1. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Cover Page
B
1 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Cover Page
B
1 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Cover Page
B
1 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
2010-03-22 Rev 1.0
Intel Arrandale CPU / Intel 5 Series Chipset
NBQAA
LA-6072P
LA-6072P
LA-6072P
LA-6072P Schematic
Schematic
Schematic
Schematic
Bordeaux 10G
REV 1.0
REV 1.0
REV 1.0
REV 1.0
2. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Block Diagrams
2 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Block Diagrams
2 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Block Diagrams
2 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
File Name : LA-6072P
page 42
Compal Confidential
Int.KBD
page 45
BANK 0, 1, 2, 3
ALC269
Intel Arrandale
Clock Generator
SLG8SP587VTR
page 44
Fan Control
rPGA-989 204pin DDRIII-SO-DIMM X2
EC ROM
page 14
1.5V DDRIII 800/1066 MT/s
page 5,6,7,8,9,10
page 35
HDA Codec
page 25
Memory BUS(DDRIII)
BGA-1071
page 6
Intel 5 Series Chipset
VGA Thermal Sensor
page 11,12
page 28,29,30,31,32,33,34,35,36
ENE KB926 E0
LCD Conn.
Model Name : NBQAA
page 25
Dual Channel
page 37
SATA HDD
ADM1032ARMZ-2
5V 3GHz(300MB/s)
SATA port 1
HD Audio 3.3V/1.5V 24MHz
LPC
BUS
3.3V
33
MHz
USB
5V 480MHz
5V 3GHz(300MB/s)
SATA port 5
page 37
eSATA
SATA port 4
page 38
RJ45 RTL8105E 10/100M
RTL8111E 10/100/1000M
page 40
page 40
PCIe port 1
page 45
Debug Port
CRT
page 26
HDMI Conn.
page 27
USB
5V 480MHz
SATA ODD
page 37
5V 3GHz(300MB/s)
USB port 3
5V 480MHz
USB
page 37
USB port 0,1
page 37
USB Conn
USB port 3
Power Circuit DC/DC
page 47
RTC CKT.
page 28
page 48~58
DC/DC Interface
Power Membrane
page 46
HP CONN
page 43
SPK CONN
page 43
MIC CONN
page 43
MIC CONN
page 25
Int.
PCIE-Express 16X 2.5GHz
N11M-OP1,64bit with 512MB/1GB
PCIeMini Card
WiMax
PCIeMini Card
WLAN
USB port 13
PCIe port 2
page 39
page 39
USB port 5
page 38
BT conn
N11P-LP1,128bit with 1GB
APL5607
page 13,14,15,16,17,18,19,20,21,22,23,24 DMI X4
VGA (DDR3)
Fringer Printer
USB port 8
Int. Camera
USB port 11
page 25
1.5V 2.5GHz(250MB/s)
PCIe 1x
1.5V 2.5GHz(250MB/s)
PCIe 1x
page 28
SPI ROM
2.5GHz
HDMI-CEC
page 27
HM57,HM55
(2C,35W)
PCIeMini Card
3G
PCIeMini Card
JET
USB port 10
PCIe port 4
page 39
page 39
USB port 4
PCIe port 3
page 39
PCIe port 2
USB port 13
Express Card
PCIe port 5
1.5V 2.5GHz(250MB/s)
PCIe 1x
page 41
PCIe port 5
4 in 1 Card Reader
LAN
JMB389C/385C
page 45
G-Sensor
NBQAA Sub-board Conn
Touch Pad
FP/LOGO LED
page 38
Cap Sensor
Light Sensor
page 38
Slot ODD
page 37
TP LED page 38
FDI X8
2.7GHz
EC_SMB
3. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Power Tree
3 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Power Tree
3 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Power Tree
3 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
NBQAA Bordeaux Intel Arrandale (Discrete)
B+
RT8205EGQW
AO-3413
+LCD_VDD
UMA_ENVDD
AO-3413
BT_PWR#
P-CHANNEL
+3VALW
DESIGN CURRENT 0.5A
+BT_VCC
N-CHANNEL
SI4800
+3VS
SUSP
P-CHANNEL
DESIGN CURRENT 180mA
DESIGN CURRENT 1.5A
DESIGN CURRENT 3A
+5VALW
DESIGN CURRENT 1.7A
N-CHANNEL
SI4800
SUSP
+5VS
DESIGN CURRENT 2.2A
Ipeak=5A, Imax=3.5A, Iocp min=7.9
Ipeak=5A, Imax=3.5A, Iocp min=8.6
AO-3413
+3V_LAN
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA
AO-3413
+5VS_ODD
ODD_EN#
P-CHANNEL DESIGN CURRENT 1100mA
AO-3413
DGPU_PWR_EN#
P-CHANNEL
+3VS_DGPU
DESIGN CURRENT 780mA
APW7138NITRL
SYSON
RT8209BGQW
VTTP_EN
DESIGN CURRENT 1.7A +1.8VS
SUSP#
MP2121DQ-LF-Z
ISL62883HRZ-T
+CPU_CORE
DESIGN CURRENT 48A
VR_ON
ADP3211AMNR2G
+GFX_CORE
DESIGN CURRENT 22A
GFXVR_EN
B+
APW7138NITRL
+VGA_CORE
DESIGN CURRENT 24.1A
GFXVR_EN
Ipeak=24.10A, Imax=16.87A, Iocp min=28.65A
Ipeak=22A, Imax=15.4A, Iocp min=26A
Ipeak=48A, Imax=33.6A, Iocp min=57.19A
+VTT
DESIGN CURRENT 5A +1.05VS
DESIGN CURRENT 15A
Ipeak=20A, Imax=14A, Iocp min=29.73A
AO-3413
DGPU_PWR_EN#
P-CHANNEL
+1.05VS_DGPU
DESIGN CURRENT 2.87A
DESIGN CURRENT 9A +1.5V
+1.5VS
SUSP
SI4800
N-CHANNEL
DESIGN CURRENT 1.3A +0.75VS
0.75VR_EN#
G2992F1U
DESIGN CURRENT 4.75A
Ipeak=20.15A, Imax=14.11A, Iocp min=21.73A
SI4856
N-CHANNEL DESIGN CURRENT 3A
SUSP
+1.5V_CPU
+VRAM_1.5VS
VGA_PWROK#
SI4856
N-CHANNEL DESIGN CURRENT 6.4A
4. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Notes List
Custom
4 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Notes List
Custom
4 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
Notes List
Custom
4 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S3# SLP_S4# SLP_S5#
LOW LOW
LOW
LOW LOW
LOW
HIGH HIGH
HIGH
HIGH HIGH
HIGH
HIGH
HIGH
HIGH
G3 LOW LOW
LOW
Voltage Rails
+1.1VS
( O MEANS ON X MEANS OFF )
O
O
X
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+CPU_CORE
O
O
O
O
X
X X
+VTT
power
plane
O
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.5V
S5 S4/AC & Battery
don't exist
S5 S4/AC
+5VALW
S0
O
O
+1.05VS
+0.75VS
+1.8VS
+RTCVCC
O
O
O
O
O
O
+VSB
+VGA_CORE
Function
BTO
explain
description
Bluetooth
BTO Option Table
Function
BTO
explain
Bluetooth
description
BT@
CAM+MIC
CAM@
VRAM
512M 1G
GPU
HDMI-CEC
Mini Card
N11P-LP1
N11P@
HDMI+CEC
LAN
10/100 10/100/1000
8105E@ 8111E@
CAM
ODD0@
Function
BTO
explain
KB LED
description
KBL@
ODD
KB LED
Normal
ODD1@
Slot N11M-OP1
N11P@
3G
3G@
WiMAX
WiMAX@
JET
JET@
PCH
HM55
HM55@ HM57@
HM57
3GJFT@
3G/JFT
+3VS
+3VS Ambient Ligh Sensor
EC KB926 D3
+3VL EC KB926 D3
+3VS
EC SM Bus1 address
Device
+3VALW PCH
0001 011x b
Address Address
Smart Battery
+3VL
G-Sensor
EC SM Bus2 address
Device
+3VL HDMI-CEC
Power
Power
+3VS AMD GPU Thermal Sensor
Power
+3VALW PCH
+3VS
+3VS
+3VS
+3VS
DDR DIMMA
DDR DIMMB
+3VS Slot#2--JET/3G
+3VS Slot#1--WLAN/Wimax
1101 001x b
1001 000x b
1001 010x b
PCH SM Bus address
Device
Clock Generator
Address
Express
B
H5 H7
P M
512 1G
X
IHDMI@+CEC@
Y
J
G
K
T
U V
W
Card Reader
HDMI
IHDMI@
JMB389@ JMB385@
JMB389 JMB385
4pcs@ 4pcs@+8pcs@
5. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PWRGOOD
SM_RCOMP_0
DRAMPWROK
H_COMP0
SM_RCOMP_1
SM_RCOMP_2
SM_DRAMRST#_CPU
CATERR#
H_CPURST#
DRAMPWROK
PM_EXTTS#_R
PM_EXTTS#_R
CLK_CPU_XDP_R
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_TDO_M
XDP_TDI_M
XDP_TDI_R XDP_TDI
XDP_TDO
XDP_TDI_M
XDP_TDO_R
XDP_TDO_M
TAPPWRGD
CLK_CPU_XDP#_R
TAPPWRGD
H_PWRGOOD
TP_SKTOCC#
TAPPWRGD_R
H_PROCHOT#_D
PM_EXTTS#0
H_COMP3
H_COMP2
H_COMP1
CLK_CPU_XDP#
CLK_CPU_XDP
PM_EXTTS#0
XDP_RST#_R
H_CPURST#
H_PWRGOOD1_R
SM_DRAMRST#_CPU
VTTPWROK
XDP_PREQ#_R
XDP_PRDY#_R
XDP_BPM#0_R
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#3_R
H_PWRGOOD_R
CLK_CPU_XDP
CLK_CPU_XDP#
XDP_DBRESET#_R
XDP_RST#_R
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS_R
XDP_TCK_R
DRAMPWROK
XDP_DBRESET#
XDP_BPM#3_R
XDP_DBRESET#_R
XDP_BPM#3
XDP_PRDY#
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#1
XDP_BPM#2
XDP_BPM#0_R
XDP_BPM#0
XDP_TCK XDP_TCK_R
XDP_TMS_R
XDP_TMS
XDP_PREQ#_R
XDP_PRDY#_R
XDP_PREQ#
H_PWRGOOD
PECI
33
PMSYNCH
30
H_PWRGOOD
33
DRAMPWROK
30
BUF_PLT_RST#
32
CLK_CPU_BCLK 33
CLK_CPU_BCLK# 33
CLK_PEG 29
CLK_PEG# 29
PM_EXTTS# 11,12
H_THERMTRIP#
33
XDP_DBRESET# 30
SM_DRAMRST# 11,12
RST_GATE 33
VTTPWROK
47,52
VTTPWROK_CPU
52
+VTT
+1.5V_CPU
+VTT
+3VS
+VTT
+3VALW
+VTT
+VTT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU CLK/MISC/JTAG
Custom
5 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU CLK/MISC/JTAG
Custom
5 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU CLK/MISC/JTAG
Custom
5 61
Tuesday, March 23, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Scan Chain
(Default)
CPU Only
GMCH Only
STUFF -> R20, R23, R27
NO STUFF -> R21, R26
STUFF -> R20, R21
NO STUFF -> R23, R26, R27
NO STUFF -> R20, R21, R23
STUFF -> R26, R27
JTAG MAPPING
XDP Connector
Unused by Clarksfield rPGA989
DDR3 Compensation Signals
Layout Note:Please these
resistors near Processor
Routed as a single daisy chain
Reserved for EMI;don't open solder if placing under H=0
SFF-24Pin
For S3 Power Reduction
to avoid noise
JXDP
MOLEX_52435-2472
@
JXDP
MOLEX_52435-2472
@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
GND 25
GND 26
R19 0_0402_5%
@
R19 0_0402_5%
@
1
2
R21 0_0402_5%
@
R21 0_0402_5%
@
1 2
C414
1000P_0402_50V7K
C414
1000P_0402_50V7K
1
2
R454 0_0402_5%
@
R454 0_0402_5%
@
1 2
R30
1.5K_0402_1% R30
1.5K_0402_1%
R42 0_0402_5%
@
R42 0_0402_5%
@
1 2
T41
PAD T41
PAD
R18 49.9_0402_1%
R18 49.9_0402_1%
1 2
C426
1000P_0402_50V7K
C426
1000P_0402_50V7K
1
2
R9 68_0402_5%
R9 68_0402_5%
1 2
C160
0.047U_0402_25V6K
C160
0.047U_0402_25V6K
1
2
R449 0_0402_5%
@
R449 0_0402_5%
@
1 2
U10
SN74AHC1G08DCKR_SC70-5
U10
SN74AHC1G08DCKR_SC70-5
IN1
1
IN2
2
G
3
O 4
P
5
R29
750_0402_1%
R29
750_0402_1%
R40 0_0402_5%
@
R40 0_0402_5%
@
1 2
R33 1.5K_0402_1%
R33 1.5K_0402_1%
R312 1K_0402_5%
R312 1K_0402_5%
1
2
R36 1K_0402_5%
R36 1K_0402_5%
1 2
R35 0_0402_5%
@R35 0_0402_5%
@
1 2
R23
0_0402_5%
R23
0_0402_5%
1
2
R15 10K_0402_5%
R15 10K_0402_5%
1
2
R11
51_0402_5%
R11
51_0402_5%
1
2
R32 1K_0402_5%
@R32 1K_0402_5%
@
1 2
R10
68_0402_5%
@
R10
68_0402_5%
@
1
2
R41 0_0402_5%
@
R41 0_0402_5%
@
1 2
R8 130_0402_1%
R8 130_0402_1%
1 2
R3 49.9_0402_1%
R3 49.9_0402_1%
1 2
R1 20_0402_1%
R1 20_0402_1%
1 2
R455 0_0402_5%
@
R455 0_0402_5%
@
1 2
CLOCKS
MISC
THERMAL
PWR
MANAGEMENT
DDR3
MISC
JTAG
&
BPM
JCPUB
IC,AUB_CFD_rPGA,R0P9
@
CLOCKS
MISC
THERMAL
PWR
MANAGEMENT
DDR3
MISC
JTAG
&
BPM
JCPUB
IC,AUB_CFD_rPGA,R0P9
@
SM_RCOMP[1] AM1
SM_RCOMP[2] AN1
SM_DRAMRST# F6
SM_RCOMP[0] AL1
BCLK# B16
BCLK A16
BCLK_ITP# AT30
BCLK_ITP AR30
PEG_CLK# D16
PEG_CLK E16
DPLL_REF_SSCLK# A17
DPLL_REF_SSCLK A18
CATERR#
AK14
COMP3
AT23
PECI
AT15
PROCHOT#
AN26
THERMTRIP#
AK15
RESET_OBS#
AP26
VCCPWRGOOD_1
AN14
VCCPWRGOOD_0
AN27
SM_DRAMPWROK
AK13
VTTPWRGOOD
AM15
RSTIN#
AL14
PM_EXT_TS#[0] AN15
PM_EXT_TS#[1] AP15
PRDY# AT28
PREQ# AP27
TCK AN28
TMS AP28
TRST# AT27
TDI AT29
TDO AR27
TDI_M AR29
TDO_M AP29
DBR# AN25
BPM#[0] AJ22
BPM#[1] AK22
BPM#[2] AK24
BPM#[3] AJ24
BPM#[4] AJ25
BPM#[5] AH22
BPM#[6] AK23
BPM#[7] AH23
COMP2
AT24
PM_SYNC
AL15
TAPPWRGOOD
AM26
COMP1
G16
COMP0
AT26
SKTOCC#
AH24
R452 0_0402_5%
@
R452 0_0402_5%
@
1 2
R13 10K_0402_5%
R13 10K_0402_5%
1
2
C482
1000P_0402_50V7K
C482
1000P_0402_50V7K
1
2
R31
750_0402_1%
R31
750_0402_1%
R20 0_0402_5%
R20 0_0402_5%
1 2
C253 0.1U_0402_16V4Z
C253 0.1U_0402_16V4Z
1 2
R28
1.1K_0402_1%
@
R28
1.1K_0402_1%
@
1
2
R54 0_0402_5%
@
R54 0_0402_5%
@
1 2
R12 0_0402_5%
R12 0_0402_5%
1
2
R450 0_0402_5%
@
R450 0_0402_5%
@
1 2
R26 0_0402_5%
@
R26 0_0402_5%
@
1 2
R123
100K_0402_5%
R123
100K_0402_5%
1
2
R25
0_0402_5% R25
0_0402_5%
1
2
R14
51_0402_5% R14
51_0402_5%
1
2
R7 24.9_0402_1%
R7 24.9_0402_1%
1 2
G
D
S
Q41
BSS138_NL_SOT23-3
G
D
S
Q41
BSS138_NL_SOT23-3
2
1
3
R4 49.9_0402_1%
R4 49.9_0402_1%
1 2
R29
3K_0402_1%
@
R29
3K_0402_1%
@
1
2
C1
0.1U_0402_10V6K
@
C1
0.1U_0402_10V6K
@
1
2
R6 100_0402_1%
R6 100_0402_1%
1 2
R27 0_0402_5%
R27 0_0402_5%
1 2
R2 20_0402_1%
R2 20_0402_1%
1 2
R456 0_0402_5%
@
R456 0_0402_5%
@
1 2
R52
0_0402_5% @ R52
0_0402_5% @
1
2
R451 0_0402_5%
@
R451 0_0402_5%
@
1 2
6. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_RBIAS
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N13
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
PEG_COMP
+FAN1
+FAN1
PCIE_CTX_C_GRX_N[0..15] 13
PCIE_CTX_C_GRX_P[0..15] 13
PCIE_GTX_C_CRX_N[0..15] 13
PCIE_GTX_C_CRX_P[0..15] 13
DMI_PTX_CRX_P3
30
DMI_PTX_CRX_P2
30
DMI_PTX_CRX_P1
30
DMI_PTX_CRX_P0
30
DMI_PTX_CRX_N3
30
DMI_PTX_CRX_N2
30
DMI_PTX_CRX_N1
30
DMI_PTX_CRX_N0
30
DMI_CTX_PRX_P3
30
DMI_CTX_PRX_P2
30
DMI_CTX_PRX_P1
30
DMI_CTX_PRX_P0
30
DMI_CTX_PRX_N3
30
DMI_CTX_PRX_N2
30
DMI_CTX_PRX_N1
30
DMI_CTX_PRX_N0
30
EN_DFAN1
44
FAN_SPEED1 44
FDI_CTX_PRX_N0
30
FDI_CTX_PRX_N1
30
FDI_CTX_PRX_N2
30
FDI_CTX_PRX_N3
30
FDI_CTX_PRX_N4
30
FDI_CTX_PRX_N5
30
FDI_CTX_PRX_N6
30
FDI_CTX_PRX_N7
30
FDI_CTX_PRX_P0
30
FDI_CTX_PRX_P1
30
FDI_CTX_PRX_P2
30
FDI_CTX_PRX_P3
30
FDI_CTX_PRX_P4
30
FDI_CTX_PRX_P5
30
FDI_CTX_PRX_P6
30
FDI_CTX_PRX_P7
30
FDI_FSYNC0
30
FDI_FSYNC1
30
FDI_INT
30
FDI_LSYNC0
30
FDI_LSYNC1
30
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU DMI/FDI/PEG
B
6 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU DMI/FDI/PEG
B
6 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU DMI/FDI/PEG
B
6 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
1A
FAN Control Circuit
10mil
C42 0.1U_0402_16V7K
C42 0.1U_0402_16V7K
1 2
C51 0.1U_0402_16V7K
C51 0.1U_0402_16V7K
1 2
C43 0.1U_0402_16V7K
C43 0.1U_0402_16V7K
1 2
C48 0.1U_0402_16V7K
C48 0.1U_0402_16V7K
1 2
PCI
EXPRESS
--
GRAPHICS
DMI
Intel(R)
FDI
JCPUA
IC,AUB_CFD_rPGA,R0P9
@
PCI
EXPRESS
--
GRAPHICS
DMI
Intel(R)
FDI
JCPUA
IC,AUB_CFD_rPGA,R0P9
@
DMI_RX#[0]
A24
DMI_RX#[1]
C23
DMI_RX#[2]
B22
DMI_RX#[3]
A21
DMI_RX[0]
B24
DMI_RX[1]
D23
DMI_RX[2]
B23
DMI_RX[3]
A22
DMI_TX#[0]
D24
DMI_TX#[1]
G24
DMI_TX#[2]
F23
DMI_TX#[3]
H23
DMI_TX[0]
D25
DMI_TX[1]
F24
DMI_TX[3]
G23
DMI_TX[2]
E23
FDI_TX#[0]
E22
FDI_TX#[1]
D21
FDI_TX#[2]
D19
FDI_TX#[3]
D18
FDI_TX#[4]
G21
FDI_TX#[5]
E19
FDI_TX#[6]
F21
FDI_TX#[7]
G18
FDI_TX[0]
D22
FDI_TX[1]
C21
FDI_TX[2]
D20
FDI_TX[3]
C18
FDI_TX[4]
G22
FDI_TX[5]
E20
FDI_TX[6]
F20
FDI_TX[7]
G19
FDI_FSYNC[0]
F17
FDI_FSYNC[1]
E17
FDI_INT
C17
FDI_LSYNC[0]
F18
FDI_LSYNC[1]
D17
PEG_ICOMPI B26
PEG_ICOMPO A26
PEG_RBIAS A25
PEG_RCOMPO B27
PEG_RX#[0] K35
PEG_RX#[1] J34
PEG_RX#[2] J33
PEG_RX#[3] G35
PEG_RX#[4] G32
PEG_RX#[5] F34
PEG_RX#[6] F31
PEG_RX#[7] D35
PEG_RX#[8] E33
PEG_RX#[9] C33
PEG_RX#[10] D32
PEG_RX#[11] B32
PEG_RX#[12] C31
PEG_RX#[13] B28
PEG_RX#[14] B30
PEG_RX#[15] A31
PEG_RX[0] J35
PEG_RX[1] H34
PEG_RX[2] H33
PEG_RX[3] F35
PEG_RX[4] G33
PEG_RX[5] E34
PEG_RX[6] F32
PEG_RX[7] D34
PEG_RX[8] F33
PEG_RX[9] B33
PEG_RX[10] D31
PEG_RX[11] A32
PEG_RX[12] C30
PEG_RX[13] A28
PEG_RX[14] B29
PEG_RX[15] A30
PEG_TX#[0] L33
PEG_TX#[1] M35
PEG_TX#[2] M33
PEG_TX#[3] M30
PEG_TX#[4] L31
PEG_TX#[5] K32
PEG_TX#[6] M29
PEG_TX#[7] J31
PEG_TX#[8] K29
PEG_TX#[9] H30
PEG_TX#[10] H29
PEG_TX#[11] F29
PEG_TX#[12] E28
PEG_TX#[13] D29
PEG_TX#[14] D27
PEG_TX#[15] C26
PEG_TX[0] L34
PEG_TX[1] M34
PEG_TX[2] M32
PEG_TX[3] L30
PEG_TX[4] M31
PEG_TX[5] K31
PEG_TX[6] M28
PEG_TX[7] H31
PEG_TX[8] K28
PEG_TX[9] G30
PEG_TX[10] G29
PEG_TX[11] F28
PEG_TX[12] E27
PEG_TX[13] D28
PEG_TX[14] C27
PEG_TX[15] C25
C58 0.1U_0402_16V7K
C58 0.1U_0402_16V7K
1 2
R34 10K_0402_5%
R34 10K_0402_5%
1
2
C70 0.1U_0402_16V7K
C70 0.1U_0402_16V7K
1 2
R39 750_0402_1%
R39 750_0402_1%
1 2
C5
10U_0805_10V4Z
C5
10U_0805_10V4Z
1
2
C61 0.1U_0402_16V7K
C61 0.1U_0402_16V7K
1 2
C39 0.1U_0402_16V7K
C39 0.1U_0402_16V7K
1 2
C55 0.1U_0402_16V7K
C55 0.1U_0402_16V7K
1 2
C69 0.1U_0402_16V7K
C69 0.1U_0402_16V7K
1 2
C60 0.1U_0402_16V7K
C60 0.1U_0402_16V7K
1 2
JFAN
ACES_85204-0300N
@
JFAN
ACES_85204-0300N
@
1
1
2
2
3
3
GND
4
GND
5
C49 0.1U_0402_16V7K
C49 0.1U_0402_16V7K
1 2
C3
10U_0805_10V4Z
C3
10U_0805_10V4Z
1
2
C52 0.1U_0402_16V7K
C52 0.1U_0402_16V7K
1 2
C47 0.1U_0402_16V7K
C47 0.1U_0402_16V7K
1 2
C6
0.01U_0402_16V7K
@
C6
0.01U_0402_16V7K
@
1
2
C40 0.1U_0402_16V7K
C40 0.1U_0402_16V7K
1 2
C41 0.1U_0402_16V7K
C41 0.1U_0402_16V7K
1 2
C46 0.1U_0402_16V7K
C46 0.1U_0402_16V7K
1 2
C56 0.1U_0402_16V7K
C56 0.1U_0402_16V7K
1 2
C65 0.1U_0402_16V7K
C65 0.1U_0402_16V7K
1 2
C50 0.1U_0402_16V7K
C50 0.1U_0402_16V7K
1 2
C44 0.1U_0402_16V7K
C44 0.1U_0402_16V7K
1 2
C45 0.1U_0402_16V7K
C45 0.1U_0402_16V7K
1 2
R38 49.9_0402_1%
R38 49.9_0402_1%
1 2
C67 0.1U_0402_16V7K
C67 0.1U_0402_16V7K
1 2
C53 0.1U_0402_16V7K
C53 0.1U_0402_16V7K
1 2
C64 0.1U_0402_16V7K
C64 0.1U_0402_16V7K
1 2
C57 0.1U_0402_16V7K
C57 0.1U_0402_16V7K
1 2
C59 0.1U_0402_16V7K
C59 0.1U_0402_16V7K
1 2
C63 0.1U_0402_16V7K
C63 0.1U_0402_16V7K
1 2
C68 0.1U_0402_16V7K
C68 0.1U_0402_16V7K
1 2
C54 0.1U_0402_16V7K
C54 0.1U_0402_16V7K
1 2
C62 0.1U_0402_16V7K
C62 0.1U_0402_16V7K
1 2
U1
APL5607KI-TRG_SO8
U1
APL5607KI-TRG_SO8
EN
1
VIN
2
VOUT
3
VSET
4
GND 8
GND 7
GND 6
GND 5
C428
1000P_0402_50V7K
@
C428
1000P_0402_50V7K
@
1
2
C66 0.1U_0402_16V7K
C66 0.1U_0402_16V7K
1 2
7. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63
DDR_A_D62
DDR_A_D8
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D7
DDR_A_D6
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D47
DDR_A_D46
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D45
DDR_A_D44
DDR_A_D39
DDR_A_D38
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D37
DDR_A_D36
DDR_A_D61
DDR_A_D60
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_D55
DDR_A_D54
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D53
DDR_A_D52
DDR_A_D31
DDR_A_D30
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D15
DDR_A_D14
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D13
DDR_A_D12
DDR_A_D29
DDR_A_D28
DDR_A_D23
DDR_A_D22
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D21
DDR_A_D20
DDR_B_D32
DDR_B_D33
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D48
DDR_B_D49
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D58
DDR_B_D59
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D42
DDR_B_D43
DDR_B_D0
DDR_B_D1
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D16
DDR_B_D17
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D26
DDR_B_D27
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D10
DDR_B_D11
DDR_A_DM5
DDR_A_DM2
DDR_A_DM1
DDR_A_DM6
DDR_A_DM4
DDR_A_DM3
DDR_A_MA14
DDR_A_MA0
DDR_A_MA1
DDR_A_MA4
DDR_A_DM0
DDR_A_MA2
DDR_A_MA3
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
DDR_A_MA13
DDR_A_MA11
DDR_A_MA10
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#3
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DM7
DDR_A_DQS1
DDR_A_DQS3
DDR_A_DQS5
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS4
DDR_A_MA15
DDR_B_DQS7
DDR_B_DQS0
DDR_B_DQS5
DDR_B_DQS1
DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS2
DDR_B_DQS#1
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_DM3
DDR_B_DM1
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DM2
DDR_B_DM0
DDR_B_DM4
DDR_B_MA2
DDR_B_MA3
DDR_B_MA10
DDR_B_MA11
DDR_B_MA8
DDR_B_MA9
DDR_B_MA0
DDR_B_MA1
DDR_B_MA6
DDR_B_MA7
DDR_B_MA4
DDR_B_MA5
DDR_B_MA14
DDR_B_MA12
DDR_B_MA13
DDR_B_MA15
DDR_A_D[0..63]
11
DDR_A_BS1
11
DDR_A_BS2
11
DDR_A_BS0
11
DDR_A_WE#
11
DDRA_CLK0 11 DDRB_CLK0 12
DDRA_CLK1 11
DDRA_CLK0# 11
DDRB_CLK1 12
DDRA_CLK1# 11
DDRB_CLK1# 12
DDRB_CLK0# 12
DDRA_CKE0 11 DDRB_CKE0 12
DDRA_CKE1 11
DDRA_SCS0# 11
DDRB_CKE1 12
DDRA_SCS1# 11 DDRB_SCS1# 12
DDRB_SCS0# 12
DDRA_ODT0 11 DDRB_ODT0 12
DDRA_ODT1 11 DDRB_ODT1 12
DDR_B_D[0..63]
12
DDR_A_MA[0..15] 11
DDR_A_DQS[0..7] 11
DDR_A_DM[0..7] 11
DDR_A_DQS#[0..7] 11
DDR_B_MA[0..15] 12
DDR_B_DQS#[0..7] 12
DDR_B_DQS[0..7] 12
DDR_B_DM[0..7] 12
DDR_B_BS1
12
DDR_B_BS2
12
DDR_B_BS0
12
DDR_B_WE#
12
DDR_A_CAS#
11
DDR_A_RAS#
11
DDR_B_RAS#
12
DDR_B_CAS#
12
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU DDRIII
B
7 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU DDRIII
B
7 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU DDRIII
B
7 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Unused by Clarksfield rPGA989
Unused by Clarksfield rPGA989
DDR
SYSTEM
MEMORY
-
B
JCPUD
IC,AUB_CFD_rPGA,R0P9
@
DDR
SYSTEM
MEMORY
-
B
JCPUD
IC,AUB_CFD_rPGA,R0P9
@
SB_BS[0]
AB1
SB_BS[1]
W5
SB_BS[2]
R7
SB_CAS#
AC5
SB_RAS#
Y7
SB_WE#
AC6
SB_CK[0] W8
SB_CK[1] V7
SB_CK#[0] W9
SB_CK#[1] V6
SB_CKE[0] M3
SB_CKE[1] M2
SB_CS#[0] AB8
SB_CS#[1] AD6
SB_ODT[0] AC7
SB_ODT[1] AD1
SB_DM[0] D4
SB_DM[1] E1
SB_DM[2] H3
SB_DM[3] K1
SB_DM[4] AH1
SB_DM[5] AL2
SB_DM[6] AR4
SB_DM[7] AT8
SB_DQS[4] AG2
SB_DQS#[4] AH2
SB_DQS[5] AL5
SB_DQS#[5] AL4
SB_DQS[6] AP5
SB_DQS#[6] AR5
SB_DQS[7] AR7
SB_DQS#[7] AR8
SB_DQS[0] C5
SB_DQS#[0] D5
SB_DQS[1] E3
SB_DQS#[1] F4
SB_DQS[2] H4
SB_DQS#[2] J4
SB_DQS[3] M5
SB_DQS#[3] L4
SB_MA[0] U5
SB_MA[1] V2
SB_MA[2] T5
SB_MA[3] V3
SB_MA[4] R1
SB_MA[5] T8
SB_MA[6] R2
SB_MA[7] R6
SB_MA[8] R4
SB_MA[9] R5
SB_MA[10] AB5
SB_MA[11] P3
SB_MA[12] R3
SB_MA[13] AF7
SB_MA[14] P5
SB_MA[15] N1
SB_DQ[0]
B5
SB_DQ[1]
A5
SB_DQ[2]
C3
SB_DQ[3]
B3
SB_DQ[4]
E4
SB_DQ[5]
A6
SB_DQ[6]
A4
SB_DQ[7]
C4
SB_DQ[8]
D1
SB_DQ[9]
D2
SB_DQ[10]
F2
SB_DQ[11]
F1
SB_DQ[12]
C2
SB_DQ[13]
F5
SB_DQ[14]
F3
SB_DQ[15]
G4
SB_DQ[16]
H6
SB_DQ[17]
G2
SB_DQ[18]
J6
SB_DQ[19]
J3
SB_DQ[20]
G1
SB_DQ[21]
G5
SB_DQ[22]
J2
SB_DQ[23]
J1
SB_DQ[24]
J5
SB_DQ[25]
K2
SB_DQ[26]
L3
SB_DQ[27]
M1
SB_DQ[28]
K5
SB_DQ[29]
K4
SB_DQ[30]
M4
SB_DQ[31]
N5
SB_DQ[32]
AF3
SB_DQ[33]
AG1
SB_DQ[34]
AJ3
SB_DQ[35]
AK1
SB_DQ[36]
AG4
SB_DQ[37]
AG3
SB_DQ[38]
AJ4
SB_DQ[39]
AH4
SB_DQ[40]
AK3
SB_DQ[41]
AK4
SB_DQ[42]
AM6
SB_DQ[43]
AN2
SB_DQ[44]
AK5
SB_DQ[45]
AK2
SB_DQ[46]
AM4
SB_DQ[47]
AM3
SB_DQ[48]
AP3
SB_DQ[49]
AN5
SB_DQ[50]
AT4
SB_DQ[51]
AN6
SB_DQ[52]
AN4
SB_DQ[53]
AN3
SB_DQ[54]
AT5
SB_DQ[55]
AT6
SB_DQ[56]
AN7
SB_DQ[57]
AP6
SB_DQ[58]
AP8
SB_DQ[59]
AT9
SB_DQ[60]
AT7
SB_DQ[61]
AP9
SB_DQ[62]
AR10
SB_DQ[63]
AT10
DDR
SYSTEM
MEMORY
A
JCPUC
IC,AUB_CFD_rPGA,R0P9
@
DDR
SYSTEM
MEMORY
A
JCPUC
IC,AUB_CFD_rPGA,R0P9
@
SA_BS[0]
AC3
SA_BS[1]
AB2
SA_BS[2]
U7
SA_CAS#
AE1
SA_RAS#
AB3
SA_WE#
AE9
SA_CK[0] AA6
SA_CK[1] Y6
SA_CK#[0] AA7
SA_CK#[1] Y5
SA_CKE[0] P7
SA_CKE[1] P6
SA_CS#[0] AE2
SA_CS#[1] AE8
SA_ODT[0] AD8
SA_ODT[1] AF9
SA_DM[0] B9
SA_DM[1] D7
SA_DM[2] H7
SA_DM[3] M7
SA_DM[4] AG6
SA_DM[5] AM7
SA_DM[6] AN10
SA_DM[7] AN13
SA_DQS[0] C8
SA_DQS#[0] C9
SA_DQS[1] F9
SA_DQS#[1] F8
SA_DQS[2] H9
SA_DQS#[2] J9
SA_DQS[3] M9
SA_DQS#[3] N9
SA_DQS[4] AH8
SA_DQS#[4] AH7
SA_DQS[5] AK10
SA_DQS#[5] AK9
SA_DQS[6] AN11
SA_DQS#[6] AP11
SA_DQS[7] AR13
SA_DQS#[7] AT13
SA_MA[0] Y3
SA_MA[1] W1
SA_MA[2] AA8
SA_MA[3] AA3
SA_MA[4] V1
SA_MA[5] AA9
SA_MA[6] V8
SA_MA[7] T1
SA_MA[8] Y9
SA_MA[9] U6
SA_MA[10] AD4
SA_MA[11] T2
SA_MA[12] U3
SA_MA[13] AG8
SA_MA[14] T3
SA_MA[15] V9
SA_DQ[0]
A10
SA_DQ[1]
C10
SA_DQ[2]
C7
SA_DQ[3]
A7
SA_DQ[4]
B10
SA_DQ[5]
D10
SA_DQ[6]
E10
SA_DQ[7]
A8
SA_DQ[8]
D8
SA_DQ[9]
F10
SA_DQ[10]
E6
SA_DQ[11]
F7
SA_DQ[12]
E9
SA_DQ[13]
B7
SA_DQ[14]
E7
SA_DQ[15]
C6
SA_DQ[16]
H10
SA_DQ[17]
G8
SA_DQ[18]
K7
SA_DQ[19]
J8
SA_DQ[20]
G7
SA_DQ[21]
G10
SA_DQ[22]
J7
SA_DQ[23]
J10
SA_DQ[24]
L7
SA_DQ[25]
M6
SA_DQ[26]
M8
SA_DQ[27]
L9
SA_DQ[28]
L6
SA_DQ[29]
K8
SA_DQ[30]
N8
SA_DQ[31]
P9
SA_DQ[32]
AH5
SA_DQ[33]
AF5
SA_DQ[34]
AK6
SA_DQ[35]
AK7
SA_DQ[36]
AF6
SA_DQ[37]
AG5
SA_DQ[38]
AJ7
SA_DQ[39]
AJ6
SA_DQ[40]
AJ10
SA_DQ[41]
AJ9
SA_DQ[42]
AL10
SA_DQ[43]
AK12
SA_DQ[44]
AK8
SA_DQ[45]
AL7
SA_DQ[46]
AK11
SA_DQ[47]
AL8
SA_DQ[48]
AN8
SA_DQ[49]
AM10
SA_DQ[50]
AR11
SA_DQ[51]
AL11
SA_DQ[52]
AM9
SA_DQ[53]
AN9
SA_DQ[54]
AT11
SA_DQ[55]
AP12
SA_DQ[56]
AM12
SA_DQ[57]
AN12
SA_DQ[58]
AM13
SA_DQ[59]
AT14
SA_DQ[60]
AT12
SA_DQ[61]
AL13
SA_DQ[62]
AR14
SA_DQ[63]
AP14
8. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSENSE
VSSSENSE
VSSSENSE_R
H_DPRSLPVR_R
VCCSENSE_R
H_VTTSELECT
H_DPRSLPVR 56
VSSSENSE 56
CPU_VID1 56
VCCSENSE 56
CPU_VID0 56
H_PSI# 56
CPU_VID5 56
CPU_VID2 56
CPU_VID6 56
CPU_VID3 56
CPU_VID4 56
IMVP_IMON 56
VTT_SENSE 52
VSS_SENSE_VTT 52
+CPU_CORE
+CPU_CORE
+VTT
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU POWER-1
Custom
8 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU POWER-1
Custom
8 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU POWER-1
Custom
8 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Auburndale:48A
Clarksfield: 65A Clarksfield: 21A
Auburndale:18A
near CPU
(Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)
(Place these capacitors under CPU socket, top layer)
(Place these capacitors on CPU cavity, Bottom Layer)
TOP side (under inductor)
VTT Rail
Auburndale +1.1VS_VTT=1.05V
Clarksfield +1.1VS_VTT=1.1V
H_VTTSELECT = low, 1.1V
H_VTTSELECT = high, 1.05V
Check list:
+CPU_CORE: 6x 470uF, 12x 22uF, 17x 10uF
+VTT: 4x 330uF, 7x 22uF, 8x 10uF
Material Note (+VTT):
330uF/ 6mohm, number are 3,
power x1, HW x2
CRB default setting:
VID[6:0]=[0100111]
SGA00002680
SF000002Z00
H=4.5
Add on 2/8 to improve ESD
C112
22U_0805_6.3V6M
C112
22U_0805_6.3V6M
1
2
C127
0.1U_0402_16V4Z
C127
0.1U_0402_16V4Z
1
2
C92 10U_0805_10V4K
C92 10U_0805_10V4K
1 2
C101
10U_0805_10V4K
C101
10U_0805_10V4K
1
2
C116
22U_0805_6.3V6M
C116
22U_0805_6.3V6M
1
2
C74
10U_0805_10V4K
C74
10U_0805_10V4K
1
2
C100
10U_0805_10V4K
C100
10U_0805_10V4K
1
2
C89 10U_0805_10V4K
C89 10U_0805_10V4K
1 2
C75
10U_0805_10V4K
C75
10U_0805_10V4K
1
2
C120
0.1U_0402_16V4Z
C120
0.1U_0402_16V4Z
1
2
C108
22U_0805_6.3V6M
C108
22U_0805_6.3V6M
1
2
+
C123
330U_D2_2.5VM_R9M
+
C123
330U_D2_2.5VM_R9M
1
2
C77
10U_0805_10V4K
C77
10U_0805_10V4K
1
2
C88 10U_0805_10V4K
C88 10U_0805_10V4K
1 2
C107
22U_0805_6.3V6M
C107
22U_0805_6.3V6M
1
2
R66 0_0402_5%
R66 0_0402_5%
1 2
C76
10U_0805_10V4K
C76
10U_0805_10V4K
1
2
C102
10U_0805_10V4K
C102
10U_0805_10V4K
1
2
R65 0_0402_5%
R65 0_0402_5%
1 2
+
C121
330U_D2_2.5VM_R9M
+
C121
330U_D2_2.5VM_R9M
1
2
C83 10U_0805_10V4K
C83 10U_0805_10V4K
1 2
C128
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
1
2
C129
0.1U_0402_16V4Z
C129
0.1U_0402_16V4Z
1
2
C71
10U_0805_10V4K
C71
10U_0805_10V4K
1
2
R62 0_0402_5%
R62 0_0402_5%
1 2
C94 10U_0805_10V4K
@
C94 10U_0805_10V4K
@
1 2
C73
10U_0805_10V4K
C73
10U_0805_10V4K
1
2
+
C159 330U_2.5V_M_R17
+
C159 330U_2.5V_M_R17
1 2
C114
22U_0805_6.3V6M
C114
22U_0805_6.3V6M
1
2
POWER
CPU
CORE
SUPPLY
1.1V
RAIL
POWER
SENSE
LINES
CPU
VIDS
JCPUF
IC,AUB_CFD_rPGA,R0P9
@
POWER
CPU
CORE
SUPPLY
1.1V
RAIL
POWER
SENSE
LINES
CPU
VIDS
JCPUF
IC,AUB_CFD_rPGA,R0P9
@
ISENSE
AN35
VTT_SENSE
B15
PSI# AN33
VID[0]
AK35
VID[1]
AK33
VID[2]
AK34
VID[3] AL35
VID[4] AL33
VID[5]
AM33
VID[6] AM35
PROC_DPRSLPVR
AM34
VTT_SELECT
G15
VCC_SENSE AJ34
VSS_SENSE_VTT A15
VCC1
AG35
VCC2
AG34
VCC3
AG33
VCC4
AG32
VCC5
AG31
VCC6
AG30
VCC7
AG29
VCC8
AG28
VCC9
AG27
VCC10
AG26
VCC11
AF35
VCC12
AF34
VCC13
AF33
VCC14
AF32
VCC15
AF31
VCC16
AF30
VCC17
AF29
VCC18
AF28
VCC19
AF27
VCC20
AF26
VCC21
AD35
VCC22
AD34
VCC23
AD33
VCC24
AD32
VCC25
AD31
VCC26
AD30
VCC27
AD29
VCC28
AD28
VCC29
AD27
VCC30
AD26
VCC31
AC35
VCC32
AC34
VCC33
AC33
VCC34
AC32
VCC35
AC31
VCC36
AC30
VCC37
AC29
VCC38
AC28
VCC39
AC27
VCC40
AC26
VCC41
AA35
VCC42
AA34
VCC43
AA33
VCC44
AA32
VCC45
AA31
VCC46
AA30
VCC47
AA29
VCC48
AA28
VCC49
AA27
VCC50
AA26
VCC51
Y35
VCC52
Y34
VCC53
Y33
VCC54
Y32
VCC55
Y31
VCC56
Y30
VCC57
Y29
VCC58
Y28
VCC59
Y27
VCC60
Y26
VCC61
V35
VCC62
V34
VCC63
V33
VCC64
V32
VCC65
V31
VCC66
V30
VCC67
V29
VCC68
V28
VCC69
V27
VCC70
V26
VCC71
U35
VCC72
U34
VCC73
U33
VCC74
U32
VCC75
U31
VCC76
U30
VCC77
U29
VCC78
U28
VCC79
U27
VCC80
U26
VCC81
R35
VCC82
R34
VCC83
R33
VCC84
R32
VCC85
R31
VCC86
R30
VCC87
R29
VCC88
R28
VCC89
R27
VCC90
R26
VCC91
P35
VCC92
P34
VCC93
P33
VCC94
P32
VCC95
P31
VCC96
P30
VCC97
P29
VCC98
P28
VCC99
P27
VCC100
P26
VTT0_33
AF10
VTT0_34
AE10
VTT0_35 AC10
VTT0_36 AB10
VTT0_37
Y10
VTT0_38 W10
VTT0_39
U10
VTT0_40 T10
VTT0_41
J12
VTT0_42 J11
VTT0_1
AH14
VTT0_2 AH12
VTT0_3 AH11
VTT0_4 AH10
VTT0_5 J14
VTT0_6
J13
VTT0_7
H14
VTT0_8 H12
VTT0_9
G14
VTT0_10 G13
VTT0_11 G12
VTT0_12
G11
VTT0_13 F14
VTT0_14
F13
VTT0_15 F12
VTT0_16
F11
VTT0_17
E14
VTT0_18
E12
VTT0_19 D14
VTT0_20
D13
VTT0_21 D12
VTT0_22
D11
VTT0_23
C14
VTT0_24
C13
VTT0_25 C12
VTT0_26 C11
VTT0_27
B14
VTT0_28 B12
VTT0_29
A14
VTT0_30
A13
VTT0_31 A12
VTT0_32 A11
VSS_SENSE
AJ35
VTT0_43
J16
VTT0_44 J15
R64 100_0402_1%
R64 100_0402_1%
1 2
C113
22U_0805_6.3V6M
C113
22U_0805_6.3V6M
1
2
C118
0.1U_0402_16V4Z
C118
0.1U_0402_16V4Z
1
2
C91 22U_0805_6.3V6M
C91 22U_0805_6.3V6M
1 2
C110
22U_0805_6.3V6M
C110
22U_0805_6.3V6M
1
2
C111
22U_0805_6.3V6M
C111
22U_0805_6.3V6M
1
2
C79
10U_0805_10V4K
C79
10U_0805_10V4K
1
2
C90 10U_0805_10V4K
C90 10U_0805_10V4K
1 2
C105
22U_0805_6.3V6M
C105
22U_0805_6.3V6M
1
2
+
C122
330U_D2_2.5VM_R9M
+
C122
330U_D2_2.5VM_R9M
1
2
C78
10U_0805_10V4K
C78
10U_0805_10V4K
1
2
C109
22U_0805_6.3V6M
C109
22U_0805_6.3V6M
1
2
C99
10U_0805_10V4K
C99
10U_0805_10V4K
1
2
C106
22U_0805_6.3V6M
C106
22U_0805_6.3V6M
1
2
C104
10U_0805_10V4K
C104
10U_0805_10V4K
1
2
C85 10U_0805_10V4K
C85 10U_0805_10V4K
1 2
R67 100_0402_1%
R67 100_0402_1%
1 2
C98
10U_0805_10V4K
C98
10U_0805_10V4K
1
2
+
C124
330U_D2_2.5VM_R9M
+
C124
330U_D2_2.5VM_R9M
1
2
C103
10U_0805_10V4K
C103
10U_0805_10V4K
1
2
C117
0.1U_0402_16V4Z
C117
0.1U_0402_16V4Z
1
2
C119
0.1U_0402_16V4Z
C119
0.1U_0402_16V4Z
1
2
+
C144 330U_2.5V_M_R17
+
C144 330U_2.5V_M_R17
1 2
C87 22U_0805_6.3V6M
C87 22U_0805_6.3V6M
1 2
C115
22U_0805_6.3V6M
C115
22U_0805_6.3V6M
1
2
C72
10U_0805_10V4K
C72
10U_0805_10V4K
1
2
C81 10U_0805_10V4K
C81 10U_0805_10V4K
1 2
T56 PAD
T56 PAD
9. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS_H_PLL
SUSP
SUSP
GFXVR_DPRSLPVR
VSS_AXG_SENSE
VCC_AXG_SENSE
VCC_AXG_SENSE
VSS_AXG_SENSE
SUSP 47,55
VCC_AXG_SENSE 57
VSS_AXG_SENSE 57
GFXVR_VID_0 57
GFXVR_VID_1 57
GFXVR_VID_2 57
GFXVR_VID_3 57
GFXVR_VID_4 57
GFXVR_VID_5 57
GFXVR_VID_6 57
GFXVR_IMON 57
GFXVR_EN 57
+VTT
+VTT
+1.8VS
+1.5V_CPU
+VTT
+VTT
+1.5V
+1.5V_CPU
+1.5V
+VSB
+GFX_CORE
+GFX_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU POWER-2
B
9 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU POWER-2
B
9 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU POWER-2
B
9 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Clarksfield: 21A
Auburndale:18A
Clarksfield: 1.35A
Auburndale:1.35A
Clarksfield: 5A
Auburndale:3A
(Place these capacitors under CPU socket, top layer)
(Place these capacitors under CPU socket Edge, top layer)
(Place these capacitors under CPU socket, top layer)
For S3 Power Reduction
SGA00002680
Reserved for Clarksfield
To prevent glitch issue
Close to CPU
SGA00002680
C148
10U_0805_6.3V6M
C148
10U_0805_6.3V6M
1
2
C139
22U_0805_6.3V6M
C139
22U_0805_6.3V6M
1
2
C472
0.1U_0402_25V6
C472
0.1U_0402_25V6
1
2
C126
10U_0805_6.3V6M
C126
10U_0805_6.3V6M
1
2
C133
1U_0402_6.3V4Z
C133
1U_0402_6.3V4Z
1
2
C136
1U_0402_6.3V4Z
C136
1U_0402_6.3V4Z
1
2
R510 100_0402_1%
R510 100_0402_1%
1 2
C142
22U_0805_6.3V6M
C142
22U_0805_6.3V6M
1
2
PJ31
JUMP_43X79
@
PJ31
JUMP_43X79
@
1 1
2
2
C135
1U_0402_6.3V4Z
C135
1U_0402_6.3V4Z
1
2
C125
1U_0402_6.3V4Z
C125
1U_0402_6.3V4Z
1
2
C155
22U_0805_6.3V6M
C155
22U_0805_6.3V6M
1
2
C138
22U_0805_6.3V6M
C138
22U_0805_6.3V6M
1
2
R86 330_0402_5%
R86 330_0402_5%
1 2 C180 0.1U_0402_16V4Z
C180 0.1U_0402_16V4Z
1 2
Q46B
2N7002DW-T/R7_SOT363-6
Q46B
2N7002DW-T/R7_SOT363-6
3
5
4
POWER
GRAPHICS
VIDs
GRAPHICS
DDR3
-
1.5V
RAILS
FDI
PEG
&
DMI
SENSE
LINES
1.1V
1.8V
JCPUG
IC,AUB_CFD_rPGA,R0P9
@
POWER
GRAPHICS
VIDs
GRAPHICS
DDR3
-
1.5V
RAILS
FDI
PEG
&
DMI
SENSE
LINES
1.1V
1.8V
JCPUG
IC,AUB_CFD_rPGA,R0P9
@
GFX_VID[0] AM22
GFX_VID[1] AP22
GFX_VID[2] AN22
GFX_VID[3] AP23
GFX_VID[4] AM23
GFX_VID[5] AP24
GFX_VID[6] AN24
GFX_VR_EN AR25
GFX_DPRSLPVR AT25
GFX_IMON AM24
VAXG_SENSE AR22
VSSAXG_SENSE AT22
VAXG1
AT21
VAXG2
AT19
VAXG3
AT18
VAXG4
AT16
VAXG5
AR21
VAXG6
AR19
VAXG7
AR18
VAXG8
AR16
VAXG9
AP21
VAXG10
AP19
VAXG11
AP18
VAXG12
AP16
VAXG13
AN21
VAXG14
AN19
VAXG15
AN18
VAXG16
AN16
VAXG17
AM21
VAXG18
AM19
VAXG19
AM18
VAXG20
AM16
VAXG21
AL21
VAXG22
AL19
VAXG23
AL18
VAXG24
AL16
VAXG25
AK21
VAXG26
AK19
VAXG27
AK18
VAXG28
AK16
VAXG29
AJ21
VAXG30
AJ19
VAXG31
AJ18
VAXG32
AJ16
VAXG33
AH21
VAXG34
AH19
VAXG35
AH18
VAXG36
AH16
VTT1_45
J24
VTT1_46
J23
VTT1_47
H25
VTT1_48
K26
VTT1_49
J27
VTT1_50
J26
VTT1_51
J25
VTT1_52
H27
VTT1_53
G28
VTT1_54
G27
VTT1_55
G26
VTT1_56
F26
VTT1_57
E26
VTT1_58
E25
VDDQ1 AJ1
VDDQ2 AF1
VDDQ3 AE7
VDDQ4 AE4
VDDQ5 AC1
VDDQ6 AB7
VDDQ7 AB4
VDDQ8 Y1
VDDQ9 W7
VDDQ10 W4
VDDQ11 U1
VDDQ12 T7
VDDQ13 T4
VDDQ14 P1
VDDQ15 N7
VDDQ16 N4
VDDQ17 L1
VDDQ18 H1
VTT0_59 P10
VTT0_60 N10
VTT0_61 L10
VTT0_62 K10
VCCPLL1 L26
VCCPLL2 L27
VCCPLL3 M26
VTT1_63 J22
VTT1_64 J20
VTT1_65 J18
VTT1_66 H21
VTT1_67 H20
VTT1_68 H19
C134
1U_0402_6.3V4Z
C134
1U_0402_6.3V4Z
1
2
R417
820K_0402_5%
R417
820K_0402_5%
1
2
C141
22U_0805_6.3V6M
C141
22U_0805_6.3V6M
1
2
C179
10U_0805_10V4K
C179
10U_0805_10V4K
1
2
C145
22U_0805_6.3V6M
C145
22U_0805_6.3V6M
1
2
C147
22U_0805_6.3V6M
C147
22U_0805_6.3V6M
1
2
C153
2.2U_0603_6.3V4Z
C153
2.2U_0603_6.3V4Z
1
2
Q46A
2N7002DW-T/R7_SOT363-6
Q46A
2N7002DW-T/R7_SOT363-6
6
1
2
C154
4.7U_0603_6.3V6K
C154
4.7U_0603_6.3V6K
C140
22U_0805_6.3V6M
C140
22U_0805_6.3V6M
1
2
T8
PAD T8
PAD
C151
1U_0402_6.3V4Z
C151
1U_0402_6.3V4Z
1
2
Q33
FDS6676AS_SO8
Q33
FDS6676AS_SO8
S
1
S
2
S
3
G
4
D 8
D 7
D 6
D 5
C205 0.1U_0402_16V4Z
C205 0.1U_0402_16V4Z
1 2
R71 0_0805_5%
R71 0_0805_5%
1
2
PJ30
JUMP_43X79
@
PJ30
JUMP_43X79
@
1 1
2
2
+
C218
330U_D2_2.5VM_R9M
+
C218
330U_D2_2.5VM_R9M
1
2
C158
1U_0402_6.3V4Z
C158
1U_0402_6.3V4Z
1
2
R509 100_0402_1%
R509 100_0402_1%
1 2
C186 0.1U_0402_16V4Z
C186 0.1U_0402_16V4Z
1 2
R424
470_0805_5%
R424
470_0805_5%
1
2
C146
22U_0805_6.3V6M
C146
22U_0805_6.3V6M
1
2
C143
10U_0805_10V4K
C143
10U_0805_10V4K
1
2
C185 0.1U_0402_16V4Z
C185 0.1U_0402_16V4Z
1 2
+
C216
330U_D2_2.5VM_R9M
+
C216
330U_D2_2.5VM_R9M
1
2
C137
1U_0402_6.3V4Z
C137
1U_0402_6.3V4Z
1
2
R687 1K_0402_5%
@
R687 1K_0402_5%
@
1
2
R418
220K_0402_5%
R418
220K_0402_5%
1 2
C150
22U_0805_6.3V6M
C150
22U_0805_6.3V6M
1
2
C152
1U_0402_6.3V4Z
C152
1U_0402_6.3V4Z
1
2
10. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_NCTF1
H_NCTF2
H_NCTF6
H_NCTF7
CFG3
CFG6
CFG5
CFG4
CFG7
CFG10
CFG9
CFG8
CFG11
CFG15
CFG14
CFG13
CFG18
CFG17
CFG16
CFG0
CFG1
CFG2
RSVD17
RSVD18
RSVD64
RSVD65
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU GND/RESERVED/XDP
Custom
10 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU GND/RESERVED/XDP
Custom
10 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
CPU GND/RESERVED/XDP
Custom
10 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
WW41 Recommend not pull down
PCIE2.0 Jitter is over on ES1
(SA_DIMM_VREF)
(SB_DIMM_VREF)
CFG0 - PCI-Express Configuration Select
*1:Single PEG
0:Bifurcation enabled
*1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
CFG4 - Display Port Presence
*:Default
*1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
CFG3 - PCI-Express Static Lane Reversal
Reserve via for test
VSS
JCPUH
IC,AUB_CFD_rPGA,R0P9
@
VSS
JCPUH
IC,AUB_CFD_rPGA,R0P9
@
VSS1
AT20
VSS2
AT17
VSS3
AR31
VSS4
AR28
VSS5
AR26
VSS6
AR24
VSS7
AR23
VSS8
AR20
VSS9
AR17
VSS10
AR15
VSS11
AR12
VSS12
AR9
VSS13
AR6
VSS14
AR3
VSS15
AP20
VSS16
AP17
VSS17
AP13
VSS18
AP10
VSS19
AP7
VSS20
AP4
VSS21
AP2
VSS22
AN34
VSS23
AN31
VSS24
AN23
VSS25
AN20
VSS26
AN17
VSS27
AM29
VSS28
AM27
VSS29
AM25
VSS30
AM20
VSS31
AM17
VSS32
AM14
VSS33
AM11
VSS34
AM8
VSS35
AM5
VSS36
AM2
VSS37
AL34
VSS38
AL31
VSS39
AL23
VSS40
AL20
VSS41
AL17
VSS42
AL12
VSS43
AL9
VSS44
AL6
VSS45
AL3
VSS46
AK29
VSS47
AK27
VSS48
AK25
VSS49
AK20
VSS50
AK17
VSS51
AJ31
VSS52
AJ23
VSS53
AJ20
VSS54
AJ17
VSS55
AJ14
VSS56
AJ11
VSS57
AJ8
VSS58
AJ5
VSS59
AJ2
VSS60
AH35
VSS61
AH34
VSS62
AH33
VSS63
AH32
VSS64
AH31
VSS65
AH30
VSS66
AH29
VSS67
AH28
VSS68
AH27
VSS69
AH26
VSS70
AH20
VSS71
AH17
VSS72
AH13
VSS73
AH9
VSS74
AH6
VSS75
AH3
VSS76
AG10
VSS77
AF8
VSS78
AF4
VSS79
AF2
VSS80
AE35
VSS81 AE34
VSS82 AE33
VSS83 AE32
VSS84 AE31
VSS85 AE30
VSS86 AE29
VSS87 AE28
VSS88 AE27
VSS89 AE26
VSS90 AE6
VSS91 AD10
VSS92 AC8
VSS93 AC4
VSS94 AC2
VSS95 AB35
VSS96 AB34
VSS97 AB33
VSS98 AB32
VSS99 AB31
VSS100 AB30
VSS101 AB29
VSS102 AB28
VSS103 AB27
VSS104 AB26
VSS105 AB6
VSS106 AA10
VSS107 Y8
VSS108 Y4
VSS109 Y2
VSS110 W35
VSS111 W34
VSS112 W33
VSS113 W32
VSS114 W31
VSS115 W30
VSS116 W29
VSS117 W28
VSS118 W27
VSS119 W26
VSS120 W6
VSS121 V10
VSS122 U8
VSS123 U4
VSS124 U2
VSS125 T35
VSS126 T34
VSS127 T33
VSS128 T32
VSS129 T31
VSS130 T30
VSS131 T29
VSS132 T28
VSS133 T27
VSS134 T26
VSS135 T6
VSS136 R10
VSS137 P8
VSS138 P4
VSS139 P2
VSS140 N35
VSS141 N34
VSS142 N33
VSS143 N32
VSS144 N31
VSS145 N30
VSS146 N29
VSS147 N28
VSS148 N27
VSS149 N26
VSS150 N6
VSS151 M10
VSS152 L35
VSS153 L32
VSS154 L29
VSS155 L8
VSS156 L5
VSS157 L2
VSS158 K34
VSS159 K33
VSS160 K30
T55 PAD
T55 PAD
R76
3.01K_0402_1% @R76
3.01K_0402_1% @
1 2
T6
PAD T6
PAD
T54 PAD
T54 PAD
T4
PAD T4
PAD
R74
3.01K_0402_1% @R74
3.01K_0402_1% @
1 2
VSS
NCTF
JCPUI
IC,AUB_CFD_rPGA,R0P9
@
VSS
NCTF
JCPUI
IC,AUB_CFD_rPGA,R0P9
@
VSS161
K27
VSS162
K9
VSS163
K6
VSS164
K3
VSS165
J32
VSS166
J30
VSS167
J21
VSS168
J19
VSS169
H35
VSS170
H32
VSS171
H28
VSS172
H26
VSS173
H24
VSS174
H22
VSS175
H18
VSS176
H15
VSS177
H13
VSS178
H11
VSS179
H8
VSS180
H5
VSS181
H2
VSS182
G34
VSS183
G31
VSS184
G20
VSS185
G9
VSS186
G6
VSS187
G3
VSS188
F30
VSS189
F27
VSS190
F25
VSS191
F22
VSS192
F19
VSS193
F16
VSS194
E35
VSS195
E32
VSS196
E29
VSS197
E24
VSS198
E21
VSS199
E18
VSS200
E13
VSS201
E11
VSS202
E8
VSS203
E5
VSS204
E2
VSS205
D33
VSS206
D30
VSS207
D26
VSS208
D9
VSS209
D6
VSS210
D3
VSS211
C34
VSS212
C32
VSS213
C29
VSS214
C28
VSS215
C24
VSS216
C22
VSS217
C20
VSS218
C19
VSS219
C16
VSS220
B31
VSS221
B25
VSS222
B21
VSS223
B18
VSS224
B17
VSS225
B13
VSS226
B11
VSS227
B8
VSS228
B6
VSS229
B4
VSS230
A29
VSS_NCTF1 AT35
VSS_NCTF2 AT1
VSS_NCTF3 AR34
VSS_NCTF4 B34
VSS_NCTF5 B2
VSS_NCTF6 B1
VSS_NCTF7 A35
VSS231
A27
VSS232
A23
VSS233
A9
T5
PAD T5
PAD
T7
PAD T7
PAD
R75
3.01K_0402_1% @R75
3.01K_0402_1% @
1 2
RESERVED
JCPUE
IC,AUB_CFD_rPGA,R0P9
@
RESERVED
JCPUE
IC,AUB_CFD_rPGA,R0P9
@
CFG[0]
AM30
CFG[1]
AM28
CFG[2]
AP31
CFG[3]
AL32
CFG[4]
AL30
CFG[5]
AM31
CFG[6]
AN29
CFG[7]
AM32
CFG[8]
AK32
CFG[9]
AK31
CFG[10]
AK28
CFG[11]
AJ28
CFG[12]
AN30
CFG[13]
AN32
CFG[14]
AJ32
CFG[15]
AJ29
CFG[16]
AJ30
CFG[17]
AK30
RSVD34 AH25
RSVD35 AK26
RSVD38 AJ26
RSVD_NCTF_42 AT3
RSVD39 AJ27
RSVD_NCTF_40 AP1
RSVD_NCTF_41 AT2
RSVD_NCTF_43 AR1
RSVD_TP_86
H16
RSVD45 AL28
RSVD46 AL29
RSVD47 AP30
RSVD48 AP32
RSVD49 AL27
RSVD50 AT31
RSVD51 AT32
RSVD52 AP33
RSVD53 AR33
RSVD_NCTF_54 AT33
RSVD_NCTF_55 AT34
RSVD_NCTF_56 AP35
RSVD_NCTF_57 AR35
RSVD58 AR32
RSVD_NCTF_30
C35
RSVD_NCTF_31
B35
RSVD_NCTF_28
A34
RSVD_NCTF_29
A33
RSVD27
J28
RSVD26
J29
RSVD16
A19
RSVD15
B19
RSVD17
A20
RSVD18
B20
RSVD20
T9
RSVD19
U9
RSVD22
AB9
RSVD21
AC9
RSVD_NCTF_23
C1
RSVD_NCTF_24
A3
RSVD_TP_66 AA5
RSVD_TP_67 AA4
RSVD_TP_68 R8
RSVD_TP_71 AA2
RSVD_TP_72 AA1
RSVD_TP_73 R9
RSVD_TP_69 AD3
RSVD_TP_74 AG7
RSVD_TP_70 AD2
RSVD_TP_75 AE3
RSVD_TP_76 V4
RSVD_TP_77 V5
RSVD_TP_78 N2
RSVD_TP_81 W3
RSVD_TP_82 W2
RSVD_TP_83 N3
RSVD_TP_79 AD5
RSVD_TP_84 AE5
RSVD_TP_80 AD7
RSVD_TP_85 AD9
RSVD36 AL26
RSVD_NCTF_37 AR2
RSVD1
AP25
RSVD2
AL25
RSVD3
AL24
RSVD4
AL22
RSVD5
AJ33
RSVD6
AG9
RSVD7
M27
RSVD8
L28
RSVD9
J17
RSVD10
H17
RSVD11
G25
RSVD12
G17
RSVD13
E31
RSVD14
E30
RSVD32 AJ13
RSVD33 AJ12
RSVD_TP_59 E15
RSVD_TP_60 F15
KEY A2
RSVD62 D15
RSVD63 C15
RSVD64 AJ15
RSVD65 AH15
VSS AP34
11. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D3
DDR_A_DM1
DDR_A_D18
DDR_A_DM3
DDR_A_D27
DDR_A_MA3
DDR_A_D41
DDR_A_D30
DDR_A_MA7
DDR_A_D1
DDR_A_D5
DDR_A_DQS0
DDR_A_D12
DDR_A_D24
DDR_A_DM7
DDR_A_DQS3
DDR_A_D62
DDR_A_D43
DDR_A_DQS6
DDR_A_D46
DDR_A_MA13
DDR_A_D40
DDR_A_D51
DDR_A_D59
DDR_A_D22
DDR_A_D28
DDR_A_D37
DDR_A_D45
DDR_A_D53
DDR_A_D26
DDR_A_MA5
DDR_A_D35
DDR_A_DM2
DDR_A_MA15
DDR_A_MA6
DDR_A_MA2
DDR_A_D47
DDR_A_D52
DDR_A_DM5
DDR_A_DQS#5
DDR_A_DM6
DDR_A_D25
DDR_A_D49
DDR_A_D56
DDR_A_D57
DDR_A_DQS1
DDR_A_D20
DDR_A_MA8
DDR_A_D34
DDR_A_MA4
DDR_A_D60
DDR_A_D32
DDR_A_DQS4
DDR_A_D29
DDR_A_MA14
DDR_A_D38
DDR_A_D61
DDR_A_D0
DDR_A_D19
DDR_A_MA10
DDR_A_D58
DDR_A_D21
DDR_A_D31
DDR_A_MA1
DDR_A_D23
DDR_A_D36
DDR_A_D54
DDR_A_D8
DDR_A_D13
DDR_A_D48
DDR_A_D55
DDR_A_DQS#1
DDR_A_D11
DDR_A_D16
DDR_A_D50
DDR_A_DM0
DDR_A_D14
DDR_A_D17
DDR_A_DQS2
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS#3
DDR_A_MA0
DDR_A_D39
DDR_A_DQS7
DDR_A_D7
DDR_A_D15
DDR_A_DQS#6
DDR_A_D44
DDR_A_DQS5
DDR_A_D63
DDR_A_D9
DDR_A_D4
DDR_A_MA12
DDR_A_D42
DDR_A_D2
DDR_A_D10
DDR_A_DQS#0
DDR_A_D6
DDR_A_DQS#2
DDR_A_MA9
DDR_A_MA11
DDR_A_DM4
DDR_A_DQS#7
+DDR_VREF_CA_DIMMA
DDRA_CKE1 7
DDRA_CKE0
7
DDR_A_RAS# 7
DDRA_ODT1 7
DDR_A_BS0
7
DDRA_CLK0#
7
DDR_A_WE#
7
DDR_A_BS2
7
PM_SMBCLK 12,25,29,39
DDRA_ODT0 7
DDR_A_BS1 7
DDRA_SCS0# 7
DDR_A_CAS#
7
DDRA_CLK1 7
DDRA_SCS1#
7
PM_SMBDATA 12,25,29,39
SM_DRAMRST# 5,12
PM_EXTTS# 5,12
DDRA_CLK1# 7
DDRA_CLK0
7
DDR_A_DQS#[0..7]
7
DDR_A_DQS[0..7]
7
DDR_A_D[0..63]
7
DDR_A_DM[0..7]
7
DDR_A_MA[0..15]
7
+1.5V
+V_DDR3_DIMM_REF
+3VS
+0.75VS
+1.5V
+VREF_DQA
+0.75VS
+V_DDR3_DIMM_REF
+1.5V
+1.5V
+1.5V +0.75VS
+1.5V
+VREF_DQA
+VREF_DQB
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
DDRIII-SODIMM0
Custom
11 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
DDRIII-SODIMM0
Custom
11 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
DDRIII-SODIMM0
Custom
11 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Reverse Type
DDR3 SO-DIMM A
close to JDDRH.1
close to JDDRH.126
Layout Note:
Place near JDDRH
Layout Note:
Place near JDDRH.203 and 204
Layout Note: Place these 4 Caps near
Command and Control signals of DIMMA
For S3 Power Reduction
SGA00002680
C171 10U_0805_6.3V6M
C171 10U_0805_6.3V6M
1 2
C156
0.1U_0402_16V4Z
C156
0.1U_0402_16V4Z
1
2
C172 1U_0402_6.3V4Z
C172 1U_0402_6.3V4Z
1
2
C168 10U_0805_6.3V6M
C168 10U_0805_6.3V6M
1 2
C175 1U_0402_6.3V4Z
C175 1U_0402_6.3V4Z
1
2
C162
0.1U_0402_16V4Z
C162
0.1U_0402_16V4Z
1
2
C169 1U_0402_6.3V4Z
C169 1U_0402_6.3V4Z
1
2
R93
0_0402_5% R93
0_0402_5%
1
2
C161
2.2U_0603_6.3V4Z
C161
2.2U_0603_6.3V4Z
1
2
C177 1U_0402_6.3V4Z
C177 1U_0402_6.3V4Z
1
2
C167 0.1U_0402_16V4Z
C167 0.1U_0402_16V4Z
1 2
C157
2.2U_0603_6.3V4Z
C157
2.2U_0603_6.3V4Z
1
2
R81
1K_0402_1%
R81
1K_0402_1%
1
2
C173 0.1U_0402_16V4Z
C173 0.1U_0402_16V4Z
1 2
C182
0.1U_0402_16V4Z
C182
0.1U_0402_16V4Z
1
2
C181
2.2U_0603_6.3V4Z
C181
2.2U_0603_6.3V4Z
1
2
JDDRH
FOX_AS0A626-UARN-7F_204P
@
JDDRH
FOX_AS0A626-UARN-7F_204P
@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
BOSS1 206
GND2
207 BOSS2 208
+
C163 330U_D2_2.5VM_R9M
+
C163 330U_D2_2.5VM_R9M
1 2
C164 0.1U_0402_16V4Z
C164 0.1U_0402_16V4Z
1 2
C166 10U_0805_6.3V6M
C166 10U_0805_6.3V6M
1 2
C178 10U_0805_6.3V6M
C178 10U_0805_6.3V6M
1 2
R90
10K_0402_5%
R90
10K_0402_5%
1 2
R91
10K_0402_5%
R91
10K_0402_5%
1
2
R80
1K_0402_1%
R80
1K_0402_1%
1
2
C165 10U_0805_6.3V6M
C165 10U_0805_6.3V6M
1 2
R89
0_0402_5%
R89
0_0402_5%
1 2
C176 10U_0805_6.3V6M
C176 10U_0805_6.3V6M
1 2
C174 10U_0805_6.3V6M
C174 10U_0805_6.3V6M
1 2
R79
1K_0402_1%
R79
1K_0402_1%
1
2
R92
0_0402_5% R92
0_0402_5%
1
2
C170 0.1U_0402_16V4Z
C170 0.1U_0402_16V4Z
1 2
12. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_B_D25
DDR_B_D26
DDR_B_D32
DDR_B_D55
DDR_B_D8
DDR_B_MA12
DDR_B_D43
DDR_B_DQS#6
DDR_B_D1
DDR_B_DQS#0
DDR_B_D15
DDR_B_D48
DDR_B_DM7
DDR_B_D30
DDR_B_D38
DDR_B_D52
DDR_B_D53
DDR_B_D20
DDR_B_D17
DDR_B_D50
DDR_B_D51
DDR_B_D23
DDR_B_MA6
DDR_B_D47
DDR_B_D9
DDR_B_D18
DDR_B_MA10
DDR_B_DQS#3
DDR_B_MA15
DDR_B_D46
DDR_B_D16
DDR_B_DQS#4
DDR_B_D35
DDR_B_D56
DDR_B_D29
DDR_B_MA11
DDR_B_MA4
DDR_B_D0
DDR_B_D13
DDR_B_D41
DDR_B_D21
DDR_B_MA7
DDR_B_D36
DDR_B_DM4
DDR_B_D54
DDR_B_D63
DDR_B_DQS#1
DDR_B_D19
DDR_B_D24
DDR_B_MA8
DDR_B_MA3
DDR_B_D57
DDR_B_DQS3
DDR_B_MA14
DDR_B_DQS#7
DDR_B_D44
DDR_B_D45
DDR_B_DM0
DDR_B_D2
DDR_B_MA9
DDR_B_MA13
DDR_B_D49
DDR_B_D61
DDR_B_D11
DDR_B_DQS0
DDR_B_MA1
DDR_B_D33
DDR_B_D31
DDR_B_MA2
DDR_B_DQS5
DDR_B_DM6
DDR_B_DQS7
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_MA5
DDR_B_D34
DDR_B_DM5
DDR_B_D58
DDR_B_D28
DDR_B_MA0
DDR_B_D62
DDR_B_D42
DDR_B_DQS6
DDR_B_D39
DDR_B_DQS#5
DDR_B_D60
DDR_B_DQS1
DDR_B_D10
DDR_B_D12
DDR_B_D40
DDR_B_DM2
DDR_B_D22
DDR_B_D7
DDR_B_DM1
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_DM3
DDR_B_DQS4
DDR_B_D14
DDR_B_D27
DDR_B_D59
DDR_B_D37
+DDR_VREF_CA_DIMMB
DDRB_CLK1# 7
DDR_B_CAS#
7
PM_SMBDATA 11,25,29,39
DDR_B_RAS# 7
DDR_B_BS0
7
DDRB_ODT1 7
DDRB_CLK0#
7
DDRB_CKE1 7
DDR_B_BS1 7
DDR_B_BS2
7
DDRB_CLK0
7
DDRB_SCS1#
7
PM_EXTTS# 5,11
DDRB_SCS0# 7
DDRB_CLK1 7
DDRB_ODT0 7
DDRB_CKE0
7
PM_SMBCLK 11,25,29,39
SM_DRAMRST# 5,11
DDR_B_WE#
7
DDR_B_DQS#[0..7]
7
DDR_B_DQS[0..7]
7
DDR_B_D[0..63]
7
DDR_B_MA[0..15]
7
DDR_B_DM[0..7]
7
+0.75VS
+V_DDR3_DIMM_REF
+1.5V
+3VS
+1.5V
+VREF_DQB
+0.75VS
+1.5V
+0.75VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
DDRIII-SODIMM1
Custom
12 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
DDRIII-SODIMM1
Custom
12 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
DDRIII-SODIMM1
Custom
12 61
Monday, March 22, 2010
2009/11/13 2010/01/23
Compal Electronics, Inc.
Reverse Type
DDR3 SO-DIMM B
close to JDDRL.1
close to JDDRL.126
Layout Note:
Place near JDDRL
Layout Note:
Place near JDDRL.203 and 204
Layout Note: Place these 4 Caps near
Command and Control signals of DIMMB
JDDRL
FOX_AS0A626-U2RN-7F_204P
@
JDDRL
FOX_AS0A626-U2RN-7F_204P
@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
BOSS1 206
GND2
207 BOSS2 208
C197 10U_0805_6.3V6M
C197 10U_0805_6.3V6M
1 2
C190 0.1U_0402_16V4Z
C190 0.1U_0402_16V4Z
1 2
R97
0_0402_5%
R97
0_0402_5%
1 2
C193 0.1U_0402_16V4Z
C193 0.1U_0402_16V4Z
1 2
C199 0.1U_0402_16V4Z
C199 0.1U_0402_16V4Z
1 2
R98
10K_0402_5%
R98
10K_0402_5%
1 2
R99
10K_0402_5%
R99
10K_0402_5%
1 2
C195 1U_0402_6.3V4Z
C195 1U_0402_6.3V4Z
1
2
C184
0.1U_0402_16V4Z
C184
0.1U_0402_16V4Z
1
2
C196 0.1U_0402_16V4Z
C196 0.1U_0402_16V4Z
1 2
C201 1U_0402_6.3V4Z
C201 1U_0402_6.3V4Z
1
2
C187
2.2U_0603_6.3V4Z
C187
2.2U_0603_6.3V4Z
1
2
C194 10U_0805_6.3V6M
C194 10U_0805_6.3V6M
1 2
C183
2.2U_0603_6.3V4Z
C183
2.2U_0603_6.3V4Z
1
2
C192 10U_0805_6.3V6M
C192 10U_0805_6.3V6M
1 2
C191 10U_0805_6.3V6M
C191 10U_0805_6.3V6M
1 2
C202 10U_0805_6.3V6M
C202 10U_0805_6.3V6M
1 2
C188
0.1U_0402_16V4Z
C188
0.1U_0402_16V4Z
1
2
C208
0.1U_0402_16V4Z
C208
0.1U_0402_16V4Z
1
2
C200 10U_0805_6.3V6M
C200 10U_0805_6.3V6M
1 2
C207
2.2U_0603_6.3V4Z
C207
2.2U_0603_6.3V4Z
1
2
+
C189 330U_B2_2.5VM_R15M
@
+
C189 330U_B2_2.5VM_R15M
@
1 2
C204 10U_0805_6.3V6M
C204 10U_0805_6.3V6M
1 2
C203 1U_0402_6.3V4Z
C203 1U_0402_6.3V4Z
1
2
C198 1U_0402_6.3V4Z
C198 1U_0402_6.3V4Z
1
2
13. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P11
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLKREQ_VGA#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
+DACB_VDD
VGA_EDID_DATA
VGA_EDID_CLK
VGA_CRT_DAT
VGA_CRT_CLK
XTALIN
+PLLVDD
+PLLVDD
+SP_PLLVDD
+SP_PLLVDD
VGA_PWM
VGA_ENBKL
VGA_ENVDD
GPU_VID0
THERM#_VGA
VGA_CRT_DAT
VGA_CRT_CLK
HDCP_SCL
HDCP_SDA
THERM#_VGA
SMB_DATA_GPU
SMB_CLK_GPU
SMB_DATA_GPU
SMB_CLK_GPU
VGA_EDID_DATA
VGA_EDID_CLK
VGA_ENVDD
PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
VGA_ENBKL
VGA_PWM
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
GPU_VID1
I2CB_SCL
I2CB_SDA
I2CB_SCL
I2CB_SDA
XTALSSIN
VGA_HDMI_HPD
VGA_HDMI_HPD
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_GTX_CRX_N0
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N15
PCIE_GTX_CRX_P15
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
HDCP_SDA
HDCP_SCL
PLTRST_VGA#_R
+DACA_VDD
VGA_CRT_VSYNC
VGA_CRT_HSYNC
VGA_CRT_G
VGA_CRT_B
VGA_CRT_R
+DACA_VREF
DACA_RSET
VGA_CRT_G
VGA_CRT_B
VGA_CRT_R
XTALSSIN
CLKREQ_VGA#
XTAL_OUT
XTALIN
XTAL_OUT
THERM#_VGA 14
PCIE_GTX_C_CRX_P[0..15]
6
PCIE_GTX_C_CRX_N[0..15]
6
PCIE_CTX_C_GRX_P[0..15]
6
PCIE_CTX_C_GRX_N[0..15]
6
GPU_VID0 58
GPU_VID1 58
CLK_PCIE_VGA
29
CLK_PCIE_VGA#
29
27M_CLK
25
SMB_CLK_GPU
14
SMB_DATA_GPU
14
27M_SSC
25
PLTRST_VGA#
32
CLKREQ_PEG#
29
DGPU_PWR_EN
33,47,58
+1.05VS_DGPU
+1.05VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
PCIE/DAC/GPIO
13 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
PCIE/DAC/GPIO
13 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
PCIE/DAC/GPIO
13 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Differential signal
LVDS
CRT
150mA , 10mil
150mA , 10mil
Internal Thermal Sensor
LANE Reversal
Close to GPU
Reserve vias for EVT debug
Reserved for internal SSC
Another at page47
Reserve 27MHZ Crystal at Pre-MP
CV24 0.1U_0402_10V7K
CV24 0.1U_0402_10V7K
1 2
YV1
27MHZ_16PF_X5H027000FG1H
@
YV1
27MHZ_16PF_X5H027000FG1H
@
1 2
RV15 10K_0402_5%
RV15 10K_0402_5%
1 2
RV122 2.2K_0402_5%
RV122 2.2K_0402_5%
1 2
CV12
0.1U_0402_16V4Z
CV12
0.1U_0402_16V4Z
1
2
CV23 0.1U_0402_10V7K
CV23 0.1U_0402_10V7K
1 2
CV20 0.1U_0402_10V7K
CV20 0.1U_0402_10V7K
1 2
CV41 0.1U_0402_10V7K
CV41 0.1U_0402_10V7K
1 2
CV11
0.1U_0402_16V4Z
CV11
0.1U_0402_16V4Z
1
2
RV3 10K_0402_5%
@
RV3 10K_0402_5%
@
1
2
RV1 10K_0402_5%
@
RV1 10K_0402_5%
@
1 2
CV9
4.7U_0603_6.3V6K
CV9
4.7U_0603_6.3V6K
1
2
CV28 0.1U_0402_10V7K
CV28 0.1U_0402_10V7K
1 2
RV103 0_0402_5%
RV103 0_0402_5%
1 2
CV26 0.1U_0402_10V7K
CV26 0.1U_0402_10V7K
1 2
CV21 0.1U_0402_10V7K
CV21 0.1U_0402_10V7K
1 2
RV124
10K_0402_5%
RV124
10K_0402_5%
1
2
CV10
1U_0402_6.3V4Z
CV10
1U_0402_6.3V4Z
1
2
RV20 75_0402_1%
RV20 75_0402_1%
1 2
RV19 2.49K_0402_1%
RV19 2.49K_0402_1%
1 2
RV12 2.2K_0402_5%
RV12 2.2K_0402_5%
1 2
RV118
10K_0402_5%
RV118
10K_0402_5%
1
2
CV33 0.1U_0402_10V7K
CV33 0.1U_0402_10V7K
1 2
CV45
20P_0402_50V8J
@
CV45
20P_0402_50V8J
@
1
2
CV22 0.1U_0402_10V7K
CV22 0.1U_0402_10V7K
1 2
RV26
10K_0402_5%
RV26
10K_0402_5%
1
2
RV7 2.2K_0402_5%
RV7 2.2K_0402_5%
1 2
CV42 0.1U_0402_10V7K
CV42 0.1U_0402_10V7K
1 2
CV18 0.1U_0402_10V7K
CV18 0.1U_0402_10V7K
1 2
CV29 0.1U_0402_10V7K
CV29 0.1U_0402_10V7K
1 2
RV13 2.2K_0402_5%
RV13 2.2K_0402_5%
1 2
LV2
100NH_LQW18ANR10J00D_5%_0603
LV2
100NH_LQW18ANR10J00D_5%_0603
1 2
TV6
TV6
RV18 0_0402_5%
RV18 0_0402_5%
1 2
CV14 0.1U_0402_10V7K
CV14 0.1U_0402_10V7K
1 2
CV47
0.1U_0402_16V4Z
CV47
0.1U_0402_16V4Z
1
2
RV11 2.2K_0402_5%
RV11 2.2K_0402_5%
1 2
CV37 0.1U_0402_10V7K
CV37 0.1U_0402_10V7K
1 2
RV28
10K_0402_5%
@
RV28
10K_0402_5%
@
1 2
CV13 0.1U_0402_10V7K
CV13 0.1U_0402_10V7K
1 2
CV46
20P_0402_50V8J
@
CV46
20P_0402_50V8J
@
1
2
CV35 0.1U_0402_10V7K
CV35 0.1U_0402_10V7K
1 2
RV17 10K_0402_5%
RV17 10K_0402_5%
1 2
CV19 0.1U_0402_10V7K
CV19 0.1U_0402_10V7K
1 2
RV10 100K_0402_5%
RV10 100K_0402_5%
1 2
CV31 0.1U_0402_10V7K
CV31 0.1U_0402_10V7K
1 2
CV43 0.1U_0402_10V7K
CV43 0.1U_0402_10V7K
1 2
CV15 0.1U_0402_10V7K
CV15 0.1U_0402_10V7K
1 2
CV16 0.1U_0402_10V7K
CV16 0.1U_0402_10V7K
1 2
RV23 75_0402_1%
RV23 75_0402_1%
1 2
CV40 0.1U_0402_10V7K
CV40 0.1U_0402_10V7K
1 2
RV31 10K_0402_5%
RV31 10K_0402_5%
1
2
RV5 100K_0402_5%
RV5 100K_0402_5%
1 2
CV32 0.1U_0402_10V7K
CV32 0.1U_0402_10V7K
1 2
RV6 2.2K_0402_5%
RV6 2.2K_0402_5%
1 2
RV8 2.2K_0402_5%
RV8 2.2K_0402_5%
1 2
CV34 0.1U_0402_10V7K
CV34 0.1U_0402_10V7K
1 2
CV36 0.1U_0402_10V7K
CV36 0.1U_0402_10V7K
1 2
RV21 75_0402_1%
RV21 75_0402_1%
1 2
CV8
4.7U_0603_6.3V6K
CV8
4.7U_0603_6.3V6K
1
2
RV121 2.2K_0402_5%
RV121 2.2K_0402_5%
1 2
RV32 0_0402_5%
RV32 0_0402_5%
1
2
LV1
100NH_LQW18ANR10J00D_5%_0603
LV1
100NH_LQW18ANR10J00D_5%_0603
1 2
RV16 200_0402_1%
@RV16 200_0402_1%
@
1 2
RV29 10M_0402_5%
@
RV29 10M_0402_5%
@
1 2
CV39 0.1U_0402_10V7K
CV39 0.1U_0402_10V7K
1 2
RV9 2.2K_0402_5%
RV9 2.2K_0402_5%
1 2
RV14 2.2K_0402_5%
RV14 2.2K_0402_5%
1 2
CV44 0.1U_0402_10V7K
CV44 0.1U_0402_10V7K
1 2
DVO
PCI
EXPRESS
CLK
Part 1 of 7
DACs
I2C
GPIO
UV1A
N11P-LP1-A3_BGA969 N11PR3@
DVO
PCI
EXPRESS
CLK
Part 1 of 7
DACs
I2C
GPIO
UV1A
N11P-LP1-A3_BGA969 N11PR3@
PEX_RX0
AP17
PEX_RX0_N
AN17
PEX_RX1
AN19
PEX_RX1_N
AP19
PEX_RX2
AR19
PEX_RX2_N
AR20
PEX_RX3
AP20
PEX_RX3_N
AN20
PEX_RX4
AN22
PEX_RX4_N
AP22
PEX_RX5
AR22
PEX_RX5_N
AR23
PEX_RX6
AP23
PEX_RX6_N
AN23
PEX_RX7
AN25
PEX_RX7_N
AP25
PEX_RX8
AR25
PEX_RX8_N
AR26
PEX_RX9
AP26
PEX_RX9_N
AN26
PEX_RX10
AN28
PEX_RX10_N
AP28
PEX_RX11
AR28
PEX_RX11_N
AR29
PEX_RX12
AP29
PEX_RX12_N
AN29
PEX_RX13
AN31
PEX_RX13_N
AP31
PEX_RX14
AR31
PEX_RX14_N
AR32
PEX_RX15
AR34
PEX_RX15_N
AP34
PEX_TX0
AL17
PEX_TX0_N
AM17
PEX_TX1
AM18
PEX_TX1_N
AM19
PEX_TX2
AL19
PEX_TX2_N
AK19
PEX_TX3
AL20
PEX_TX3_N
AM20
PEX_TX4
AM21
PEX_TX4_N
AM22
PEX_TX5
AL22
PEX_TX5_N
AK22
PEX_TX6
AL23
PEX_TX6_N
AM23
PEX_TX7
AM24
PEX_TX7_N
AM25
PEX_TX8
AL25
PEX_TX8_N
AK25
PEX_TX9
AL26
PEX_TX9_N
AM26
PEX_TX10
AM27
PEX_TX10_N
AM28
PEX_TX11
AL28
PEX_TX11_N
AK28
PEX_TX12
AK29
PEX_TX12_N
AL29
PEX_TX13
AM29
PEX_TX13_N
AM30
PEX_TX14
AM31
PEX_TX14_N
AM32
PEX_TX15
AN32
PEX_TX15_N
AP32
PEX_REFCLK
AR16
PEX_REFCLK_N
AR17
PEX_RST_N
AM16
XTAL_IN
B1
XTAL_OUT
B2
XTAL_OUTBUFF
D1
XTAL_SSIN
D2
GPIO0 K1
GPIO1 K2
GPIO2
K3
GPIO3 H3
GPIO4 H2
GPIO5 H1
GPIO6 H4
GPIO7
H5
GPIO8 H6
GPIO9
J7
GPIO10 K4
GPIO11
K5
GPIO12 H7
MIOA_D0
N1
MIOA_D1
P4
MIOA_D2
P1
MIOA_D3 P2
MIOA_D4
P3
MIOA_D5 T3
MIOA_D6
T2
MIOA_D7
T1
MIOA_D8
U4
MIOA_D9 U1
MIOA_D10 U2
MIOA_D11
U3
MIOA_HSYNC
N3
MIOA_VSYNC
L3
MIOA_CLKOUT
R4
MIOA_CLKOUT_N T4
MIOB_HSYNC
W1
MIOB_VSYNC
W2
MIOB_DE
Y5
MIOB_CTL3
W3
MIOB_CLKIN
AE1
MIOB_CLKOUT
V4
MIOB_CLKOUT_N
W4
MIOB_VREF
AF1
DACA_HSYNC
AM13
DACA_VSYNC
AL13
DACA_RED AM15
DACA_BLUE AL14
DACA_GREEN
AM14
DACA_RSET AK13
DACA_VREF
AK12
PEX_TSTCLK_OUT
AJ17
PEX_TSTCLK_OUT_N
AJ18
I2CS_SDA
E1
I2CA_SCL
G1
I2CA_SDA
G4
I2CB_SCL
G3
I2CB_SDA
G2
I2CC_SCL
E3
I2CC_SDA
E4
GPIO13 J4
GPIO14 J6
I2CS_SCL
E2
GPIO15 L1
GPIO16
L2
GPIO17
L4
GPIO18 M4
GPIO19
L7
GPIO20 L5
GPIO21 K6
GPIO22
L6
GPIO23 M6
MIOA_D12 R6
MIOA_D13
T6
MIOA_D14
N6
MIOA_CLKIN
N4
MIOB_D14
Y6
PEX_TERMP
AG21
I2CH_SCL
F6
I2CH_SDA
G6
DACB_RED AK4
DACB_GREEN
AL4
DACB_BLUE
AJ4
DACB_VREF AK6
DACB_RSET
AH7
PEX_CLKREQ_N
AR13
DACB_HSYNC
AM1
DACB_VSYNC
AM2
MIOB_D0 Y1
MIOB_D1
Y2
MIOB_D2
Y3
MIOB_D3 AB3
MIOB_D4
AB2
MIOB_D5
AB1
MIOB_D6 AC4
MIOB_D7 AC1
MIOB_D8
AC2
MIOB_D9 AC3
MIOBD_10
AE3
MIOB_D11 AE2
MIOB_D12
U6
MIOB_D13 W6
MIOACAL_PD_VDDQ
U5
MIOBCAL_PD_VDDQ
AA7
MIOACAL_PU_GND
T5
MIOBCAL_PU_GND
AA6
MIOA_DE N2
MIOA_CTL3
P5
MIOA_VREF
N5
PLLVDD
AE9
SP_PLLVDD
AF9
VID_PLLVDD
AD9
DACA_VDD
AJ12
DACB_VDD
AG7
QV2B
2N7002DW-T/R7_SOT363-6
QV2B
2N7002DW-T/R7_SOT363-6
3
5
4
CV25 0.1U_0402_10V7K
CV25 0.1U_0402_10V7K
1 2
RV27
124_0402_1%
RV27
124_0402_1%
1
2
RV105
0_0402_5%
RV105
0_0402_5%
1 2
CV38 0.1U_0402_10V7K
CV38 0.1U_0402_10V7K
1 2
TV1
TV1
CV30 0.1U_0402_10V7K
CV30 0.1U_0402_10V7K
1 2
RV2 10K_0402_5%
@
RV2 10K_0402_5%
@
1
2
CV17 0.1U_0402_10V7K
CV17 0.1U_0402_10V7K
1 2
CV7
1U_0402_6.3V4Z
CV7
1U_0402_6.3V4Z
1
2
CV27 0.1U_0402_10V7K
CV27 0.1U_0402_10V7K
1 2
14. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_HDMI_DATA
VGA_HDMI_CLK
ROM_SI
ROM_SO
ROM_SCLK
THERM#_VGA
THERM_D-
THERM_D+
THERM_D-
THERM_D+
VGA_THMCLK
STRAP0
STRAP2
STRAP1
TESTMODE
VGA_THMDATA
VGA_HDMI_CLK
VGA_HDMI_DATA
VGA_THMCLK
VGA_THMDATA
ROM_SI 24
ROM_SO 24
ROM_SCLK 24
THERM#_VGA 13
SMB_DATA_GPU 13
STRAP0
24
STRAP1
24
STRAP2
24
VDD_SENSE 58
SMB_CLK_GPU 13
EC_SMB_DA2 29,38,44,45
EC_SMB_CK2 29,38,44,45
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
LVDS/HDMI/DP/THM
14 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
LVDS/HDMI/DP/THM
14 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
LVDS/HDMI/DP/THM
14 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
HDMI
External VGA Thermal Sensor
Address: 0x9A H
Internal Thermal Sensor
VGA_CORE Sense
RV120 4.7K_0402_5%
RV120 4.7K_0402_5%
1 2
RV50 40.2K_0402_1%
RV50 40.2K_0402_1%
1 2
TV3
TV3
QV1B
2N7002DW-T/R7_SOT363-6
QV1B
2N7002DW-T/R7_SOT363-6
3
5
4
CV53 0.1U_0402_16V4Z
CV53 0.1U_0402_16V4Z
1
2
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
UV1D
N11P-LP1-A3_BGA969 N11PR3@
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
UV1D
N11P-LP1-A3_BGA969 N11PR3@
IFPA_TXC_N
AM12
IFPA_TXC
AM11
NC_0
A2
NC_1 A7
NC_2
B7
NC_3
C5
NC_4
C7
NC_5 D5
NC_6 D6
NC_7 D7
NC_8
E5
NC_9 E7
NC_10
F4
NC_11
G5
NC_12
G11
NC_13
G12
NC_14 G14
NC_15 G15
NC_16 G27
NC_17
G28
NC_18 G24
NC_19
G25
NC_20 H32
NC_21 J18
NC_22
J19
IFPA_TXD0
AM8
IFPA_TXD0_N
AL8
IFPA_TXD1
AM10
IFPA_TXD1_N
AM9
IFPA_TXD2
AK10
IFPA_TXD2_N
AL10
IFPA_TXD3
AK11
IFPA_TXD3_N
AL11
IFPB_TXC
AP13
IFPB_TXC_N
AN13
IFPB_TXD4
AN8
IFPB_TXD4_N
AP8
IFPB_TXD5
AP10
IFPB_TXD5_N
AN10
IFPB_TXD6
AR11
IFPB_TXD6_N
AR10
IFPB_TXD7
AN11
IFPB_TXD7_N
AP11
IFPC_L0
AM7
IFPC_L0_N
AM6
IFPC_L1
AL5
IFPC_L1_N
AM5
IFPC_L2
AM3
IFPC_L2_N
AM4
IFPC_L3
AP1
IFPC_L3_N
AR2
IFPD_L0
AR8
IFPD_L0_N
AR7
IFPD_L1
AP7
IFPD_L1_N
AN7
NC_23 J25
NC_24
J26
NC_26 M7
NC_27
M29
NC_28
P6
NC_29 P29
IFPD_L2_N
AP5
IFPD_L3_N
AR4
IFPD_L2
AN5
IFPD_L3
AR5
IFPE_L0
AH6
IFPE_L0_N
AH5
IFPE_L1
AH4
IFPE_L1_N
AG4
IFPE_L2
AF4
IFPE_L2_N
AF5
IFPE_L3
AE6
IFPE_L3_N
AE5
IFPF_L0
AL2
IFPF_L0_N
AL3
IFPF_L1
AJ3
IFPF_L1_N
AJ2
IFPF_L2
AJ1
IFPF_L2_N
AH1
IFPF_L3
AH2
IFPF_L3_N
AH3
NC_30
R29
NC_31 U7
NC_32 V6
NC_33
Y4
NC_34
AA4
NC_35
AB4
NC_36
AB7
NC_37
AC5
NC_38
AD6
NC_39
AD29
NC_40 AE29
NC_41
AF6
NC_42 AG6
NC_43 AG20
NC_44 AG29
NC_45 AH29
NC_46
AJ5
NC_47
AK15
NC_48
AL7
STRAP0
W5
STRAP1
W7
STRAP2
V7
CEC
AB5
NC_25
L29
THERMDP
B5
THERMDN
B4
NC/SPDIF A5
ROM_CS_N
C3
ROM_SI D3
ROM_SO C4
ROM_SCLK
D4
IFPF_AUX_I2CZ_SCL
AF3
IFPF_AUX_I2CZ_SDA_N
AF2
IFPE_AUX_I2CY_SCL
AE4
IFPE_AUX_I2CY_SDA_N
AD4
IFPD_AUX_I2CX_SCL
AP4
IFPD_AUX_I2CX_SDA_N
AN4
IFPC_AUX_I2CW_SCL
AP2
IFPC_AUX_I2CW_SDA_N
AN3
VDD_SENSE_0 D35
VDD_SENSE_1 P7
VDD_SENSE_2
AD20
GND_SENSE_0 AD19
GND_SENSE_1 E35
GND_SENSE_2
R7
BUFRST_N
A4
MULTI_STRAP_REF0_GND
N9
MULTI_STRAP_REF1_GND M9
TESTMODE
AP35
JTAG_TCK
AP14
JTAG_TDI
AN14
JTAG_TDO
AN16
JTAG_TMS
AR14
JTAG_TRST_N AP16
RV123 2.2K_0402_5%
RV123 2.2K_0402_5%
1
2
RV34
0_0402_5%
@
RV34
0_0402_5%
@
1
2
RV41 10K_0402_5%
@
RV41 10K_0402_5%
@
1 2
RV33
0_0402_5%
@
RV33
0_0402_5%
@
1
2
TV4
TV4
RV49 10K_0402_5%
RV49 10K_0402_5%
1 2
QV1A
2N7002DW-T/R7_SOT363-6
QV1A
2N7002DW-T/R7_SOT363-6
6
1
2
RV47
10K_0402_5%
RV47
10K_0402_5%
1
2
UV2
ADM1032ARMZ-2REEL_MSOP8
UV2
ADM1032ARMZ-2REEL_MSOP8
VDD
1
ALERT# 6
THERM#
4 GND 5
D+
2
D-
3
SCLK
8
SDATA
7
CV54
2200P_0402_50V7K
CV54
2200P_0402_50V7K
1 2
RV119 4.7K_0402_5%
RV119 4.7K_0402_5%
1 2
RV48 40.2K_0402_1%
RV48 40.2K_0402_1%
1 2
TV5
TV5
RV117 2.2K_0402_5%
RV117 2.2K_0402_5%
1
2
TV2
TV2
15. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VGA_CORE
+VGA_CORE
+VGA_CORE
+VGA_CORE
+VGA_CORE
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
VGA CORE
15 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
VGA CORE
15 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
VGA CORE
15 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
SF000002Z00
H=4.5
SGA00002680
CV60
0.22U_0402_6.3V6K
CV60
0.22U_0402_6.3V6K
1
2
CV67
0.047U_0402_25V6K
CV67
0.047U_0402_25V6K
1
2
CV78
0.01U_0402_25V7K
CV78
0.01U_0402_25V7K
1
2
CV75
0.01U_0402_25V7K
CV75
0.01U_0402_25V7K
1
2
CV66
0.047U_0402_25V6K
CV66
0.047U_0402_25V6K
1
2
CV64
4700P_0402_25V7K
CV64
4700P_0402_25V7K
CV74
0.01U_0402_25V7K
CV74
0.01U_0402_25V7K
1
2
CV76
0.01U_0402_25V7K
CV76
0.01U_0402_25V7K
1
2
CV59
0.22U_0402_6.3V6K
CV59
0.22U_0402_6.3V6K
1
2
CV69
0.022U_0402_25V7K
CV69
0.022U_0402_25V7K
1
2
POWER
Part 7 of 7
UV1G
N11P-LP1-A3_BGA969 N11PR3@
POWER
Part 7 of 7
UV1G
N11P-LP1-A3_BGA969 N11PR3@
VDD_0
AB11
VDD_1
AB13
VDD_2
AB15
VDD_3
AB17
VDD_4
AB19
VDD_5
AB21
VDD_6
AB23
VDD_7
AB25
VDD_8
AC11
VDD_9
AC12
VDD_10
AC13
VDD_11
AC14
VDD_12
AC15
VDD_13
AC16
VDD_14
AC17
VDD_15
AC18
VDD_16
AC19
VDD_17
AC20
VDD_18
AC21
VDD_19
AC22
VDD_20
AC23
VDD_21
AC24
VDD_22
AC25
VDD_23
AD12
VDD_24
AD14
VDD_25
AD16
VDD_26
AD18
VDD_27
AD22
VDD_28
AD24
VDD_29
L11
VDD_30
L12
VDD_31
L13
VDD_32
L14
VDD_33
L15
VDD_34
L16
VDD_35
L17
VDD_36
L18
VDD_37
L19
VDD_38
L20
VDD_39
L21
VDD_40
L22
VDD_41
L23
VDD_42
L24
VDD_43
L25
VDD_44
M12
VDD_45
M14
VDD_46
M16
VDD_47
M18
VDD_48
M20
VDD_49
M22
VDD_50
M24
VDD_51
P11
VDD_52
P13
VDD_53
P15
VDD_54
P17
VDD_55
P19
VDD_81 V11
VDD_82 V13
VDD_83 V15
VDD_84 V17
VDD_85 V19
VDD_86 V21
VDD_87 V23
VDD_88 V25
VDD_89 W11
VDD_90 W12
VDD_91 W13
VDD_92 W14
VDD_93 W15
VDD_94 W16
VDD_95 W17
VDD_96 W18
VDD_97 W19
VDD_98 W20
VDD_99 W21
VDD_100 W22
VDD_101 W23
VDD_102 W24
VDD_103 W25
VDD_104 Y12
VDD_105 Y14
VDD_106 Y16
VDD_107 Y18
VDD_108 Y20
VDD_109 Y22
VDD_110 Y24
VDD_58 P25
VDD_59 R11
VDD_60 R12
VDD_61 R13
VDD_62 R14
VDD_63 R15
VDD_64 R16
VDD_65 R17
VDD_66 R18
VDD_67 R19
VDD_68 R20
VDD_69 R21
VDD_70 R22
VDD_71 R23
VDD_72 R24
VDD_73 R25
VDD_74 T12
VDD_75 T14
VDD_76 T16
VDD_77 T18
VDD_78 T20
VDD_79 T22
VDD_80 T24
VDD_56 P21
VDD_57 P23
+
CV58
330U_D2_2.5VM_R9M
+
CV58
330U_D2_2.5VM_R9M
1
2
CV62
1U_0402_6.3V4Z
CV62
1U_0402_6.3V4Z
1
2
CV65
0.022U_0402_25V7K
CV65
0.022U_0402_25V7K
1
2
+ CV57
330U_2.5V_M_R17
+ CV57
330U_2.5V_M_R17
1
2
CV71
0.022U_0402_25V7K
CV71
0.022U_0402_25V7K
1
2
CV212
4.7U_0603_6.3V6K
CV212
4.7U_0603_6.3V6K
1
2
CV68
0.047U_0402_25V6K
CV68
0.047U_0402_25V6K
1
2
CV79
0.01U_0402_25V7K
CV79
0.01U_0402_25V7K
1
2
CV70
0.022U_0402_25V7K
CV70
0.022U_0402_25V7K
1
2
CV61
4.7U_0603_6.3V6K
@
CV61
4.7U_0603_6.3V6K
@
1
2
CV77
0.01U_0402_25V7K
CV77
0.01U_0402_25V7K
1
2
CV63
4700P_0402_25V7K
CV63
4700P_0402_25V7K
16. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+IFPEF_PLLVDD
+IFPF_IOVDD
+IFPE_IOVDD
+PEX_PLLVDD
+IFPAB_PLLVDD
+IFPB_IOVDD
+IFPA_IOVDD
+IFPC_PLLVDD
+IFPD_PLLVDD
+IFPC_IOVDD
+IFPD_IOVDD
+3VS_DGPU
+1.05VS_DGPU
+1.05VS_DGPU
+3VS_DGPU
+3VS_DGPU
+1.05VS_DGPU
+VRAM_1.5VS
+VRAM_1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
POWER
16 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
POWER
16 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NBQAA LA6072P M/B 1.0
POWER
16 61
Monday, March 22, 2010
2009/11/13 2010/01/01
Compal Electronics, Inc.
500mA
2000mA
110mA
Close to Pin
Close to Pin
20 MIL
Close to Pin
150mA
150mA
220mA
220mA
220mA
220mA
285mA
285mA
285mA
285mA
RV109 10K_0402_5%
RV109 10K_0402_5%
1
2
RV110 10K_0402_5%
RV110 10K_0402_5%
1
2
CV100
0.047U_0402_25V6K
CV100
0.047U_0402_25V6K
1
2
CV104
0.01U_0402_25V7K
CV104
0.01U_0402_25V7K
1
2
CV90
1U_0402_6.3V4Z
CV90
1U_0402_6.3V4Z
1
2
CV109
4.7U_0603_6.3V6K
CV109
4.7U_0603_6.3V6K
1
2
CV85
0.1U_0402_16V4Z
N11P@
CV85
0.1U_0402_16V4Z
N11P@
1
2
CV82
4.7U_0603_6.3V6K
N11P@
CV82
4.7U_0603_6.3V6K
N11P@
1
2
CV91
4.7U_0603_6.3V6K
CV91
4.7U_0603_6.3V6K
1
2
CV102
0.01U_0402_25V7K
CV102
0.01U_0402_25V7K
1
2
RV52 1K_0402_1%
@
RV52 1K_0402_1%
@
1 2
CV87
0.1U_0402_16V4Z
CV87
0.1U_0402_16V4Z
1
2
CV107
1U_0402_6.3V4Z
CV107
1U_0402_6.3V4Z
1
2
RV99 10K_0402_5%
RV99 10K_0402_5%
1
2
CV116
0.1U_0402_16V4Z
CV116
0.1U_0402_16V4Z
1
2
CV98
10U_0603_6.3V6M
CV98
10U_0603_6.3V6M
1
2
RV113
10K_0402_5%
RV113
10K_0402_5%
1
2
CV217
0.1U_0402_16V4Z
CV217
0.1U_0402_16V4Z
1
2
RV101 10K_0402_5%
RV101 10K_0402_5%
1
2
CV97
4.7U_0603_6.3V6K
CV97
4.7U_0603_6.3V6K
1
2
RV51 1K_0402_1%
@
RV51 1K_0402_1%
@
1 2
LV4
100NH_LQW18ANR10J00D_5%_0603
LV4
100NH_LQW18ANR10J00D_5%_0603
1 2
CV84
0.1U_0402_16V4Z
N11P@
CV84
0.1U_0402_16V4Z
N11P@
1
2
CV110
0.1U_0402_16V4Z
CV110
0.1U_0402_16V4Z
1
2
CV96
1U_0402_6.3V4Z
CV96
1U_0402_6.3V4Z
1
2
CV108
4.7U_0603_6.3V6K
CV108
4.7U_0603_6.3V6K
1
2
CV101
0.047U_0402_25V6K
CV101
0.047U_0402_25V6K
1
2
CV111
4.7U_0603_6.3V6K
CV111
4.7U_0603_6.3V6K
1
2
CV218
0.01U_0402_25V7K
CV218
0.01U_0402_25V7K
1
2
RV114 10K_0402_5%
RV114 10K_0402_5%
1
2
CV105
0.1U_0402_16V4Z
@
CV105
0.1U_0402_16V4Z
@
1
2
Part 5 of 7
POWER
UV1E
N11P-LP1-A3_BGA969 N11PR3@
Part 5 of 7
POWER
UV1E
N11P-LP1-A3_BGA969 N11PR3@
PEX_IOVDDQ_0 AG11
PEX_IOVDDQ_1 AG12
PEX_IOVDDQ_2 AG13
PEX_IOVDDQ_3 AG15
PEX_IOVDDQ_4 AG16
PEX_IOVDDQ_5 AG17
PEX_IOVDDQ_6 AG18
PEX_IOVDDQ_7 AG22
PEX_IOVDDQ_8 AG23
PEX_IOVDDQ_9 AG24
PEX_IOVDDQ_10 AG25
PEX_IOVDDQ_11 AG26
PEX_IOVDDQ_12 AJ14
PEX_IOVDDQ_13 AJ15
PEX_IOVDDQ_14 AJ19
PEX_IOVDDQ_15 AJ21
PEX_IOVDDQ_16 AJ22
PEX_IOVDDQ_17 AJ24
PEX_IOVDDQ_18 AJ25
PEX_IOVDDQ_19 AJ27
PEX_IOVDDQ_20 AK18
PEX_IOVDDQ_21 AK20
PEX_IOVDDQ_22 AK23
PEX_IOVDDQ_23 AK26
PEX_IOVDDQ_24 AL16
IFPA_IOVDD
AG9
IFPB_IOVDD
AG10
IFPC_IOVDD
AJ8
IFPD_IOVDD
AK8
IFPE_IOVDD
AE7
IFPF_IOVDD
AD7
IFPAB_PLLVDD
AK9
IFPC_PLLVDD
AJ9
IFPEF_PLLVDD
AJ6
IFPD_PLLVDD
AC6
FBVDDQ_0
J23
FBVDDQ_1
J24
FBVDDQ_2
J29
FBVDDQ_3
AA27
FBVDDQ_4
AA29
FBVDDQ_5
AA31
FBVDDQ_6
AB27
FBVDDQ_7
AB29
FBVDDQ_8
AC27
FBVDDQ_9
AD27
FBVDDQ_10
AE27
FBVDDQ_11
AJ28
FBVDDQ_12
B18
FBVDDQ_13
E21
FBVDDQ_14
G17
FBVDDQ_15
G18
FBVDDQ_16
G22
FBVDDQ_17
G8
FBVDDQ_18
G9
FBVDDQ_19
H29
FBVDDQ_20
J14
FBVDDQ_21
J15
FBVDDQ_22
J16
FBVDDQ_23
J17
FBVDDQ_24
J20
FBVDDQ_25
J21
FBVDDQ_26
J22
FBVDDQ_27
N27
FBVDDQ_28
P27 PEX_IOVDD_0 AK16
PEX_IOVDD_1 AK17
PEX_IOVDD_2 AK21
PEX_IOVDD_3 AK24
PEX_IOVDD_4 AK27
FBVDDQ_29
R27
FBVDDQ_30
T27
FBVDDQ_31
U27
FBVDDQ_32
U29
FBVDDQ_33
V27
FBVDDQ_34
V29
FBVDDQ_35
V34
FBVDDQ_36
W27
FBVDDQ_37
Y27
PEX_SVDD_3V3_0 AG19
PEX_SVDD_3V3_1 F7
VDD33_0 J10
VDD33_1 J11
VDD33_2 J12
VDD33_3 J13
VDD33_4 J9
PEX_PLLVDD AG14
MIOA_VDDQ_0 P9
MIOA_VDDQ_1 R9
MIOA_VDDQ_2 T9
MIOA_VDDQ_3 U9
MIOB_VDDQ_0 AA9
MIOB_VDDQ_1 AB9
MIOB_VDDQ_2 W9
MIOB_VDDQ_3 Y9
IFPAB_RSET
AJ11
IFPC_RSET
AK7
IFPD_RSET
AB6
IFPEF_RSET
AL1
CV216
0.1U_0402_16V4Z
CV216
0.1U_0402_16V4Z
1
2
CV88
0.1U_0402_16V4Z
CV88
0.1U_0402_16V4Z
1
2
CV112
0.1U_0402_16V4Z
CV112
0.1U_0402_16V4Z
1
2
RV97 10K_0402_5%
RV97 10K_0402_5%
1
2
RV116 10K_0402_5%
RV116 10K_0402_5%
1
2
CV93
0.1U_0402_16V4Z
CV93
0.1U_0402_16V4Z
1
2
CV99
0.047U_0402_25V6K
CV99
0.047U_0402_25V6K
1
2
CV94
0.1U_0402_16V4Z
CV94
0.1U_0402_16V4Z
1
2
CV89
1U_0402_6.3V4Z
CV89
1U_0402_6.3V4Z
1
2
CV103
0.01U_0402_25V7K
N11P@
CV103
0.01U_0402_25V7K
N11P@
1
2
CV83
4.7U_0603_6.3V6K
CV83
4.7U_0603_6.3V6K
1
2
CV115
0.1U_0402_16V4Z
CV115
0.1U_0402_16V4Z
1
2
CV114
4.7U_0603_6.3V6K
CV114
4.7U_0603_6.3V6K
1
2
RV115 10K_0402_5%
RV115 10K_0402_5%
1
2
RV96 1K_0402_1%
@
RV96 1K_0402_1%
@
1 2
CV92
10U_0603_6.3V6M
CV92
10U_0603_6.3V6M
1
2
RV107 10K_0402_5%
RV107 10K_0402_5%
1
2
CV86
0.1U_0402_16V4Z
N11P@
CV86
0.1U_0402_16V4Z
N11P@
1
2
CV95
1U_0402_6.3V4Z
CV95
1U_0402_6.3V4Z
1
2
CV117
1U_0402_6.3V4Z
@
CV117
1U_0402_6.3V4Z
@
1
2
CV113
1U_0402_6.3V4Z
CV113
1U_0402_6.3V4Z
1
2
RV53 1K_0402_1%
@
RV53 1K_0402_1%
@
1 2
