diagrama laptop

1. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ZSWAA/ZCWAA Schematics Document
Compal Confidential
LA-B301P REV 1.0 Schematic
Intel Processor (Haswell ULT/Broadwell U)
2014-02-10 Rev 1.0
AMD GPU Jet Pro/Topaz XT S3 (Single Rank)
Intel Haswell ULT/Broadwell U with DDR3L
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Cover Page
Custom
1 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Cover Page
Custom
1 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Cover Page
Custom
1 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.

2. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BANK 0, 1, 2
204pin DDR3-SO-DIMM X2
1.35V DDR3L 1333/1600 MT/s
Memory BUS(DDR3L)
page 16,17
Dual Channel
USB30 2x
Power Circuit DC/DC
page 38
RTC CKT.
page 7
DC/DC Interface CKT.
PCI-Express 4X Gen3 8GT/s
page 18~25
USB20 port 0,1
page 34
USB3.0 x2 Right
LVDS Conn.
Colay eDP
page 27 5V 5GT/s
USB20 2x
5V 480MHz
SPK Conn
page 35
ALC233-VB1-CG
(w/o S&M)
HDA Codec
page 35
page 36
KB9012QF A4
page 8
SPI ROM
(8MB)
LPC BUS
3.3V 33 MHz
HD Audio
3.3V 24MHz
Power On/Off CKT.
page 37
USB30 port 1,2
LVDS Translator
RTD2132N-CGT
page 26
eDP 1X 5.4GT/s
NGFF Slot 1
WLAN PCIe port 4
page 32
1.5V 5GT/s
PCIe Gen1 1x
Int. Camera
page 27
USB20 port 7
page 31
SATA ODD
SATA port 0
page 31
SATA HDD/SSD
5V 6GHz(600MB/s)
SATA Gen3 port 1
5V 6GHz(600MB/s)
SATA Gen3 port 0
USB20 1x
5V 480MHz
LS-B301P
LED/B
LS-B303P
LAN+USB/B
Audio Combo Jack
USB20 port 4
USB20 1x
5V 480MHz
Sub Boards
page 39~48
Touch Screen
page 27
USB20 port 5
USB20 1x
5V 480MHz
Processor
Haswell ULT/
Broadwell U
Intel Haswell ULT/Broadwell U
OPI
PCH
Lynx Point - LP/
Wildcat Point - LP
page 05~15
1168pin BGA
SATA port 1
Int.KBD
page 37
External Graphics
AMD GPU Jet Pro S3/Topaz XT S3
VRAM (gDDR3) 900MHz @ 1.35V
page 30
CRT Conn.
DP to CRT Translator
ITE IT6513FN
DP 2X 5.4GT/s
page 29
Single Rank
HDMI Conn.
page 28
LS-B304P
CardReader/TP/LID B
LS-B302P
Power Button/B
TPM
page 33
page 37
page 33
page 37
page 37
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Block Diagram
2 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Block Diagram
2 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Block Diagram
2 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.

3. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+3VALW_PCH
DESIGN CURRENT 253mA
DESIGN CURRENT 1.1A +5VS_ODD
DESIGN CURRENT 5.66A +1.05VS_VTT
DESIGN CURRENT 24A +VGA_CORE
+CPU_CORE
DESIGN CURRENT 32A
+0.675VS
DESIGN CURRENT 1.5A
+1.35V
DESIGN CURRENT 10.2A
SY8208CQNC
B+
+3VALW
+5VALW
DESIGN CURRENT 2.73A
DESIGN CURRENT 10.81A
+5VS
DESIGN CURRENT 4.98A
DESIGN CURRENT 6A +3VS
EC_ON
SY8206BQNC
EC_ON
PU300
PU350
SY8206DQNC
SUSP#
PUH00
RT8207MZQW
PUW00
SYSON: Enable 1.35V
DDR_VTT_PG_CTRL: Enable 0.675VS
TPS51624RSM
VR_ON
PUZ00
RT8880BGQW
PXS_PWREN
PUV00
DESIGN CURRENT 0.35A +1.8VGS
SY8032ABC
PXS_PWREN
PU1800
DESIGN CURRENT 1.93A +0.95VGS
SY8033BDBC
PXS_PWREN
PUF00
DESIGN CURRENT 0.468A +1.5VS
APL5930KAI-TRG
SUSP#
PUM00
+3VL
DESIGN CURRENT 0.025A
TPS22966DPUR
SUSP#
U3
AP2151DWG-7
+5VS
U7
DESIGN CURRENT 1A +HDMI_5V_OUT
TPS22967DSGR
ODD_EN
U16
SY6288D20AAC
USB_EN#0
UR1
SY6288D20AAC
USB_EN#2
UR3
DESIGN CURRENT 2A +USB_VCCB
DESIGN CURRENT 2A +USB_VCCC
TPS22966DPUR
SUSP#
U3
DESIGN CURRENT 2A +LCD_VDD
SY6288C20AAC
LCD_ENVDD
U1
DESIGN CURRENT 1.555A +3VGS
AO3413
PXS_PWREN
QV3
AO3413
PCH_PWR_EN#
Q10
+3V_WLAN
DESIGN CURRENT 0.37A
TPS22967DSGR
WOWL_EN
U8
DESIGN CURRENT 6.5A +1.35VGS
AO4354
PXS_PWREN#
QV5
Ipeak=8A, Imax=5.6A, Iocp=9A
Ipeak=5A, Imax=3.5A, Iocp=6A
Ipeak=0.5A, Imax=0.35A, Iocp=5.7A
Ipeak=1A, Imax=0.7A, Iocp=2.5A
Ipeak=3A, Imax=2.1A, Iocp=4A
Ipeak=10A, Imax=7A, Iocp=12A
Ipeak=5A, Imax=3.5A, Iocp=6A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Power Map
Custom
3 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Power Map
Custom
3 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Power Map
Custom
3 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.

4. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+3VS 1010 0100 b
A4 H
PCH SM Bus Address
1010 0000 b
A0 H
HEX
DDR SO-DIMM 1
Address
DDR SO-DIMM 0
Device
HEX
Device Address
Power
AMD GPU 1001 1010 b
9E H
+3VS
+3VS
+3VGS
HEX HEX
16 H
EC SM Bus1 Address
Device Address Address
EC SM Bus2 Address
Device
0001 0110 b
Smart Battery 96 H 1001 0110 b
PCH
Power
Power
Power
+3VL
G3 LOW LOW
LOW
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S3# SLP_S4# SLP_S5#
+3VGS
+3VL
+5VL
O
O
X
O
X
O
O
X
LOW LOW
LOW
LOW LOW
LOW
HIGH HIGH
HIGH
HIGH HIGH
HIGH
HIGH
HIGH
HIGH
Voltage Rails ( O MEANS ON X MEANS OFF )
O
O
X
S3
+3VS
X
+3VALW
+5VS
S1
O
+CPU_CORE
O
O
O
O
X
X X
power
plane
O
O
O
O
O
X
S5 S4/ Battery only
X X
B+
State
+1.5VS
+1.35V
S5 S4/AC & Battery
don't exist
S5 S4/AC
+5VALW
S0
O
O
+1.8VGS
+RTCVCC
O
O
O
O
O
+VGA_CORE
AMD GPU
Jet Pro S3
Topaz XT S3
SKU CPU PCH VGA
Platform
+1.35VGS
12 H
Smart Charger 0001 0010 b
+3VL
+1.5VALW
+1.05VS_VTT
+0.95VGS
X
Intel
SharkBay ULT
UMA
DIS
Haswell-M
ULT Processor
Lynx Point - LP
Function
BTO
Explain
Description
Function
BTO
Explain
Description
BTO Option Table
Function
BTO
Explain
Description
SKU
UMA
UMA
UMA@
Processor
HASWELL
HASWELL
HASWELL@
DIS
DIS
VGA@
BROADWELL
BROADWELL
BROADWELL@
GPU
JET
JET
JET@
TOPAZ
TOPAZ
TOPAZ@
VRAM
X76
X76
X76@
Internal Panel
LVDS
LVDS
LVDS@
eDP
eDP
IEDP@
HDMI
HDMI
HDMI
HDMI@
Wake On Wireless
WOWL
ISCT@
NON-WOWL
NOISCT@
WOWL NON-WOWL
ODD
ZPODD Non-ZPODD
Non-Zero Power ODD
Zero Power ODD
NONZP@
ZPODD@
XDP
XDP
XDP
XDP@
FIX
FIX
FIX
FIX@
Short pad
Short pad
0 ohm short pad
Rshort@
ESD
ESD
ESD
ESD@ @ESD@
EMI
EMI
EMI
EMI@ @EMI@
CAM_EMI
CAM_EMI
CAM_EMI
CAM_EMI@ @CAM_EMI@
CRT_EMI
CRT_EMI
CRT_EMI
CRT_EMI@ @CRT_EMI@
TPM_EMI
TPM_EMI@
TPM_EMI
TPM_EMI
@TPM_EMI@
TOUCH_EMI
TOUCH_EMI
TOUCH_EMI
TOUCH_EMI@ @TOUCH_EMI@
Function
BTO
Explain
Description
CPU (R1 PN)
I3-4005U
4005UR1@
SA000072Q70
I5-4200U
4200UR1@
SA00006SM80
I3-4010U
4010UR1@
SA00006SXA0
2990U
SA00007LM00
2990UR1@
I5-4210U
SA00007LO00
4210UR1@
I3-4015U
SA00007LN00
4015UR1@
Function
BTO
Explain
Description
CPU (R3 PN)
I3-4005U
4005UR3@
SA000072Q60
I5-4200U
4200UR3@
SA00006SM90
I3-4010U
4010UR3@
SA00006SX90
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Notes List
Custom
4 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Notes List
Custom
4 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
Notes List
Custom
4 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.

5. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Trace width=20 mils,Spacing=25mil,Max length=100mils
DDR3 Compensation Signals
HDMI
PU/PD for JTAG signals
DP to CRT
EDP_COMP
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DIMM_DRAMRST#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
BPM#2
BPM#3
BPM#5
BPM#4
BPM#7
BPM#6
H_CPUPWRGD
H_PROCHOT#_R
XDP_PRDY#
XDP_TDO
XDP_TCK
XDP_TRST#
XDP_TMS
XDP_TDI
XDP_PREQ#
BPM#0
BPM#1
H_DP1_P0
H_DP1_N1
H_DP1_P1
H_DP1_N0
H_CPUPWRGD
DIMM_DRAMRST#
H_PECI
<36>
DDR_PG_CTRL
<16>
H_PROCHOT#
<36>
H_HDMI_TX2-
<28>
H_HDMI_TX2+
<28>
H_HDMI_TX1-
<28>
H_HDMI_TX1+
<28>
H_HDMI_TX0-
<28>
H_HDMI_TX0+
<28>
H_HDMI_TXC-
<28>
H_HDMI_TXC+
<28>
H_EDP_AUXP <26>
H_EDP_AUXN <26>
H_EDP_TXP0 <26>
H_EDP_TXN0 <26>
H_EDP_TXP1 <26>
H_EDP_TXN1 <26>
DIMM_DRAMRST#
<16,17>
H_DP1_C_N0
<29>
H_DP1_C_P0
<29>
H_DP1_C_N1
<29>
H_DP1_C_P1
<29>
+1.05VS_VTT
+VCCIOA_OUT
+1.35V
+1.05VS_VTT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(1/11) DDI,MSIC,XDP
Custom
5 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(1/11) DDI,MSIC,XDP
Custom
5 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(1/11) DDI,MSIC,XDP
Custom
5 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
T20 @
T20 @
R184
470_0402_5%
R184
470_0402_5%
1
2
T153
@ T153
@
R25 10K_0402_5%
R25 10K_0402_5%
1 2
R41 100_0402_1%
R41 100_0402_1%
1 2
T155
@ T155
@
R89 51_0402_5%
XDP@
R89 51_0402_5%
XDP@
1 2
CH6 180P_0402_50V8J
@ESD@
CH6 180P_0402_50V8J
@ESD@
1 2
R90 51_0402_5%
XDP@
R90 51_0402_5%
XDP@
1 2
T149
@ T149
@
R23 121_0402_1%
R23 121_0402_1%
1 2
R10
56_0402_5%
R10
56_0402_5%
1 2
T148
@ T148
@
C74 0.1U_0402_16V7K
CRT@ C74 0.1U_0402_16V7K
CRT@ 1 2
HASWELL_MCP_E
DDI EDP
Rev1p2
1 OF 19
UC1A @ HASWELL_MCP_E
DDI EDP
Rev1p2
1 OF 19
UC1A @
EDP_DISP_UTIL
A43
EDP_RCOMP
D20
DDI2_TXP3
B53 DDI2_TXN3
A53 DDI2_TXP2
B50 DDI2_TXN2
C49
DDI2_TXN1
C53
DDI2_TXN0
C51
DDI2_TXP0
C50
DDI2_TXP1
B54
DDI1_TXP3
B57
EDP_AUXN
A45
EDP_AUXP
B45
EDP_TXP3
B49
EDP_TXN3
A49
EDP_TXP2
C46
EDP_TXN2
C47
EDP_TXP1
B47
EDP_TXN1
A47
EDP_TXN0
C45
EDP_TXP0
B46
DDI1_TXN3
A57 DDI1_TXP2
A55 DDI1_TXN2
B55 DDI1_TXP1
C58 DDI1_TXN1
B58 DDI1_TXP0
C55 DDI1_TXN0
C54
C77 0.1U_0402_16V7K
CRT@ C77 0.1U_0402_16V7K
CRT@ 1 2
T151
@ T151
@
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p2
2 OF 19
UC1B @
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p2
2 OF 19
UC1B @
PREQ
K62
PRDY
J62
PROC_TCK
E60
PROC_TRST
E59
PROCHOT
K63
PROCPWRGD
C61
CATERR
K61
PECI
N62
PROC_DETECT
D61
PROC_TMS
E61
PROC_TDI
F63
PROC_TDO
F62
BPM#0
J60
BPM#2
H61
BPM#1
H60
BPM#3
H62
BPM#7
J61
SM_RCOMP0
AU60
SM_RCOMP1
AV60
SM_RCOMP2
AU61
SM_PG_CNTL1
AV61
BPM#6
K60
BPM#5
H63
BPM#4
K59
SM_DRAMRST
AV15
C76 0.1U_0402_16V7K
CRT@ C76 0.1U_0402_16V7K
CRT@ 1 2
T156
@ T156
@
R68
62_0402_5%
R68
62_0402_5%
1
2
R24 200_0402_1%
R24 200_0402_1%
1 2
C80 0.1U_0402_16V7K
CRT@ C80 0.1U_0402_16V7K
CRT@ 1 2
T150
@ T150
@
T152
@ T152
@
T154
@ T154
@
T97 @
T97 @
R86 51_0402_5%
@
R86 51_0402_5%
@
1 2
R88 51_0402_5%
@
R88 51_0402_5%
@
1 2
R1 24.9_0402_1%
R1 24.9_0402_1%
1 2
R87 51_0402_5%
XDP@
R87 51_0402_5%
XDP@
1 2
R91 51_0402_5%
@
R91 51_0402_5%
@
1 2

6. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D8
DDR_A_D62
DDR_A_D63
DDR_A_D6
DDR_A_D5
DDR_A_D7
DDR_A_D4
DDR_A_D3
DDR_A_D47
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D44
DDR_A_D39
DDR_A_D34
DDR_A_D43
DDR_A_D42
DDR_A_D46
DDR_A_D38
DDR_A_D40
DDR_A_D41
DDR_A_D35
DDR_A_D45
DDR_A_D61
DDR_A_D33
DDR_A_D32
DDR_A_D37
DDR_A_D36
DDR_A_D54
DDR_A_D55
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D60
DDR_A_D52
DDR_A_D49
DDR_A_D50
DDR_A_D48
DDR_A_D51
DDR_A_D25
DDR_A_D15
DDR_A_D14
DDR_A_D31
DDR_A_D53
DDR_A_D13
DDR_A_D9
DDR_A_D30
DDR_A_D27
DDR_A_D26
DDR_A_D24
DDR_A_D28
DDR_A_D29
DDR_A_D11
DDR_A_D10
DDR_A_D12
DDR_A_D17
DDR_A_D21
DDR_A_D16
DDR_A_D20
DDR_A_D19
DDR_A_D23
DDR_A_D18
DDR_A_D22
DDR_A_MA15
DDR_A_MA4
DDR_A_MA5
DDR_A_MA14
DDR_A_MA0
DDR_A_MA6
DDR_A_MA7
DDR_A_MA9
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA10
DDR_A_MA11
DDR_A_MA8
DDR_A_MA13
DDR_A_MA12
DDR_A_DQS#3
DDR_A_DQS#5
DDR_A_DQS#2
DDR_A_DQS#0
DDR_A_DQS#7
DDR_A_DQS#6
DDR_A_DQS#4
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS0
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS1
DDR_A_DQS7
DDR_B_D33
DDR_B_D14
DDR_B_D42
DDR_B_D59
DDR_B_D63
DDR_B_D43
DDR_B_D55
DDR_B_D53
DDR_B_D29
DDR_B_D24
DDR_B_D34
DDR_B_D4
DDR_B_D26
DDR_B_D13
DDR_B_D10
DDR_B_D21
DDR_B_D11
DDR_B_D57
DDR_B_D44
DDR_B_D0
DDR_B_D7
DDR_B_D46
DDR_B_D3
DDR_B_D15
DDR_B_D27
DDR_B_D30
DDR_B_D35
DDR_B_D40
DDR_B_D49
DDR_B_D23
DDR_B_D25
DDR_B_D19
DDR_B_D37
DDR_B_D48
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D47
DDR_B_D9
DDR_B_D60
DDR_B_D50
DDR_B_D62
DDR_B_D52
DDR_B_D2
DDR_B_D51
DDR_B_D56
DDR_B_D39
DDR_B_D22
DDR_B_D28
DDR_B_D6
DDR_B_D45
DDR_B_D17
DDR_B_D58
DDR_B_D61
DDR_B_D31
DDR_B_D54
DDR_B_D1
DDR_B_D41
DDR_B_D5
DDR_B_D12
DDR_B_D20
DDR_B_D38
DDR_B_D32
DDR_B_D16
DDR_B_MA15
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5
DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14
DDR_B_DQS7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS5
DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_DQS#5
DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#2
DDR_A_WE# <16>
DDR_A_CAS# <16>
DDR_A_RAS# <16>
DDR_A_BS1 <16>
DDR_A_BS0 <16>
DDR_A_BS2 <16>
DDR_B_RAS# <17>
DDR_B_WE# <17>
DDR_B_CAS# <17>
DDR_B_BS0 <17>
DDR_B_BS1 <17>
DDR_B_BS2 <17>
DDR_A_D[0..63]
<16>
DDR_B_D[0..63]
<17>
DDR_B_MA[0..15]
<17>
DDR_B_DQS[0..7]
<17>
DDR_A_MA[0..15]
<16>
DDR_A_DQS#[0..7]
<16>
DDR_A_DQS[0..7]
<16>
DDR_B_DQS#[0..7]
<17>
SM_DIMM_VREFCA <16>
SA_DIMM_VREFDQ <16>
SB_DIMM_VREFDQ <17>
SA_CLK_DDR0 <16>
SA_CLK_DDR#0 <16>
SA_CLK_DDR1 <16>
SA_CLK_DDR#1 <16>
DDRA_CKE0_DIMMA <16>
DDRA_CKE1_DIMMA <16>
DDRA_CS1_DIMMA# <16>
DDRA_CS0_DIMMA# <16>
SB_CLK_DDR0 <17>
SB_CLK_DDR#0 <17>
DDRB_CKE0_DIMMB <17>
SB_CLK_DDR1 <17>
SB_CLK_DDR#1 <17>
DDRB_CKE1_DIMMB <17>
DDRB_CS0_DIMMB# <17>
DDRB_CS1_DIMMB# <17>
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(2/11) DDRIII
Custom
6 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(2/11) DDRIII
Custom
6 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(2/11) DDRIII
Custom
6 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
DDR CHANNEL B
HASWELL_MCP_E
Rev1p2
4 OF 19
UC1D @
DDR CHANNEL B
HASWELL_MCP_E
Rev1p2
4 OF 19
UC1D @
SB_DQSP4
AV22
SB_DQSP5
AW18
SB_DQSP6
AM21
SB_DQSP3
AM25
SB_DQSP7
AM18
SB_DQSP2
AM28
SB_DQSN7
AN18
SB_DQSP0
AV30
SB_DQSP1
AW26
SB_DQSN6
AN21
SB_DQSN2
AN28
SB_DQSN3
AN25
SB_DQSN4
AW22
SB_DQSN5
AV18
SB_DQSN1
AV26
SB_DQSN0
AW30
SB_MA14
AR46
SB_MA15
AP46
SB_MA13
AK33
SB_MA9
AU46
SB_MA10
AK36
SB_MA11
AV47
SB_MA8
AY47
SB_MA12
AU47
SB_MA4
AR45
SB_MA5
AP45
SB_MA6
AW46
SB_MA3
AR42
SB_MA7
AY46
SB_MA2
AP42
SB_MA0
AP40
SB_MA1
AR40
SB_BA2
AU49
SB_WE
AK35
SB_CAS
AM33
SB_BA0
AL35
SB_BA1
AM36
SB_RAS
AM35
SB_CS#1
AK32
SB_ODT0
AL32
SB_CS#0
AM32
SB_CKE1
AU50
SB_CKE2
AW49
SB_CKE3
AV50
SB_CKE0
AY49
SB_CK#1
AK38
SB_CK1
AL38
SB_CK0
AN38
SB_CK#0
AM38
SB_DQ61
AM20
SB_DQ63
AP18 SB_DQ62
AR18
SB_DQ57
AR20 SB_DQ56
AN20
SB_DQ58
AK18
SB_DQ59
AL18
SB_DQ60
AK20
SB_DQ51
AM22
SB_DQ52
AN22
SB_DQ53
AP21
SB_DQ54
AK21
SB_DQ55
AK22
SB_DQ46
AV17
SB_DQ47
AU17
SB_DQ48
AR21
SB_DQ49
AR22
SB_DQ50
AL21
SB_DQ45
AU19
SB_DQ41
AW19
SB_DQ42
AY17
SB_DQ43
AW17
SB_DQ44
AV19
SB_DQ40
AY19
SB_DQ36
AV23
SB_DQ37
AU23
SB_DQ38
AV21
SB_DQ39
AU21
SB_DQ35
AW21
SB_DQ31
AL25
SB_DQ32
AY23
SB_DQ33
AW23
SB_DQ30
AK25
SB_DQ34
AY21
SB_DQ26
AR25 SB_DQ25
AR26
SB_DQ27
AP25
SB_DQ28
AK26
SB_DQ29
AM26
SB_DQ20
AR29
SB_DQ21
AN29
SB_DQ22
AR28
SB_DQ23
AP28
SB_DQ24
AN26
SB_DQ15
AU25
SB_DQ16
AM29
SB_DQ17
AK29
SB_DQ18
AL28
SB_DQ19
AK28
SB_DQ10
AY25
SB_DQ11
AW25
SB_DQ13
AU27
SB_DQ5
AU31
SB_DQ6
AV29
SB_DQ7
AU29
SB_DQ8
AY27
SB_DQ9
AW27
SB_DQ0
AY31
SB_DQ1
AW31
SB_DQ2
AY29
SB_DQ3
AW29
SB_DQ4
AV31
SB_DQ14
AV25
SB_DQ12
AV27
DDR CHANNEL A
HASWELL_MCP_E
Rev1p2
3 OF 19
UC1C @
DDR CHANNEL A
HASWELL_MCP_E
Rev1p2
3 OF 19
UC1C @
SA_DQ25
AR55
SA_DQ28
AL55
SA_CLK1
AY36
SA_CLK#1
AW36
SA_CLK0
AV37
SA_CLK#0
AU37
SA_DQ0
AH63
SA_DQ1
AH62
SA_DQ2
AK63
SA_DQ3
AK62
SA_DQ4
AH61
SA_DQ5
AH60
SA_DQ6
AK61
SA_DQ7
AK60
SA_DQ8
AM63
SA_DQ9
AM62
SA_DQ10
AP63
SA_DQ11
AP62
SA_DQ12
AM61
SA_DQ13
AM60
SA_DQ14
AP61
SA_DQ16
AP58
SA_DQ17
AR58
SA_DQ18
AM57
SA_DQ19
AK57
SA_DQ20
AL58
SA_DQ21
AK58
SA_DQ22
AR57
SA_DQ23
AN57
SA_DQ24
AP55
SA_DQ27
AK54 SA_DQ26
AM54
SA_DQ29
AK55
SA_DQ30
AR54
SA_DQ31
AN54
SA_DQ32
AY58
SA_DQ33
AW58
SA_DQ34
AY56
SA_DQ35
AW56
SA_DQ36
AV58
SA_DQ37
AU58
SA_DQ38
AV56
SA_DQ39
AU56
SA_DQ40
AY54
SA_DQ41
AW54
SA_DQ42
AY52
SA_DQ43
AW52
SA_DQ44
AV54
SA_DQ45
AU54
SA_DQ46
AV52
SA_DQ47
AU52
SA_DQ48
AK40
SA_DQ49
AK42
SA_DQ50
AM43
SA_DQ51
AM45
SA_DQ52
AK45
SA_DQ53
AK43
SA_DQ54
AM40
SA_DQ55
AM42
SA_DQ56
AM46
SA_DQ57
AK46
SA_DQ58
AM49
SA_DQ59
AK49
SA_DQ60
AM48
SA_DQ61
AK48
SA_DQ62
AM51
SA_DQ63
AK51
SA_DQ15
AP60
SA_CKE2
AY42
SA_CKE1
AW43
SA_CKE0
AU43
SA_CKE3
AY43
SA_CS#1
AR32
SA_CS#0
AP33
SA_ODT0
AP32
SA_RAS
AY34
SA_CAS
AU34
SA_WE
AW34
SA_BA0
AU35
SA_BA1
AV35
SA_BA2
AY41
SA_MA1
AY37
SA_MA0
AU36
SA_MA2
AR38
SA_MA3
AP36
SA_MA4
AU39
SA_MA5
AR36
SA_MA7
AW39
SA_MA6
AV40
SA_MA9
AU40
SA_MA8
AY39
SA_MA11
AW41
SA_MA12
AU41
SA_MA10
AP35
SA_MA14
AV42
SA_MA13
AR35
SA_MA15
AU42
SA_DQSN0
AJ61
SA_DQSN2
AM58
SA_DQSN1
AN62
SA_DQSN3
AM55
SA_DQSN5
AV53
SA_DQSN4
AV57
SA_DQSN7
AL48
SA_DQSN6
AL43
SA_DQSP1
AN61
SA_DQSP0
AJ62
SA_DQSP4
AW57
SA_DQSP3
AN55
SA_DQSP2
AN58
SA_DQSP6
AL42
SA_DQSP5
AW53
SA_DQSP7
AL49
SM_VREF_CA
AP49
SM_VREF_DQ1
AP51
SM_VREF_DQ0
AR51

7. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDA for AUDIO
HDD/SSD
within 500 mils
H：Integrated VRM enable
L：Integrated VRM disable
INTVRMEN
*
ME Debug
ODD_DETECT# PU at Page10
CMOS Setting, near DDR Door
iME Setting.
ODD
0812 -> Add R277 for RTC reserve charge
RTC schematic for non-chargeable
FAN Control Circuit
10mil
1A
Main source SA00005CA00
2nd source SA00005JO00
Change D16,D17 P/N from
SCS0340L010 to SCS00003500
for X code.
SM_INTRUDER#
PCH_INTVRMEN
SATA_RCOMP
PCH_TCK_JTAGX
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDOUT
PCH_JTAG_RST#
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_SRTCRST#
PCH_INTVRMEN
PCH_JTAG_TCK
PCH_SRTCRST#
PCH_RTCRST#
HDA_SDOUT
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
FAN_SPEED1
+FAN2
+FAN2
+5VS_FAN
SM_INTRUDER#
PCH_RTCX1
PCH_RTCX2
+RTCBATT_R
PCH_RTCRST#
SATA_PRX_C_DTX_P0 <31>
SATA_PTX_DRX_N0 <31>
SATA_PTX_DRX_P0 <31>
SATA_PRX_C_DTX_N0 <31>
AZ_SDIN0_HD
<35>
PWRME_CTRL
<36>
AZ_RST_HD#
<35>
AZ_BITCLK_HD
<35>
AZ_SDOUT_HD
<35>
AZ_SYNC_HD
<35>
SATA_PRX_C_DTX_P1 <31>
SATA_PTX_DRX_N1 <31>
SATA_PTX_DRX_P1 <31>
SATA_PRX_C_DTX_N1 <31>
ODD_DETECT# <10,31>
FAN_SPEED1 <36>
DFAN1
<36>
EC_SMI# <36>
PCH_RTCRST#
<36>
+RTCVCC
+1.05VS_ASATA3PLL
+RTCVCC
+3VL
+RTCVCC
+RTCBATT
+3VS
+5VS
+RTC_R
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(3/11) RTC,SATA,XDP
Custom
7 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(3/11) RTC,SATA,XDP
Custom
7 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(3/11) RTC,SATA,XDP
Custom
7 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
RH24
20K_0402_5%
RH24
20K_0402_5%
1 2
YH1
32.768KHZ_12.5P_1TJF125DP1A000D
YH1
32.768KHZ_12.5P_1TJF125DP1A000D
1
2
R163 0_0402_5%
Rshort@
R163 0_0402_5%
Rshort@
1 2
JME @
JME @
1 2
T12 @
T12 @
T165
@ T165
@
R98
51_0402_5% @ R98
51_0402_5% @
1 2
R32 0_0603_5%
Rshort@
R32 0_0603_5%
Rshort@
1 2
T14
@ T14
@
R73 330K_0402_5%
R73 330K_0402_5%
1 2
RP14
33_0804_8P4R_5%
RP14
33_0804_8P4R_5%
1 8
2 7
3 6
4 5
T19 @
T19 @
R72 1M_0402_5%
R72 1M_0402_5%
1 2
C75
0.01U_0402_25V7K
@
C75
0.01U_0402_25V7K
@
1
2
T7 @
T7 @
T9 @
T9 @
SATA
AUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p2
5 OF 19
UC1E @
SATA
AUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p2
5 OF 19
UC1E @
INTVRMEN
AV7
SRTCRST
AV6
RTCRST
AU7
RTCX1
AW5
SATA_RN0/PERN6_L3
J5
SATA_RP0/PERP6_L3
H5
SATA_TN0/PETN6_L3
B15
SATA_TP0/PETP6_L3
A15
SATA_RP1/PERP6_L2
H8
SATA_RN1/PERN6_L2
J8
SATA_TN1/PETN6_L2
A17
SATA_TP1/PETP6_L2
B17
SATA_RP2/PERP6_L1
H6
SATA_RN2/PERN6_L1
J6
SATA_TN2/PETN6_L1
B14
SATA_TP2/PETP6_L1
C15
SATA_RN3/PERN6_L0
F5
SATA_RP3/PERP6_L0
E5
SATA_TN3/PETN6_L0
C17
SATA_TP3/PETP6_L0
D17
SATA0GP/GPIO34
V1
SATA1GP/GPIO35
U1
SATA2GP/GPIO36
V6
SATA3GP/GPIO37
AC1
SATA_IREF
A12
SATA_RCOMP
C12
INTRUDER
AU6 RTCX2
AY5
JTAGX
AE63
SATALED
U3
I2S1_SCLK
AY8
RSVD
AV2
RSVD
AL11
RSVD
AC4
HDA_BCLK/I2S0_SCLK
AW8
HDA_SYNC/I2S0_SFRM
AV11
HDA_RST/I2S_MCLK
AU8
HDA_SDI0/I2S0_RXD
AY10
HDA_SDO/I2S0_TXD
AU11 HDA_SDI1/I2S1_RXD
AU12
HDA_DOCK_EN/I2S1_TXD
AW10
HDA_DOCK_RST/I2S1_SFRM
AV10
PCH_TRST
AU62
PCH_TCK
AE62
PCH_TDI
AD61
PCH_TDO
AE61
PCH_TMS
AD62 RSVD
K10
RSVD
L11
D17 RB751V40_SC76-2
@
D17 RB751V40_SC76-2
@
1 2
CH5
1U_0402_6.3V6K
CH5
1U_0402_6.3V6K
1 2
T13
@ T13
@
T22 @
T22 @
C60
10U_0805_6.3V6M
C60
10U_0805_6.3V6M
1
2
JRTC
SUYIN_060003HA002G202ZL
@
JRTC
SUYIN_060003HA002G202ZL
@
+
1
-
2
R29 10K_0402_5%
R29 10K_0402_5%
1
2
C43
1000P_0402_50V7K
@
C43
1000P_0402_50V7K
@
1
2
T159
@ T159
@
T15 @
T15 @
R437
1K_0402_5%
R437
1K_0402_5%
1
2
T6 @
T6 @
JCMOS @
JCMOS @
1 2
JFAN
CVILU_CI4403M1HRT-NH
@
JFAN
CVILU_CI4403M1HRT-NH
@
1
1
2
2
3
3
GND
4
GND
5
RH23
20K_0402_5%
RH23
20K_0402_5%
1 2
CH2 15P_0402_50V8J
CH2 15P_0402_50V8J
1
2
T21 @
T21 @
T95 @
T95 @
R277 1K_0402_5%
@
R277 1K_0402_5%
@
1
2
T8 @
T8 @
CH3 15P_0402_50V8J
CH3 15P_0402_50V8J
1
2
D16 RB751V40_SC76-2
D16 RB751V40_SC76-2
1 2
CH4
1U_0402_6.3V6K
CH4
1U_0402_6.3V6K
1 2
C71
10U_0805_6.3V6M
C71
10U_0805_6.3V6M
1
2
T10 @
T10 @
RH2
10M_0402_5%
RH2
10M_0402_5%
1
2
U4
P2793BB0_SO8
U4
P2793BB0_SO8
EN
1
VIN
2
VOUT
3
VSET
4
GND
8
GND
7
GND
6
GND
5
C502
0.1U_0402_16V4Z
C502
0.1U_0402_16V4Z
1
2
R2 3.01K_0402_1%
R2 3.01K_0402_1%
1 2
T11 @
T11 @

8. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PU 2.2K at EC side (+3VS)
WLAN
PCIE LAN
SPI ROM for BIOS & ME & Win8 (8MByte )
Please place UH3 close to U1 CPU,
Please place RH66, RH67, RH68 near UH3
CLKREQ_WLAN# pull high on page 10
PCH_SMBDATA pull high on page 10
PCH_X1
PCH_X2
XCLK_BIASREF
PCH_SPICS0#
PCH_SPICLK
PCH_SPIDI
PCH_SPIDO1
CLKOUT_LPC0
PCH_SMLCLK1
PCH_SMBCLK
PCH_SMBDATA
PCH_SMBCLK
PCH_SPIDO2
PCH_SPIDO3
CLKREQ_LAN#
CLKREQ_WLAN#
CLK_REQ_VGA#
CLK_BCLK_ITP#
CLK_BCLK_ITP
PCH_SMLCLK1
PCH_SMLCLK1
PCH_SMLDATA1
PCH_X2
PCH_X1
PCH_SMBDATA
PCH_SMBCLK
PCH_SPIDO2
PCH_SPIDO3
PCH_SPI0_DO3 PCH_SPIDO3
PCH_SPIDI
PCH_SPI0_CLK
PCH_SPI0_DI
PCH_SPICS0#
PCH_SPI0_DO1
PCH_SPI0_DO2
PCH_SPIDO1
PCH_SPIDO2
CLKOUT_LPC1_R
PCH_SPICLK
CLKREQ_CR#
CLKREQ_CR#
CLKREQ_LAN#
CLK_REQ_VGA#
CLK_PCI_EC
LPC_AD0
<33,36>
LPC_AD1
<33,36>
LPC_AD2
<33,36>
LPC_AD3
<33,36>
LPC_FRAME#
<33,36>
SMB_ALERT# <10>
PM_SMBDATA <16,17,37>
PM_SMBCLK <16,17,37>
CLK_LAN
<33>
CLK_LAN#
<33>
CLKREQ_LAN#
<33>
CLK_WLAN
<32>
CLK_WLAN#
<32>
CLK_PCIE_VGA#
<18>
CLK_PCIE_VGA
<18>
CLKREQ_WLAN#
<10,32>
CLK_PCI_EC <36>
EC_SMB_CK2 <19,36>
EC_SMB_DA2 <19,36>
CLK_REQ_VGA#
<19>
LAN_EN <10,33>
SML0DATA <10>
USB_CHG_OC#
<11>
SUSWARN#
<9>
SML0CLK <10>
PCH_SMBDATA <10>
PCH_SMLDATA1 <10>
EC_CS0#
<36>
EC_SDIO
<36>
EC_SCK <36>
EC_SDI <36>
CLKOUT_LPC1 <33>
CLK_CR
<37>
CLK_CR#
<37>
CLKREQ_CR#
<37>
+1.05VS_AXCK_LCPLL
+3VALW_PCH
+3VS
+3VS
+3VS
+3VALW_PCH
+3VALW_PCH
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(4/11) CLK,SPI,SMBUS
Custom
8 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(4/11) CLK,SPI,SMBUS
Custom
8 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(4/11) CLK,SPI,SMBUS
Custom
8 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
RH91
10K_0402_5%
VGA@
RH91
10K_0402_5%
VGA@
1
2
RH90 10K_0402_5%
RH90 10K_0402_5%
1 2
T24
@ T24
@
RH74 15_0402_5%
FIX@
RH74 15_0402_5%
FIX@
1 2
UH3
S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
UH3
S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
CS#
1
SO
2
WP#
3
GND
4
VCC
8
HOLD#
7
SCLK
6
SI
5
R148 10K_0402_5%
R148 10K_0402_5%
1 2
T18
@ T18
@
T170
@ T170
@
RH16 1K_0402_5%
RH16 1K_0402_5%
1
2
QH4B
2N7002DW-T/R7_SOT363-6
QH4B
2N7002DW-T/R7_SOT363-6
3
5
4
R119
4.7K_0402_5%
R119
4.7K_0402_5%
1
2
RH78 15_0402_5%
FIX@
RH78 15_0402_5%
FIX@
1 2
T23
@ T23
@
RH69 15_0402_5%
RH69 15_0402_5%
1 2
C3
12P_0402_50V8J
C3
12P_0402_50V8J
1
2
Y2
24MHZ_12PF_X3G024000DC1H
Y2
24MHZ_12PF_X3G024000DC1H
1
2
3
4
R391 22_0402_5%
TPM@EMI@
R391 22_0402_5%
TPM@EMI@
1
2
R141 10K_0402_5%
R141 10K_0402_5%
1 2
T25
@ T25
@
RH65 15_0402_5%
RH65 15_0402_5%
1 2
R78 3.01K_0402_1%
R78 3.01K_0402_1%
1 2
RH92 10K_0402_5%
RH92 10K_0402_5%
1 2
RH61 15_0402_5%
FIX@
RH61 15_0402_5%
FIX@
1 2
T160 @
T160 @
CH10
10P_0402_50V8J
@EMI@
CH10
10P_0402_50V8J
@EMI@
1
2
RH5 1K_0402_5%
RH5 1K_0402_5%
1
2
RH89
10K_0402_5%
UMA@
RH89
10K_0402_5%
UMA@
1
2
T158 @
T158 @
T16
@ T16
@
Q7A
2N7002DW-T/R7_SOT363-6
Q7A
2N7002DW-T/R7_SOT363-6
6 1
2
CH9 0.1U_0402_10V7K
CH9 0.1U_0402_10V7K
1 2
T130
@ T130
@
R140 10K_0402_5%
R140 10K_0402_5%
1 2
HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p2
6 OF 19
UC1F @ HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p2
6 OF 19
UC1F @
PCIECLKRQ0/GPIO18
U2
CLKOUT_PCIE_N1
B41
CLKOUT_PCIE_P1
A41
PCIECLKRQ1/GPIO19
Y5
CLKOUT_ITPXDP_P
A35
CLKOUT_ITPXDP_N
B35
CLKOUT_LPC_1
AP15
CLKOUT_LPC_0
AN15
XTAL24_OUT
B25
XTAL24_IN
A25
PCIECLKRQ5/GPIO23
T2 CLKOUT_PCIE_P5
A37 CLKOUT_PCIE_N5
B37
PCIECLKRQ4/GPIO22
U5
CLKOUT_PCIE_N4
A39
CLKOUT_PCIE_P4
B39
PCIECLKRQ3/GPIO21
N1 CLKOUT_PCIE_P3
C37 CLKOUT_PCIE_N3
B38
PCIECLKRQ2/GPIO20
AD1
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
B42
CLKOUT_PCIE_P0
C42 CLKOUT_PCIE_N0
C43
DIFFCLK_BIASREF
C26
RSVD
K21
RSVD
M21
TESTLOW_C35
C35
TESTLOW_C34
C34
TESTLOW_AK8
AK8
TESTLOW_AL8
AL8
R116
4.7K_0402_5%
R116
4.7K_0402_5%
1
2
RH66 0_0402_5%
Rshort@
RH66 0_0402_5%
Rshort@
1 2
R390 22_0402_5%
EMI@
R390 22_0402_5%
EMI@ 1
2
RH72 15_0402_5%
FIX@
RH72 15_0402_5%
FIX@
1 2
T17
@ T17
@
R142 10K_0402_5%
R142 10K_0402_5%
1 2
RH67 15_0402_5%
RH67 15_0402_5%
1 2
RP8
2.2K_0804_8P4R_5%
RP8
2.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RH68 15_0402_5%
RH68 15_0402_5%
1 2
Q7B
2N7002DW-T/R7_SOT363-6
Q7B
2N7002DW-T/R7_SOT363-6
3
5
4
C2
12P_0402_50V8J
C2
12P_0402_50V8J
1
2
QH4A
2N7002DW-T/R7_SOT363-6
QH4A
2N7002DW-T/R7_SOT363-6
6 1
2
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p2
7 OF 19
UC1G @
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p2
7 OF 19
UC1G @
LAD0
AU14
LAD1
AW12
LAD2
AY12
LAD3
AW11
LFRAME
AV12
SPI_CS0
Y7 SPI_CLK
AA3
SPI_CS1
Y4
SPI_CS2
AC2
SPI_MOSI
AA2
SPI_MISO
AA4
SPI_IO2
Y6
SPI_IO3
AF1
SMBALERT/GPIO11
AN2
SMBCLK
AP2
SML0ALERT/GPIO60
AL2
SMBDATA
AH1
SML0CLK
AN1
SML0DATA
AK1
SML1ALERT/PCHHOT/GPIO73
AU4
SML1DATA/GPIO74
AH3
SML1CLK/GPIO75
AU3
CL_CLK
AF2
CL_DATA
AD2
CL_RST
AF4
R48
1M_0402_5% R48
1M_0402_5%
1
2
CH11
10P_0402_50V8J
@EMI@
CH11
10P_0402_50V8J
@EMI@
1
2

9. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H：Enable(DEFAULT)
L：Disable
DSWODVREN - On Die DSW VR Enable
*
1: Port B or C is detected
0: Port B or C is not detected
DDPB_CTRLDATA: Port B Detected
*
(Have internal PD)
DDPC_CTRLDATA: Port C Detected
not support Deep S4,S5 can NC
Note for PCH_ACIN: Deep Sx need use
EC GPIO for ACPRESENT function
Change D21 P/N from
SCS0340L010 to SCS00003500
for X code.
SYS_RESET#
PCH_RSMRST#
SYS_RESET#
SYS_PWROK
PCH_RSMRST#
SUSWARN#
PCH_BATLOW#
PLT_RST#
PCH_ACIN
CLKRUN#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PM_SLP_LAN#
DSWODVREN
PLT_RST#
SUSACK#
SUSWARN#
PCH_PWROK
PCH_ACIN
PCH_GPIO53
PCH_RSMRST#
PCH_GPIO51
SYS_PWROK
H_EDP_HPD
PCH_PWM
EC_SWI#
H_EDP_HPD
EC_SWI#
PCH_GPIO54
PCH_RSMRST#
PCH_PWROK
PCH_PWROK
EC_ENBKL_R
PLT_RST#
PCH_RSMRST#
PCH_PWROK
EC_ENBKL_R
EC_ENBKL_R_CPU
ACIN
<36,41>
PCH_PWROK
<36>
PCH_RSMRST#
<36>
CLK_EC <32>
PM_SLP_S3# <36>
PM_SLP_S4# <36>
PM_SLP_S5# <36>
PLT_RST_BUF# <32,33,37>
PLT_RST#
<18,36>
SUSWARN#
<8>
DGPU_HOLD_RST#
<10,18>
UMA_HDMI_CLK <28>
UMA_HDMI_DATA <28>
H_EDP_HPD <26,27>
HDMI_HPD <10,28>
LCD_ENVDD
<27>
PCH_PWM_TL
<26>
PCH_PWM_EDP
<27>
EC_ENBKL_R
<26,36>
PBTN_OUT#
<36>
PXS_PWREN
<10,20,45,48>
DGPU_PWRGD
<18,48>
EC_SWI# <33,36>
POK
<36,42>
H_DP_HPD <29>
H_DDI1_AUXN <29>
H_DDI1_AUXP <29>
TP_INTR#
<10,37>
+3VALW_PCH
+3VALW_PCH
+RTCVCC
+3VS
+3VS
+3VS
+3VALW_PCH
+3VS
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(5/11) PM,GPIO,DDI
Custom
9 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(5/11) PM,GPIO,DDI
Custom
9 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(5/11) PM,GPIO,DDI
Custom
9 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
T27
@ T27
@
R245
100K_0402_5%
R245
100K_0402_5%
1
2
T96
@ T96
@
U30
MC74VHC1G08DFT2G_SC70-5
U30
MC74VHC1G08DFT2G_SC70-5
IN1
1
IN2
2
GND
3
OUT
4
VCC
5
R65 0_0402_5%
Rshort@
R65 0_0402_5%
Rshort@
1 2
R416
100K_0402_5%
R416
100K_0402_5%
1
2
R417
100K_0402_5%
R417
100K_0402_5%
1
2
RH17 0_0402_5%
LVDS@
RH17 0_0402_5%
LVDS@
1 2
RH18 0_0402_5%
IEDP@
RH18 0_0402_5%
IEDP@
1 2
R118
10K_0402_5%
@
R118
10K_0402_5%
@
1 2
T26 @
T26 @
C170 0.1U_0402_16V7K
@
C170 0.1U_0402_16V7K
@
1
2
T31 @
T31 @
DH2
BAS40-04_SOT23-3
DH2
BAS40-04_SOT23-3
1
2
3
R208
10K_0402_5%
R208
10K_0402_5%
1
2
T29
@ T29
@
CH7 180P_0402_50V8J
@ESD@
CH7 180P_0402_50V8J
@ESD@
1 2
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p2
9 OF 19
UC1I @
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p2
9 OF 19
UC1I @
EDP_BKLCTL
B8
DDPB_AUXN
C5
DDPC_HPD
A8
EDP_HPD
D6
DDPB_HPD
C8
DDPC_CTRLDATA
D11
DDPC_CTRLCLK
D9
DDPB_CTRLDATA
C9
DDPB_CTRLCLK
B9
PIRQA/GPIO77
U6
PIRQB/GPIO78
P4
PIRQC/GPIO79
N4
PIRQD/GPIO80
N2
PME
AD4
GPIO55
U7
GPIO52
L1
GPIO54
L3
GPIO51
R5
GPIO53
L4
EDP_BKLEN
A9
DDPB_AUXP
B5
DDPC_AUXP
A6
DDPC_AUXN
B6
EDP_VDDEN
C6
R157 8.2K_0402_5%
R157 8.2K_0402_5%
1 2
R156 8.2K_0402_5%
R156 8.2K_0402_5%
1 2
D21
RB751V40_SC76-2
D21
RB751V40_SC76-2
1 2
R271 2.2K_0402_5%
R271 2.2K_0402_5%
1 2
RH7 0_0402_5%
HASWELL@
RH7 0_0402_5%
HASWELL@
1 2
R117
10K_0402_5% R117
10K_0402_5% 1
2
RH171
1K_0402_5%
RH171
1K_0402_5%
1
2
T28
@ T28
@
RH19 0_0402_5%
Rshort@
RH19 0_0402_5%
Rshort@
1 2
RH8 0_0402_5%
BROADWELL@
RH8 0_0402_5%
BROADWELL@
1 2
R227
10K_0402_5%
R227
10K_0402_5%
1
2
T104
@ T104
@
R403
@
0_0402_5%
R403
@
0_0402_5%
1
2
T157 @
T157 @
C169 0.1U_0402_16V7K
@
C169 0.1U_0402_16V7K
@
1
2
R418
100K_0402_5%
R418
100K_0402_5%
1
2
T30
@ T30
@
R206
0_0402_5%
@
R206
0_0402_5%
@
1 2
R124 330K_0402_5%
R124 330K_0402_5%
1 2
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p2
8 OF 19
UC1H @
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p2
8 OF 19
UC1H @
SUSACK
AK2
PLTRST
AG7
PCH_PWROK
AY7 SYS_PWROK
AG2 SYS_RESET
AC3
APWROK
AB5
RSMRST
AW6
ACPRESENT/GPIO31
AJ8
BATLOW/GPIO72
AN4
PWRBTN
AL7 SUSWARN/SUSPWRDNACK/GPIO30
AV4
SLP_S0
AF3
SLP_WLAN/GPIO29
AM5
DPWROK
AV5
DSWVRMEN
AW7
WAKE
AJ5
SUS_STAT/GPIO61
AG4
CLKRUN/GPIO32
V5
SUSCLK/GPIO62
AE6
SLP_S4
AJ6
SLP_S5/GPIO63
AP5
SLP_S3
AT4
SLP_LAN
AJ7
SLP_SUS
AP4
SLP_A
AL5

10. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GSPI0_MOSI / GPIO86 : Boot BIOS Strap
1: ENABLED
(Have internal PD)
*
0: SPI ROM
1: Intel ME TLS with confidentiality
GPIO15 : TLS Confidentiality
0: Intel ME TLS with no confidentiality
* (Have internal PD)
SDIO_D0 / GPIO66 : Top-Block Swap Override
1: ENABLED
0: DISABLED
*
(Have internal PU)
GPIO87/GPIO49
0
1
PowerXpress
UMA
DGPU_PRSNT#
1: ENABLED
0: DISABLED
SPKR / GPIO81 : NO REBOOT
*
(Have internal PD)
Note: need check all GPIO PU need or not after BIOS post
Need to check the resistors value
GPIO69
1
0
ZPODD SKU
None ZPODD SKU
GPIO88
0
1
TOUCH SKU
None TOUCH SKU
H_THERMTRIP#
SERIRQ
PCH_OPIRCOMP
KB_RST#
PCH_GPIO59
PCH_GPIO9
PCH_SPKR
PCH_GPIO14
PCH_GPIO64
PCH_GPIO65
PCH_GPIO67
PCH_GPIO93
PCH_GPIO83
PCH_GPIO84
PCH_GPIO85
PCH_GPIO86
DGPU_PRSNT#_GPIO87
PCH_GPIO89
PCH_GPIO24
PCH_GPIO26
PCH_GPIO27
PCH_GPIO28
PCH_GPIO66
PCH_GPIO46
PCH_GPIO47
PASSWORD_CLEAR#
PCH_GPIO58
EC_LID_OUT#
PCH_GPIO45
PCH_GPIO86
EC_LID_OUT#
PCH_GPIO66
DGPU_PRSNT#
PCH_GPIO71
PCH_SPKR
PM_I2CSDA1
PM_I2CSCL1
PCH_GPIO3
PCH_GPIO5
PM_I2CSDA1
PM_I2CSCL1
PCH_GPIO27
PASSWORD_CLEAR#
ZP_DETECT
PCH_GPIO68
SERIRQ
H_THERMTRIP#
PCH_GPIO92
ODD_DA#
ODD_EN
ODD_EN
ODD_DA#
ZP_DETECT
ODD_DA#
DGPU_PRSNT#
DGPU_PRSNT#_GPIO49
DGPU_PRSNT#
PCH_GPIO88
SERIRQ <33,36>
KB_RST# <36>
PCH_SPKR
<35>
EC_LID_OUT#
<36>
PM_I2CSDA1 <37>
PM_I2CSCL1 <37>
PXS_PWREN <20,45,48,9>
SMB_ALERT# <8>
HDMI_HPD <28,9>
DGPU_HOLD_RST# <18,9>
CLKREQ_WLAN# <32,8>
ODD_DETECT# <31,7>
ODD_DA#
<31>
ODD_EN
<38>
TP_INTR# <37,9>
PCH_SMBDATA <8>
PCH_SMLDATA1 <8>
USB_OC#2 <11,33,36>
USB_OC#0 <11,34,36>
SML0CLK <8>
LAN_EN <33,8>
SML0DATA <8>
EC_SCI#
<36>
+3VS
+3VALW_PCH
+3VS
+3VALW_PCH
+3VS
+3VS
+3VS
+1.05VS_VTT
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(6/11) GPIO,LPIO
Custom
10 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(6/11) GPIO,LPIO
Custom
10 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(6/11) GPIO,LPIO
Custom
10 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
T134
@ T134
@
T106
@ T106
@
R247 10K_0402_5%
R247 10K_0402_5%
1 2
R270 1K_0402_1%
@
R270 1K_0402_1%
@
1 2
JPW
@
JPW
@
1
2
RP27
10K_0804_8P4R_5%
RP27
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP35
2.2K_0804_8P4R_5%
RP35
2.2K_0804_8P4R_5%
1
8
2
7
3
6
4
5
T133
@ T133
@
T168 @
T168 @
RH9 0_0402_5%
HASWELL@
RH9 0_0402_5%
HASWELL@
1 2
RH6 0_0402_5%
BROADWELL@
RH6 0_0402_5%
BROADWELL@
1 2
T169 @
T169 @
R146
49.9_0402_1%
R146
49.9_0402_1%
1 2
RP28
10K_0804_8P4R_5%
RP28
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
T167 @
T167 @
RP34
10K_0804_8P4R_5%
RP34
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RH4 0_0402_5%
HASWELL@
RH4 0_0402_5%
HASWELL@
1 2
R219
10K_0402_5%
VGA@
R219
10K_0402_5%
VGA@
1
2
R269 1K_0402_1%
@
R269 1K_0402_1%
@
1 2
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p2
10 OF 19
UC1J @
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p2
10 OF 19
UC1J @
GPIO56
AG6
GPIO57
AP1
GPIO27
AN5
GPIO28
AD7
GPIO26
AN3
SDIO_D1/GPIO67
E4
SDIO_D2/GPIO68
C3
SDIO_D3/GPIO69
E2
SDIO_D0/GPIO66
D3
SDIO_CLK/GPIO64
E3
SDIO_CMD/GPIO65
F4
I2C1_SCL/GPIO7
F1
I2C1_SDA/GPIO6
G4
I2C0_SCL/GPIO5
F3
I2C0_SDA/GPIO4
F2
UART1_RST/GPIO2
J3
UART1_CTS/GPIO3
J4
UART1_RXD/GPIO0
K4
UART1_TXD/GPIO1
G2
UART0_CTS/GPIO94
G1
UART0_TXD/GPIO92
K3
UART0_RTS/GPIO93
J2
UART0_RXD/GPIO91
J1
GSPI1_MISO/GPIO89
N7
GSPI_MOSI/GPIO90
K2
GSPI1_CLK/GPIO88
L5
GSPI1_CS/GPIO87
R7
GSPI0_MOSI/GPIO86
L8
GSPI0_CLK/GPIO84
L6
GSPI0_MISO/GPIO85
N6
GSPI0_CS/GPIO83
R6
RCIN/GPIO82
V4
THERMTRIP
D60
DEVSLP2/GPIO39
N5
SPKR/GPIO81
V2
DEVSLP1/GPIO38
L2 SDIO_POWER_EN/GPIO70
C4 DEVSLP0/GPIO33
P2
GPIO9
AM3
GPIO10
AM2
GPIO45
AG5
GPIO46
AG3
GPIO14
AH4
GPIO25
AM4
GPIO13
AT3 HSIOPC/GPIO71
Y2 GPIO50
P3 GPIO49
Y3
GPIO47
AB6
GPIO48
U4
GPIO59
AT5
GPIO16
Y1
GPIO17
T3
GPIO15
AD6
GPIO8
AU2
GPIO24
AD5
BMBUSY/GPIO76
P1
GPIO44
AK4
GPIO58
AL4
LAN_PHY_PWR_CTRL/GPIO12
AM7
SERIRQ
T4
PCH_OPI_RCOMP
AW15
RSVD
AF20
RSVD
AB21
T136 @
T136 @
R274 1K_0402_5%
@
R274 1K_0402_5%
@
1 2
T132
@ T132
@
T166 @
T166 @
T111
@ T111
@
T139 @
T139 @
R272 1K_0402_5%
@
R272 1K_0402_5%
@
1 2
R306
10K_0402_5%
UMA@
R306
10K_0402_5%
UMA@
1
2
RH10 0_0402_5%
BROADWELL@
RH10 0_0402_5%
BROADWELL@
1 2
R215
10K_0402_5% ZPODD@
R215
10K_0402_5% ZPODD@
1
2
R273 1K_0402_5%
@
R273 1K_0402_5%
@
1 2
CH8 180P_0402_50V8J
ESD@
CH8 180P_0402_50V8J
ESD@
1 2
RP23
10K_0804_8P4R_5%
RP23
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
T162 @
T162 @
R216
10K_0402_5% NONZP@
R216
10K_0402_5% NONZP@
1
2
T114
@ T114
@
T135
@ T135
@
R144
1K_0402_5%
R144
1K_0402_5%
1
2

11. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Camera
CAD note:
Route single-end 50-ohms and max 450-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils
USB3.0 P1
USB3.0 P2
USB3.0 P3 / PCIE P1
USB3.0 P4 / PCIE P2
PCIE LAN
WLAN NGFF type
WiMAX / BT
USB-Right1
USB-Right2
USB-Left1
Touch Screen
USB-Right
USB-Left
PCIE Card Reader
USBRBIAS
PCIE_RCOMP
PCIE_CTX_C_GRX_N0 PEG_HTX_GRX_N0
PEG_HTX_GRX_P0
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N1 PEG_HTX_GRX_N1
PEG_HTX_GRX_P1
PCIE_CTX_C_GRX_P1
PEG_HTX_GRX_N2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P2 PEG_HTX_GRX_P2
PCIE_CTX_C_GRX_N3 PEG_HTX_GRX_N3
PEG_HTX_GRX_P3
PCIE_CTX_C_GRX_P3
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P1
PCIE_PTX_LANRX_P3
PCIE_PTX_LANRX_N3
PCIE_PTX_WLANRX_N4
PCIE_PTX_WLANRX_P4
PCIE_PTX_CRRX_N2
PCIE_PTX_CRRX_P2
USB_OC#0_R
USB_OC#2_R
USB_OC#0 <10,34,36>
USB20_N7 <27>
USB20_P7 <27>
USB_OC#2 <10,33,36>
PCIE_GTX_C_CRX_N[0..3] <18>
PCIE_CTX_C_GRX_P[0..3] <18>
PCIE_CTX_C_GRX_N[0..3] <18>
PCIE_GTX_C_CRX_P[0..3] <18>
PCIE_PRX_C_LANTX_P3
<33>
PCIE_PTX_C_LANRX_N3
<33>
PCIE_PRX_C_LANTX_N3
<33>
PCIE_PTX_C_LANRX_P3
<33>
PCIE_PTX_C_WLANRX_N4
<32>
PCIE_PRX_WLANTX_P4
<32>
PCIE_PRX_WLANTX_N4
<32>
PCIE_PTX_C_WLANRX_P4
<32>
USB20_P4 <32>
USB20_N0 <34>
USB20_P1 <34>
USB20_N1 <34>
USB20_N4 <32>
USB20_P2 <33>
USB20_N2 <33>
USB20_P0 <34>
U3TXDP2 <34>
U3TXDN2 <34>
U3RXDP2 <34>
U3RXDN2 <34>
USB20_P5 <27>
USB20_N5 <27>
PCIE_PTX_C_CRRX_N2
<37>
PCIE_PRX_C_CRTX_P2
<37>
PCIE_PRX_C_CRTX_N2
<37>
PCIE_PTX_C_CRRX_P2
<37>
USB_CHG_OC# <8>
+1.05VS_AUSB3PLL
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(7/11) PCIE,USB
Custom
11 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(7/11) PCIE,USB
Custom
11 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(7/11) PCIE,USB
Custom
11 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
R167 0_0402_5%
@
R167 0_0402_5%
@
1 2
R154 22.6_0402_1%
R154 22.6_0402_1%
1 2
C157 0.1U_0402_16V7K
C157 0.1U_0402_16V7K
1 2
R168 0_0402_5%
@
R168 0_0402_5%
@
1 2
C87 .1U_0402_16V7K
VGA@
C87 .1U_0402_16V7K
VGA@
1 2
C83 .1U_0402_16V7K
VGA@
C83 .1U_0402_16V7K
VGA@
1 2
T35
@ T35
@
C91 .1U_0402_16V7K
VGA@
C91 .1U_0402_16V7K
VGA@
1 2
C79 .1U_0402_16V7K
VGA@
C79 .1U_0402_16V7K
VGA@
1 2
R234 10K_0402_5%
R234 10K_0402_5%
1 2
C78 .1U_0402_16V7K
VGA@
C78 .1U_0402_16V7K
VGA@
1 2
R232 3.01K_0402_1%
R232 3.01K_0402_1%
1 2
T33 @
T33 @
T34 @
T34 @
C156 0.1U_0402_16V7K
C156 0.1U_0402_16V7K
1 2
C86 .1U_0402_16V7K
VGA@
C86 .1U_0402_16V7K
VGA@
1 2
PCIe USB
HASWELL_MCP_E
Rev1p2
11 OF 19
UC1K @
PCIe USB
HASWELL_MCP_E
Rev1p2
11 OF 19
UC1K @
PETP5_L2
C21
PERP5_L0
E10
PERN5_L1
F8
PETN5_L3
B22
PETP5_L3
A21
PERP3
F11
PETN3
C29
PETN1/USB3TN3
C30
OC3/GPIO43
AV3
OC2/GPIO42
AH2
OC1/GPIO41
AT1
OC0/GPIO40
AL3
PCIE_RCOMP
A27
PCIE_IREF
B27
PERN5_L0
F10
PERN5_L2
H10
PERP5_L2
G10
PETN5_L2
B21
PERP5_L3
F6 PERN5_L3
E6
PETP3
B30
PERN4
F13
PERP4
G13
PETP4
A29 PETN4
B29
PERP1/USB3RP3
F17
PETP1/USB3TP3
C31
PERN2/USB3RN4
F15
PETN2/USB3TN4
B31
PERP2/USB3RP4
G15
USB2N0
AN8
USB2N1
AR7
USB2N2
AR8
USB2P2
AP8
USB2N3
AR10
USB2P3
AT10
USB2N4
AM15
USB2P4
AL15
USB2P6
AN11
USB2N5
AM13
USB2P5
AN13
USB2N6
AP11
USB2P7
AP13
USB2N7
AR13
USB3TN2
B33
USB3TP2
A33
USB3RP2
F18
USB3RN2
E18
USB3TN1
C33
USB3TP1
B34
USB3RP1
H20
USB3RN1
G20
PETP5_L1
A23 PETN5_L1
B23
PERP5_L1
E8
USBRBIAS
AJ11
USBRBIAS
AJ10
PETP5_L0
C22 PETN5_L0
C23
PERN3
G11
USB2P0
AM8
USB2P1
AT7
PERN1/USB3RN3
G17
PETP2/USB3TP4
A31
RSVD
E15
RSVD
E13
RSVD
AN10
RSVD
AM10
C82 .1U_0402_16V7K
VGA@
C82 .1U_0402_16V7K
VGA@
1 2
C161 0.1U_0402_16V7K
C161 0.1U_0402_16V7K
1 2
C155 0.1U_0402_16V7K
C155 0.1U_0402_16V7K
1 2
C163 0.1U_0402_16V7K
C163 0.1U_0402_16V7K
1 2
C90 .1U_0402_16V7K
VGA@
C90 .1U_0402_16V7K
VGA@
1 2
C160 0.1U_0402_16V7K
C160 0.1U_0402_16V7K
1 2
T36
@ T36
@

12. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDDQ DECOUPLING
+1.35V : 470UF/2V/7343 *2
10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
Note: 0 ohm PLACED CLOSE TO CPU
SVID DATA
SVID ALERT
Place the PU
resistors close to CPU
Place the PU
resistors close to CPU
Reserved Only
+VCCIO_OUT
VCCST_PG_EC_R
VIDSOUT
H_CPU_SVIDALRT#
VCC_SENSE_R
VCC_SENSE_R
H_CPU_SVIDALRT#
VIDSOUT
VCCST_PG_EC_R
CPU_PWR_DEBUG
VR_SVID_CLK
<47>
VR_SVID_ALRT#
<47>
VR_SVID_DAT
<47>
VGATE
<47>
VSS_SENSE <47>
VCC_SENSE <47>
VSS_SENSE_R
<14>
VR_ON
<47>
VCCST_PG_EC
<36>
VCCST_PWRGD <36,44>
+CPU_CORE
+1.35V
+CPU_CORE
+VCCIOA_OUT
+1.05VS_VTT
+1.35V
+CPU_CORE
+1.05VS_VTT
+1.05VS_VTT
+3VALW_PCH
+1.05VS_VTT
+3VS
+1.35V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(8/11) Power
Custom
12 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(8/11) Power
Custom
12 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(8/11) Power
Custom
12 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
C11
2.2U_0402_6.3V6M
C11
2.2U_0402_6.3V6M
1
2
T107 @
T107 @
R172
43_0402_1%
R172
43_0402_1%
1
2
T41 @
T41 @
T40 @
T40 @
T44 @
T44 @
R178
0_0402_5%
Rshort@ R178
0_0402_5%
Rshort@ 1
2
T146 @
T146 @
R166
0_0402_5%
@
R166
0_0402_5%
@
1 2
CC54
22U_0603_6.3V6M
CC54
22U_0603_6.3V6M
1
2
T42 @
T42 @
C14
10U_0603_6.3V6M
@
C14
10U_0603_6.3V6M
@
1
2
T145 @
T145 @
C19
10U_0603_6.3V6M
C19
10U_0603_6.3V6M
1
2
R173
130_0402_1%
R173
130_0402_1%
1
2
C167
0.1U_0402_16V7K
@
C167
0.1U_0402_16V7K
@
1 2
T39 @
T39 @
T45 @
T45 @
CC53
22U_0603_6.3V6M
CC53
22U_0603_6.3V6M
1
2
C10
2.2U_0402_6.3V6M
C10
2.2U_0402_6.3V6M
1
2
R233
100_0402_1%
R233
100_0402_1%
1
2
T98 @
T98 @
C9
2.2U_0402_6.3V6M
C9
2.2U_0402_6.3V6M
1
2
C13
10U_0603_6.3V6M
@
C13
10U_0603_6.3V6M
@
1
2
T141 @
T141 @
C15
10U_0603_6.3V6M
C15
10U_0603_6.3V6M
1
2
R422
100K_0402_5%
@
R422
100K_0402_5%
@
1
2
T37 @
T37 @
T142 @
T142 @
T48 @
T48 @
C17
10U_0603_6.3V6M
C17
10U_0603_6.3V6M
1
2
T38 @
T38 @
R235
0_0402_5%
Rshort@ R235
0_0402_5%
Rshort@ 1
2
C12
10U_0603_6.3V6M
C12
10U_0603_6.3V6M
1
2
HSW ULT POWER
HASWELL_MCP_E
Rev1p2
12 OF 19
UC1L @
HSW ULT POWER
HASWELL_MCP_E
Rev1p2
12 OF 19
UC1L @
VCCST
AE22
VCCST
AE23
VCC
AB57
VCC
AD57
VCC
K23
VCC
VCC
VCC
VCC
VCC
VCC
E25
VCC
E23
VCC
VCC
E29
VCC
E27
VCC
E35
VCC
E33
VCC
E31
VCC
E39
VCC
E37
VCC
E45
VCC
E43
VCC
E41
VCC
E49
VCC
E47
VCC
E55
VCC
E53
VCC
E51
VCC
E57
VCC
F24
VCC
F36
VCC
F32
VCC
F28
VCC
F40
VCC
F44
VCC
F48
VCC
F56
VCC
F52
VCC
G23
VCC
G25
VCC
G27
VCC
G31
VCC
G29
VCC
G33
VCC
G35
VCC
G37
VCC
G41
VCC
G39
VCC
G43
VCC
G47
VCC
G45
VCC
G53
VCC
G51
VCC
G49
VCC
G57
VCC
G55
VCC
J23
VCC
H23
VCC
K57
VCC
L22
VCC
P57
VCC
M57
VCC
M23
VCC
U57
VCC
W57
VCC
AG57
VCC
C32 VCC
C28 VCC
C24
RSVD
L59
RSVD
J58
VDDQ
AH26
VDDQ
AJ31
VDDQ
AJ33
VDDQ
AJ37
VDDQ
AN33
VDDQ
AP43
VDDQ
AR48
VIDSCLK
N63
VIDSOUT
L63
VR_EN
F60
RSVD_TP
P60 VSS
P62 PWR_DEBUG
H59 VSS
D63
VR_READY
C59
VCCST_PWRGD
B59
VIDALERT
L62
RSVD
AE59 RSVD
AA23
VCC_SENSE
E63
RSVD
N58
VDDQ
AY50
RSVD_TP
P61
VCCST
AC22
RSVD_TP
N59
RSVD
T59
RSVD
AD60
RSVD
AD59
RSVD
AE60
RSVD
AC59
RSVD
AG58
RSVD
V59 RSVD
U59
RSVD
AA59
RSVD_TP
N61
VDDQ
AY35
VDDQ
AY40
VDDQ
AY44
VCC
F59
RSVD
AC58
RSVD
AB23
RSVD
AD23 VCCIOA_OUT
E20 VCCIO_OUT
A59
T147 @
T147 @
T143 @
T143 @
C8
2.2U_0402_6.3V6M
@
C8
2.2U_0402_6.3V6M
@
1
2
T46 @
T46 @
T131 @
T131 @
U18
74AUP1G07GW_TSSOP5
U18
74AUP1G07GW_TSSOP5
GND
3
A
2
NC
1
VCC
5
Y
4
R309
10K_0402_5%
R309
10K_0402_5%
1
2
R171
75_0402_1%
R171
75_0402_1%
1
2
T47 @
T47 @
C168
0.1U_0402_16V7K
@
C168
0.1U_0402_16V7K
@
1
2
R177
100_0402_1%
R177
100_0402_1%
1
2
T140 @
T140 @
R174 0_0402_5%
Rshort@
R174 0_0402_5%
Rshort@ 1
2
T144 @
T144 @

13. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDA --> 3.3V or 1.5V
I2C --> 1.8V
Near K9 Near L10 Near M9
Near B18
Near B11
Near AA21
Near AC9
Near AH10
Near V8
Near J18
Near A20
Near J17
Near R21
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
+3VALW to +3VALW_PCH
Near AG19
+VCCRTCEXT
PCH_PWR_EN#
+PCH_VCCDSW
PCH_PWR_EN#
<38>
+3VALW_PCH
+1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
+1.05VS_VTT
+3VALW_PCH
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
+1.05VS_VTT
+1.5VS
+RTCVCC
+3VS
+1.05VS_VTT
+3VS
+1.05VS_VTT
+RTCVCC
+1.05VS_VTT
+3VALW_PCH
+1.05VS_VTT +1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
+1.05VS_VTT +1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
+3VALW_PCH
+1.05VS_VTT
+3VALW_PCH
+3VS
+3VALW +3VALW_PCH
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(9/11) Power
Custom
13 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(9/11) Power
Custom
13 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(9/11) Power
Custom
13 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
C44 1U_0402_6.3V6K
C44 1U_0402_6.3V6K
1 2
C41
1U_0402_6.3V6K
C41
1U_0402_6.3V6K
1 2
CH111
0.1U_0402_25V6
@
CH111
0.1U_0402_25V6
@
1
2
C61
22U_0603_6.3V6M
C61
22U_0603_6.3V6M
1
2
C46 1U_0402_6.3V6K
C46 1U_0402_6.3V6K
1 2
T116 @
T116 @
C56
1U_0402_6.3V6K
C56
1U_0402_6.3V6K
1
2
C40 1U_0402_6.3V6K
C40 1U_0402_6.3V6K
1 2
C66 22U_0603_6.3V6M
C66 22U_0603_6.3V6M
1 2
T105 @
T105 @
C50
0.1U_0402_16V7K
C50
0.1U_0402_16V7K
2
C73 1U_0402_6.3V6K
C73 1U_0402_6.3V6K
1 2
RH3 47K_0402_5%
@
RH3 47K_0402_5%
@ 1
2
C37 1U_0402_6.3V6K
C37 1U_0402_6.3V6K
1 2
T101 @
T101 @
L2
2.2UH_LQM2MPN2R2NG0L_30%
L2
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L3
2.2UH_LQM2MPN2R2NG0L_30%
L3
2.2UH_LQM2MPN2R2NG0L_30%
1 2
C81 10U_0603_6.3V6M
C81 10U_0603_6.3V6M
1 2
C64 22U_0603_6.3V6M
C64 22U_0603_6.3V6M
1 2
C52
1U_0402_6.3V6K
C52
1U_0402_6.3V6K
1
2
T137
@ T137
@
L5
2.2UH_LQM2MPN2R2NG0L_30%
L5
2.2UH_LQM2MPN2R2NG0L_30%
1 2
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p2
13 OF 19
UC1M @
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p2
13 OF 19
UC1M @
VCCHSIO
K9
VCCHSIO
M9
VCC1_05
N8
VCC1_05
P9
RSVD
Y20
DCPSUS2
AH13
VCCAPLL
W21
DCPSUS3
J13
VCCSUS3_3
AC9
VCCSUS3_3
AA9
VCCUSB3PLL
B18
VCCSATA3PLL
B11
VCCDSW3_3
AH10
VCCSDIO
U8
VCCSDIO
T9
VCC3_3
K14
VCC3_3
K16
VCCASW
AG13
VCCASW
AG14
VCCSPI
Y8
DCPRTC
AE7
VCCRTC
AG10
VCCSUS3_3
AH11
VCCCLK
J18
VCCACLKPLL
A20 VCCCLK
K19
VCCCLK
J17
RSVD
M20
VCCCLK
T21 VCCCLK
R21
VCCSUS3_3
AE20
VCCSUS3_3
AE21
VCCAPLL
AA21
VCCASW
AG8
VCCASW
AF9
VCCASW
AE9
VCC1_05
AE8
VCC1_05
H15
VCC1_05
H11
VCC1_05
J11
VCC3_3
W9 VCC3_3
V8
DCPSUS4
AB8
RSVD
AC20
VCC1_05
AG16
VCC1_05
AG17
RSVD
V21
RSVD
K18
VCCHSIO
L10
VCC1_05
AF22
DCPSUSBYP
AG19
DCPSUSBYP
AG20
DCPSUS1
AD10
DCPSUS1
AD8
VCCTS1_5
J15
VCCHDA
AH14
T100 @
T100 @
C45 1U_0402_6.3V6K
C45 1U_0402_6.3V6K
1 2
L4
2.2UH_LQM2MPN2R2NG0L_30%
L4
2.2UH_LQM2MPN2R2NG0L_30%
1 2
G
D
S
Q10
AO3413_SOT23
@
G
D
S
Q10
AO3413_SOT23
@
2
1
3
C69
0.47U_0402_16V4Z
C69
0.47U_0402_16V4Z
1 2
T103
@ T103
@
C49 1U_0402_6.3V6K
C49 1U_0402_6.3V6K
1 2
C20
1U_0402_6.3V6K
C20
1U_0402_6.3V6K
1
2
T108
@ T108
@
C42 1U_0402_6.3V6K
C42 1U_0402_6.3V6K
1 2
CH112
0.01U_0402_25V7K
@
CH112
0.01U_0402_25V7K
@
C21
1U_0402_6.3V6K
C21
1U_0402_6.3V6K
1
2
C53 22U_0805_6.3V6M
C53 22U_0805_6.3V6M
1 2
C65 22U_0603_6.3V6M
C65 22U_0603_6.3V6M
1 2
C84 1U_0402_6.3V6K
C84 1U_0402_6.3V6K
1 2
C54 0.1U_0402_16V7K
C54 0.1U_0402_16V7K
1 2
C48 1U_0402_6.3V6K
C48 1U_0402_6.3V6K
1 2
C68 22U_0603_6.3V6M
C68 22U_0603_6.3V6M
1 2
C57
1U_0402_6.3V6K
C57
1U_0402_6.3V6K
1
2
C55 0.1U_0402_16V7K
C55 0.1U_0402_16V7K
1 2
C47 1U_0402_6.3V6K
C47 1U_0402_6.3V6K
1 2
C38
1U_0402_6.3V6K
C38
1U_0402_6.3V6K
1
2
C58 0.1U_0402_16V7K
@
C58 0.1U_0402_16V7K
@
1
2
PJ2 JUMP_43X39
@
PJ2 JUMP_43X39
@
1
1
2
2
L1
2.2UH_LQM2MPN2R2NG0L_30%
L1
2.2UH_LQM2MPN2R2NG0L_30%
1 2
C67 22U_0603_6.3V6M
C67 22U_0603_6.3V6M
1 2
T99 @
T99 @
R210
0_0805_5%
@
R210
0_0805_5%
@
1 2
C59
0.1U_0402_16V7K
@
C59
0.1U_0402_16V7K
@
1
2
CH113
0.1U_0402_10V7K
@
CH113
0.1U_0402_10V7K
@
1
2
C51
0.1U_0402_16V7K
@
C51
0.1U_0402_16V7K
@
1
2
C70
1U_0402_6.3V6K
@
C70
1U_0402_6.3V6K
@
1
2
C39
22U_0603_6.3V6M
C39
22U_0603_6.3V6M
1
2

14. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS_SENSE_R <12>
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(10/11) GND
Custom
14 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(10/11) GND
Custom
14 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(10/11) GND
Custom
14 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
HASWELL_MCP_E
Rev1p2
15 OF 19
UC1O
@
HASWELL_MCP_E
Rev1p2
15 OF 19
UC1O
@
VSS
AU28
VSS
C14
VSS
C11
VSS
AW60
VSS
AW40
VSS
AW16
VSS
AV8
VSS
AV59
VSS
AP22
VSS
AV34
VSS
D31
VSS
D30
VSS
D29
VSS
D21
VSS
D2
VSS
D18
VSS
D14
VSS
D12
VSS
C57
VSS
C39
VSS
C38
VSS
C27
VSS
C25
VSS
C20
VSS
C18
VSS
B60
VSS
B56
VSS
B52
VSS
B48
VSS
B44
VSS
B40
VSS
B4
VSS
B36
VSS
B32
VSS
B28
VSS
B26
VSS
B24
VSS
B20
VSS
AY6
VSS
AY59
VSS
AY57
VSS
AY53
VSS
AY51
VSS
AY4
VSS
AY33
VSS
AY30
VSS
AY26
VSS
AY24
VSS
AY22
VSS
AY18
VSS
AY16
VSS
AY11
VSS
AW59
VSS
AW51
VSS
AW50
VSS
AW47
VSS
AW44
VSS
AW42
VSS
AW4
VSS
AW37
VSS
AW35
VSS
AW33
VSS
AW24
VSS
AV51 VSS
AV49 VSS
AV46 VSS
AV43 VSS
AV41 VSS
AV39 VSS
AV36
VSS
AV14 VSS
AU59 VSS
AU57
VSS
AU53 VSS
AU51
VSS
AU30
VSS
AU26 VSS
AU24 VSS
AU22 VSS
AU20 VSS
AU18 VSS
AU16 VSS
AU1 VSS
AT63 VSS
AT62 VSS
AT61 VSS
AT49 VSS
AT46 VSS
AT43 VSS
AT42 VSS
AT40 VSS
AT37 VSS
AT35 VSS
AT13 VSS
AR52 VSS
AR5 VSS
AR49 VSS
AR43 VSS
AR39 VSS
AR33 VSS
AR31 VSS
AR23 VSS
AR17 VSS
AR15
VSS
AP57 VSS
AP54 VSS
AP52 VSS
AP48 VSS
AP39
VSS
AP31
VSS
AP29 VSS
AP26 VSS
AP23
VSS
AP38
VSS
AP3
VSS
AV55
VSS
D23
VSS
D25
VSS
D27
VSS
D26
VSS
AU55
VSS
AU33
VSS
AR11
VSS
AV20
VSS
AV28
VSS
AV33
VSS
AV24
VSS
AV16
HASWELL_MCP_E
Rev1p2
16 OF 19
UC1P
@
HASWELL_MCP_E
Rev1p2
16 OF 19
UC1P
@
VSS
D49
VSS
V3
VSS
V7
VSS
W20
VSS
W22
VSS_SENSE
E62
VSS
V23
VSS
AH46
VSS
V58
VSS
J10
VSS
D33
VSS
L7
VSS
H57
VSS
D41
VSS
D42
VSS
H13 VSS
G8
VSS
G5 VSS
G3
VSS
G18 VSS
F61 VSS
F58 VSS
F54
VSS
F46
VSS
F26 VSS
F20
VSS
E11 VSS
D8 VSS
D62
VSS
D57 VSS
D55 VSS
D54 VSS
D53 VSS
D51 VSS
D50 VSS
D5
VSS
D47 VSS
D46 VSS
D45 VSS
D43
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
G6
VSS
G22
VSS
F30
VSS
E17
VSS
F34
VSS
F42
VSS
AH16
VSS
F50
VSS
F38
VSS
H17
VSS
J22
VSS
J59
VSS
J63
VSS
K1
VSS
K12
VSS
L13
VSS
L15
VSS
L17
VSS
L18
VSS
L20
VSS
L58
VSS
L61
VSS
M22
VSS
N10
VSS
N3
VSS
P59
VSS
P63
VSS
R10
VSS
R8
VSS
R22
VSS
T1
VSS
T58
VSS
U20
VSS
U61
VSS
U22
VSS
U9
VSS
V10
VSS
Y10
VSS
Y59
VSS
Y63
VSS
D59
HASWELL_MCP_E
Rev1p2
14 OF 19
UC1N
@
HASWELL_MCP_E
Rev1p2
14 OF 19
UC1N
@
VSS
AH34
VSS
AH36
VSS
AJ39
VSS
AJ41
VSS
AJ35
VSS
AJ47
VSS
AJ54
VSS
AF15
VSS
AF18
VSS
AP20
VSS
AP17
VSS
AN7
VSS
AN63
VSS
AN60
VSS
AN52
VSS
AN51
VSS
AN48
VSS
AN46
VSS
AN45
VSS
AN43
VSS
AN42
VSS
AN39
VSS
AN36
VSS
AN35
VSS
AN32
VSS
AN31
VSS
AN17
VSS
AM52
VSS
AM31
VSS
AM23
VSS
AM17
VSS
AL61
VSS
AL60
VSS
AL57
VSS
AL54
VSS
AL52
VSS
AL46
VSS
AL45
VSS
AL40
VSS
AL39
VSS
AL36
VSS
AL33
VSS
AL31
VSS
AL29
VSS
AL26
VSS
AL23
VSS
AL22
VSS
AL20
VSS
AL17
VSS
AL13
VSS
AL10
VSS
AK52
VSS
AK3
VSS
AK23
VSS
AJ63
VSS
AJ60
VSS
AJ58
VSS
AJ56
VSS
AJ52
VSS
AJ50
VSS
AJ45
VSS
AJ43
VSS
AJ29 VSS
AJ27 VSS
AJ25 VSS
AJ23 VSS
AJ14 VSS
AJ13 VSS
AH57 VSS
AH55 VSS
AH53
VSS
AH42 VSS
AH40
VSS
AH32 VSS
AH30 VSS
AH28 VSS
AH24 VSS
AH22 VSS
AH20 VSS
AH19 VSS
AH17 VSS
AG63 VSS
AG62 VSS
AG61 VSS
AG60 VSS
AG23 VSS
AG21 VSS
AG11 VSS
AG1
VSS
AF17
VSS
AF14 VSS
AF12 VSS
AF11 VSS
AE58 VSS
AE5 VSS
AE10 VSS
AD63 VSS
AD3 VSS
AD21 VSS
AC61 VSS
AB7 VSS
AB22 VSS
AB20 VSS
AB10 VSS
AA58 VSS
AA1 VSS
A56 VSS
A52 VSS
A48 VSS
A44 VSS
A40 VSS
A36 VSS
A32
VSS
A24 VSS
A18 VSS
A14 VSS
A11
VSS
A28
VSS
AL51
VSS
AM1
VSS
AN23
VSS
AN40
VSS
AN49
VSS
AP10
VSS
AH38
VSS
AH51 VSS
AH49 VSS
AH44

15. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
CFG Straps for Processor
0: ENABLED; SET DFX ENABLED BIT
IN DEBUG INTERFACE MSR
1: DISABLED
CFG3
Physical Debug Enable (DFX Privacy)
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
DC_TEST_AY61_AW61
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
DC_TEST_AY62_AW62
DC_TEST_A3_B3
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_A61_B61
DC_TEST_C1_C2
DC_TEST_B62_B63
CFG_RCOMP
TD_IREF
CFG_RCOMP
OPI_COMP
TD_IREF
CFG4
CFG3
OPI_COMP
CFG0
CFG1
CFG2
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG3
CFG4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(11/11) RSVD
Custom
15 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(11/11) RSVD
Custom
15 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
HSW MCP(11/11) RSVD
Custom
15 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
T73
@ T73
@
T90 @
T90 @
HASWELL_MCP_E
Rev1p2
18 OF 19
UC1R @ HASWELL_MCP_E
Rev1p2
18 OF 19
UC1R @
RSVD
AP7
RSVD
U10
RSVD
AL1
RSVD
AM11
RSVD
AU10
RSVD
AU15
RSVD
R23
RSVD
N23
RSVD
T23
RSVD
J21 RSVD
H22 RSVD
F22
RSVD
D15 RSVD
AV44 RSVD
AU44 RSVD
AT2
RSVD
AW14
RSVD
AY14
T88
@ T88
@
T65
@ T65
@
T78
@ T78
@
T124 @
T124 @
T120 @
T120 @
R223 49.9_0402_1%
R223 49.9_0402_1%
1
2
T51 @
T51 @
T123 @
T123 @ T84
@ T84
@
T50 @
T50 @
T83
@ T83
@
T127 @
T127 @
T53 @
T53 @
T93 @
T93 @
T118 @
T118 @
T113 @
T113 @
T125 @
T125 @
T129 @
T129 @ T86
@ T86
@
T67
@ T67
@
T91 @
T91 @
R225
1K_0402_5%
R225
1K_0402_5%
1
2
T128 @
T128 @
T69
@ T69
@
T74
@ T74
@
T55 @
T55 @
T56 @
T56 @
T68
@ T68
@
T77
@ T77
@
T122 @
T122 @
T72
@ T72
@
R226 8.2K_0402_5%
R226 8.2K_0402_5%
1
2
T54 @
T54 @
T92 @
T92 @
T119 @
T119 @
T64
@ T64
@
T109 @
T109 @
T75
@ T75
@
T79
@ T79
@
T85
@ T85
@
T121 @
T121 @
T115 @
T115 @
T71
@ T71
@
T112 @
T112 @
T60
@ T60
@
T89
@ T89
@
T59
@ T59
@
T80
@ T80
@
T81
@ T81
@
T94 @
T94 @
T76
@ T76
@
T110 @
T110 @
T63
@ T63
@
R222 49.9_0402_1%
R222 49.9_0402_1%
1
2
T49 @
T49 @
HASWELL_MCP_E
Rev1p2
17 OF 19
UC1Q @ HASWELL_MCP_E
Rev1p2
17 OF 19
UC1Q @
DAISY_CHAIN_NCTF_AW62
AW62
DAISY_CHAIN_NCTF_AW63
AW63
DAISY_CHAIN_NCTF_AW61
AW61
DAISY_CHAIN_NCTF_AW3
AW3
DAISY_CHAIN_NCTF_AW2
AW2
DAISY_CHAIN_NCTF_A62
A62
DAISY_CHAIN_NCTF_AV1
AV1
DAISY_CHAIN_NCTF_AW1
AW1
DAISY_CHAIN_NCTF_A60
A60
DAISY_CHAIN_NCTF_A61
A61
DAISY_CHAIN_NCTF_A4
A4
DAISY_CHAIN_NCTF_A3
A3
DAISY_CHAIN_NCTF_C2
C2 DAISY_CHAIN_NCTF_C1
C1 DAISY_CHAIN_NCTF_B63
B63 DAISY_CHAIN_NCTF_B62
B62
DAISY_CHAIN_NCTF_B2
B2
DAISY_CHAIN_NCTF_B3
B3
DAISY_CHAIN_NCTF_B61
B61
DAISY_CHAIN_NCTF_AY61
AY61
DAISY_CHAIN_NCTF_AY62
AY62
DAISY_CHAIN_NCTF_AY3
AY3
DAISY_CHAIN_NCTF_AY60
AY60
DAISY_CHAIN_NCTF_AY2
AY2
T61
@ T61
@
T87
@ T87
@
R224
1K_0402_1%
@
R224
1K_0402_1%
@
1
2
T58
@ T58
@ T52 @
T52 @
T82
@ T82
@
RESERVED
HASWELL_MCP_E
Rev1p2
19 OF 19
UC1S @
RESERVED
HASWELL_MCP_E
Rev1p2
19 OF 19
UC1S @
CFG17
AA61 CFG18
U63
CFG7
Y60
CFG11
U60
CFG12
T63
RSVD_TP
AU63
RSVD_TP
C63
RSVD_TP
C62
RSVD_TP
L60
RSVD_TP
B51
RSVD_TP
A51
CFG10
V60 CFG9
V61 CFG8
V62
CFG6
Y61
RSVD
A5
RSVD
B43
RSVD
N60
RSVD
Y22
RSVD
W23
RSVD
D58
RSVD
AV62
RSVD_TP
AV63
VSS
N21
VSS
P22
CFG_RCOMP
V63
CFG19
U62
CFG13
T62
RSVD
R20
RSVD
P20
PROC_OPI_RCOMP
AY15
TD_IREF
B12
RSVD
E1
RSVD
D1
RSVD
J20
RSVD
H18
CFG5
Y62 CFG4
AA60 CFG3
AA63 CFG2
AC63 CFG1
AC62 CFG0
AC60
CFG16
AA62
CFG15
T60 CFG14
T61
T117 @
T117 @
T66
@ T66
@
T57 @
T57 @
T62
@ T62
@
T126 @
T126 @
T70
@ T70
@

16. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
All VREF traces should
have 10 mil trace width
Layout Note:
Place near JDIMM1.203,204
Layout Note:
Place near JDIMM1
Note: Depend on Project
Note: Depend on Project
<Address: SA1:SA0=00>
DIMM_1 REV H:4mm
Note: Depend on Project
Reverse Type
DDR3 SO-DIMM A
H=4.0mm
Channel A
Place near DDR connector for DQA easy access
SB_ODT1
SB_ODT0
SA_ODT1
SA_ODT0
M_A_B_DIMM_ODT
DDR_A_D0
DDR_A_D2
DDR_A_D6
DDR_A_D21
DDR_A_D20
DDR_A_D17
DDR_A_D16
DDR_A_D33
DDR_A_D34
DDR_A_D38
DDR_A_D62
DDR_A_D58
DDR_A_D60
DDR_A_D61
DDR_A_DQS0
DDR_A_DQS4
DDR_A_DQS#0
DDR_A_DQS#4
DDR_A_D36
DDR_A_D1
DDR_A_D13
DDR_A_D14
DDR_A_D8
DDR_A_D10
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D43
DDR_A_D47
DDR_A_D49
DDR_A_D48
DDR_A_DQS3
DDR_A_DQS5
DDR_A_DQS#3
DDR_A_DQS#5
DDR_A_D41
DDR_A_D28
DDR_A_D44
DDR_A_D50
DDR_A_D51
+V_DDR_REFA
DDRA_CS1_DIMMA#
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA12
DDR_A_MA13
DDR_A_BS0
DDR_A_BS2
DDR_A_CAS#
DDR_A_WE#
DDRA_CKE0_DIMMA
SA_CLK_DDR0
SA_CLK_DDR#0
DDR_A_D5
DDR_A_D4
DDR_A_D19
DDR_A_D22
DDR_A_D37
DDR_A_D32
DDR_A_D39
DDR_A_D63
DDR_A_D59
DDR_A_D56
DDR_A_DQS2
DDR_A_DQS7
DDR_A_DQS#2
DDR_A_DQS#7
DDR_A_D57
DDR_A_D7
DDR_A_D35
DDR_A_D3
DDR_A_D23
DDR_A_D18
+VREF_CA
DDRA_CS0_DIMMA#
SA_ODT0
SA_ODT1
SA_CLK_DDR1
SA_CLK_DDR#1
DDR_A_MA2
DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_MA7
DDR_A_MA11
DDR_A_MA14
DDR_A_BS1
DDR_A_RAS#
DDR_A_MA15
DDRA_CKE1_DIMMA
DDR_A_D9
DDR_A_D12
DDR_A_D15
DDR_A_D11
DDR_A_D40
DDR_A_D52
DDR_A_D53
DDR_A_DQS1
DDR_A_DQS6
DDR_A_DQS#1
DDR_A_DQS#6
DIMM_DRAMRST#
DDR_A_D46
DDR_A_D55
DDR_A_D24
DDR_A_D45
DDR_A_D54
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D42
DDR_PG_CTRL
<5>
DDR_VTT_PG_CTRL <43>
SB_ODT0 <17>
SB_ODT1 <17>
SA_DIMM_VREFDQ
<6>
DDR_A_BS2
<6>
DDR_A_CAS#
<6>
DDR_A_WE#
<6>
DDR_A_BS0
<6>
DDRA_CS1_DIMMA#
<6>
DDRA_CKE0_DIMMA
<6>
SA_CLK_DDR#0
<6>
SA_CLK_DDR0
<6>
PM_SMBDATA <17,37,8>
PM_SMBCLK <17,37,8>
DDR_A_D[0..63] <6>
DDR_A_DQS[0..7] <6>
DDR_A_DQS#[0..7] <6>
DDR_A_MA[0..15] <6>
DDRA_CS0_DIMMA# <6>
SA_CLK_DDR1 <6>
SA_CLK_DDR#1 <6>
DDRA_CKE1_DIMMA <6>
DIMM_DRAMRST# <17,5>
DDR_A_BS1 <6>
DDR_A_RAS# <6>
SM_DIMM_VREFCA <6>
+VREF_CA <17>
ON/OFFBTN#
<36,37>
+1.35V
+1.35V
+5VS
+3VS
+0.675VS
+0.675VS
+1.35V
+1.35V
+1.35V
+1.35V
+1.35V
+0.675VS
+1.35V
+1.35V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
DDRIII DIMMA
Custom
16 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
DDRIII DIMMA
Custom
16 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
DDRIII DIMMA
Custom
16 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
C121
1U_0402_6.3V6K
@
C121
1U_0402_6.3V6K
@
1
2
C120
0.1U_0402_16V7K
C120
0.1U_0402_16V7K
1
2
R56
1.8K_0402_1%
R56
1.8K_0402_1%
1
2
C158
0.022U_0402_25V7K
@
C158
0.022U_0402_25V7K
@
1
2
C124
1U_0402_6.3V6K
C124
1U_0402_6.3V6K
1
2
C111
10U_0603_6.3V6M
C111
10U_0603_6.3V6M
1
2
JDIMM1
LCN_DAN06-K4406-0103
@
JDIMM1
LCN_DAN06-K4406-0103
@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS
2
DQ4
4
DQ5
6
VSS
8
DQS0#
10
DQS0
12
VSS
14
DQ6
16
DQ7
18
VSS
20
DQ12
22
DQ13
24
VSS
26
DM1
28
RESET#
30
VSS
32
DQ14
34
DQ15
36
VSS
38
DQ20
40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21
42
VSS
44
DM2
46
VSS
48
DQ22
50
DQ23
52
VSS
54
DQ28
56
DQ29
58
VSS
60
DQS3#
62
DQS3
64
VSS
66
DQ30
68
DQ31
70
VSS
72
CKE1
74
VDD
76
A15
78
A14
80
VDD
82
A11
84
A7
86
VDD
88
A6
90
A4
92
VDD
94
A2
96
A0
98
VDD
100
CK1
102
CK1#
104
VDD
106
BA1
108
RAS#
110
VDD
112
S0#
114
ODT0
116
VDD
118
ODT1
120
NC
122
VDD
124
VREF_CA
126
VSS
128
DQ36
130
DQ37
132
VSS
134
DM4
136
VSS
138
DQ38
140
DQ39
142
VSS
144
DQ44
146
DQ45
148
VSS
150
DQS5#
152
DQS5
154
VSS
156
DQ46
158
DQ47
160
VSS
162
DQ52
164
DQ53
166
VSS
168
DM6
170
VSS
172
DQ54
174
DQ55
176
VSS
178
DQ60
180
DQ61
182
VSS
184
DQS7#
186
DQS7
188
VSS
190
DQ62
192
DQ63
194
VSS
196
EVENT#
198
SDA
200
SA1
201
VTT
203
GND1
205
SCL
202
VTT
204
GND2
206
BOSS1
207
BOSS2
208
R188
66.5_0402_1%
R188
66.5_0402_1%
1 2
C117
10U_0603_6.3V6M
@
C117
10U_0603_6.3V6M
@
1
2
C109
1U_0402_6.3V6K
@
C109
1U_0402_6.3V6K
@
1
2
R296
2_0402_1%
R296
2_0402_1%
1 2
C110
1U_0402_6.3V6K
C110
1U_0402_6.3V6K
1
2
R176
24.9_0402_1%
@
R176
24.9_0402_1%
@
1
2
R8 0_0805_5%
@
R8 0_0805_5%
@
1 2
R211
0_0402_5%
Rshort@
R211
0_0402_5%
Rshort@
1
2
C108
1U_0402_6.3V6K
C108
1U_0402_6.3V6K
1
2
C112
10U_0603_6.3V6M
C112
10U_0603_6.3V6M
1
2
R212
0_0402_5%
Rshort@
R212
0_0402_5%
Rshort@
1
2
R190
66.5_0402_1%
R190
66.5_0402_1%
1 2
R54
1.8K_0402_1%
R54
1.8K_0402_1%
1
2
C113
10U_0603_6.3V6M
C113
10U_0603_6.3V6M
1
2
R191
100K_0402_5%
R191
100K_0402_5%
1
2
C114
10U_0603_6.3V6M
C114
10U_0603_6.3V6M
1
2
C34
0.1U_0402_16V7K
@
C34
0.1U_0402_16V7K
@
1
2
R293
2_0402_1%
R293
2_0402_1%
1 2
R185
1.8K_0402_1%
R185
1.8K_0402_1%
1
2
C123
1U_0402_6.3V6K
C123
1U_0402_6.3V6K
1
2
R189
66.5_0402_1%
R189
66.5_0402_1%
1 2
R294
24.9_0402_1%
@ R294
24.9_0402_1%
@
1
2
U45
74AUP1G07GW_TSSOP5
U45
74AUP1G07GW_TSSOP5
GND
3
A
2
NC
1
VCC
5
Y
4
C162
0.022U_0402_25V7K
@
C162
0.022U_0402_25V7K
@
1
2
C107
1U_0402_6.3V6K
@
C107
1U_0402_6.3V6K
@
1
2
R187
66.5_0402_1%
R187
66.5_0402_1%
1 2
C116
10U_0603_6.3V6M
C116
10U_0603_6.3V6M
1
2
C115
10U_0603_6.3V6M
C115
10U_0603_6.3V6M
1
2
R295
1.8K_0402_1%
R295
1.8K_0402_1%
1
2
C106
0.1U_0402_16V7K
C106
0.1U_0402_16V7K
1
2
C125
0.1U_0402_16V7K
C125
0.1U_0402_16V7K
1
2
G
D
S
Q20
LBSS138LT1G_SOT-23-3
G
D
S
Q20
LBSS138LT1G_SOT-23-3
2
1
3
C122
1U_0402_6.3V6K
@
C122
1U_0402_6.3V6K
@
1
2

17. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Note: Depend on Project
Note: Depend on Project
All VREF traces should
have 10 mil trace width
Layout Note:
Place near JDIMM1.203,204
Layout Note:
Place near JDIMM1
Note: Depend on Project
Reverse Type
DDR3 SO-DIMM B
H=4.0mm
<Address: SA1:SA0=10>
Channel B
DIMM_2 REV H:4mm
+V_DDR_REFB
DDRB_CS1_DIMMB#
DDR_B_MA1
DDR_B_MA3
DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA12
DDR_B_MA13
DDR_B_BS0
DDR_B_BS2
DDR_B_CAS#
DDR_B_WE#
DDRB_CKE0_DIMMB
SB_CLK_DDR0
SB_CLK_DDR#0
+VREF_CA
DDRB_CS0_DIMMB#
SB_ODT0
SB_ODT1
SB_CLK_DDR1
SB_CLK_DDR#1
DDR_B_MA2
DDR_B_MA0
DDR_B_MA4
DDR_B_MA6
DDR_B_MA7
DDR_B_MA11
DDR_B_MA14
DDR_B_BS1
DDR_B_RAS#
DDR_B_MA15
DDRB_CKE1_DIMMB
DIMM_DRAMRST#
DDR_B_D10
DDR_B_D11
DDR_B_D14
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D46
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D8
DDR_B_DQS#3
DDR_B_DQS#5
DDR_B_DQS3
DDR_B_DQS5
DDR_B_D1
DDR_B_D23
DDR_B_D22
DDR_B_D21
DDR_B_D20
DDR_B_D3
DDR_B_D33
DDR_B_D36
DDR_B_D35
DDR_B_D4
DDR_B_D39
DDR_B_D49
DDR_B_D48
DDR_B_D52
DDR_B_D53
DDR_B_DQS#0
DDR_B_D7
DDR_B_DQS#4
DDR_B_DQS0
DDR_B_DQS4
DDR_B_D0
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D2
DDR_B_D32
DDR_B_D34
DDR_B_D37
DDR_B_D38
DDR_B_D5
DDR_B_D50
DDR_B_D51
DDR_B_D54
DDR_B_D55
DDR_B_D6
DDR_B_DQS#2
DDR_B_DQS#6
DDR_B_DQS2
DDR_B_DQS6
DDR_B_D30
DDR_B_D31
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D47
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D12
DDR_B_D15
DDR_B_D13
DDR_B_D25
DDR_B_D24
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
SB_DIMM_VREFDQ
<6>
DDR_B_BS2
<6>
DDR_B_CAS#
<6>
DDR_B_WE#
<6>
DDR_B_BS0
<6>
DDRB_CS1_DIMMB#
<6>
DDRB_CKE0_DIMMB
<6>
SB_CLK_DDR#0
<6>
SB_CLK_DDR0
<6>
PM_SMBDATA <16,37,8>
PM_SMBCLK <16,37,8>
DDRB_CS0_DIMMB# <6>
SB_ODT0 <16>
SB_ODT1 <16>
SB_CLK_DDR1 <6>
SB_CLK_DDR#1 <6>
DDRB_CKE1_DIMMB <6>
DIMM_DRAMRST# <16,5>
DDR_B_BS1 <6>
DDR_B_RAS# <6>
DDR_B_D[0..63] <6>
DDR_B_DQS[0..7] <6>
DDR_B_DQS#[0..7] <6>
DDR_B_MA[0..15] <6>
+VREF_CA <16>
+3VS
+0.675VS
+0.675VS
+1.35V
+1.35V
+1.35V
+1.35V
+1.35V
+3VS
+0.675VS
+1.35V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
DDRIII DIMMB
Custom
17 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
DDRIII DIMMB
Custom
17 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P 1.0
DDRIII DIMMB
Custom
17 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
R229
10K_0402_5%
R229
10K_0402_5%
1
2
R213
1.8K_0402_1%
R213
1.8K_0402_1%
1
2
R231
0_0402_5%
Rshort@
R231
0_0402_5%
Rshort@
1
2
C131
1U_0402_6.3V6K
@
C131
1U_0402_6.3V6K
@
1
2
R57
1.8K_0402_1%
R57
1.8K_0402_1%
1
2
C137
10U_0603_6.3V6M
C137
10U_0603_6.3V6M
1
2
C143
1U_0402_6.3V6K
C143
1U_0402_6.3V6K
1
2
C147
0.1U_0402_16V7K
C147
0.1U_0402_16V7K
1
2
C145
1U_0402_6.3V6K
C145
1U_0402_6.3V6K
1
2
C159
0.022U_0402_25V7K
@
C159
0.022U_0402_25V7K
@
1
2
C136
10U_0603_6.3V6M
C136
10U_0603_6.3V6M
1
2
C135
10U_0603_6.3V6M
C135
10U_0603_6.3V6M
1
2
C146
1U_0402_6.3V6K
@
C146
1U_0402_6.3V6K
@
1
2
R297
2_0402_1%
R297
2_0402_1%
1 2
C133
10U_0603_6.3V6M
C133
10U_0603_6.3V6M
1
2
C128
0.1U_0402_16V7K
C128
0.1U_0402_16V7K
1
2
C144
1U_0402_6.3V6K
@
C144
1U_0402_6.3V6K
@
1
2
C134
10U_0603_6.3V6M
C134
10U_0603_6.3V6M
1
2
R179
24.9_0402_1%
@
R179
24.9_0402_1%
@
1
2
C132
1U_0402_6.3V6K
C132
1U_0402_6.3V6K
1
2
C138
10U_0603_6.3V6M
C138
10U_0603_6.3V6M
1
2
C129
1U_0402_6.3V6K
@
C129
1U_0402_6.3V6K
@
1
2
C130
1U_0402_6.3V6K
C130
1U_0402_6.3V6K
1
2
C142
0.1U_0402_16V7K
C142
0.1U_0402_16V7K
1
2
C139
10U_0603_6.3V6M
@
C139
10U_0603_6.3V6M
@
1
2
JDIMM2
LCN_DAN06-K4406-0103
@
JDIMM2
LCN_DAN06-K4406-0103
@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS
2
DQ4
4
DQ5
6
VSS
8
DQS0#
10
DQS0
12
VSS
14
DQ6
16
DQ7
18
VSS
20
DQ12
22
DQ13
24
VSS
26
DM1
28
RESET#
30
VSS
32
DQ14
34
DQ15
36
VSS
38
DQ20
40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21
42
VSS
44
DM2
46
VSS
48
DQ22
50
DQ23
52
VSS
54
DQ28
56
DQ29
58
VSS
60
DQS3#
62
DQS3
64
VSS
66
DQ30
68
DQ31
70
VSS
72
CKE1
74
VDD
76
A15
78
A14
80
VDD
82
A11
84
A7
86
VDD
88
A6
90
A4
92
VDD
94
A2
96
A0
98
VDD
100
CK1
102
CK1#
104
VDD
106
BA1
108
RAS#
110
VDD
112
S0#
114
ODT0
116
VDD
118
ODT1
120
NC
122
VDD
124
VREF_CA
126
VSS
128
DQ36
130
DQ37
132
VSS
134
DM4
136
VSS
138
DQ38
140
DQ39
142
VSS
144
DQ44
146
DQ45
148
VSS
150
DQS5#
152
DQS5
154
VSS
156
DQ46
158
DQ47
160
VSS
162
DQ52
164
DQ53
166
VSS
168
DM6
170
VSS
172
DQ54
174
DQ55
176
VSS
178
DQ60
180
DQ61
182
VSS
184
DQS7#
186
DQS7
188
VSS
190
DQ62
192
DQ63
194
VSS
196
EVENT#
198
SDA
200
SA1
201
VTT
203
GND1
205
SCL
202
VTT
204
GND2
206
BOSS1
207
BOSS2
208

18. 1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
LVDS Interface
AC Coupling Capacitor
PCIe Gen3: Recommended value is 220 nF
PCIe Gen1 and Gen2 only: Recommended value is 100 nF
Topaz
For CRB reserved
CLK_PCIE_VGA
CLK_PCIE_VGA#
VGA_PCIE_CALRN
VGA_PCIE_CALRP
PLTRST_VGA#
PLTRST_VGA#
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
DGPU_PWROK_R
PLT_RST#
CLK_PCIE_VGA
<8>
CLK_PCIE_VGA#
<8>
PCIE_CTX_C_GRX_P0
<11>
PCIE_CTX_C_GRX_N0
<11>
PCIE_CTX_C_GRX_N1
<11>
PCIE_CTX_C_GRX_P1
<11>
PCIE_CTX_C_GRX_P2
<11>
PCIE_CTX_C_GRX_N2
<11>
PCIE_CTX_C_GRX_N3
<11>
PCIE_CTX_C_GRX_P3
<11>
PCIE_GTX_C_CRX_N0 <11>
PCIE_GTX_C_CRX_P0 <11>
PCIE_GTX_C_CRX_P1 <11>
PCIE_GTX_C_CRX_N1 <11>
PCIE_GTX_C_CRX_N2 <11>
PCIE_GTX_C_CRX_P2 <11>
PCIE_GTX_C_CRX_P3 <11>
PCIE_GTX_C_CRX_N3 <11>
DGPU_HOLD_RST#
<10,9>
PLT_RST#
<36,9>
DGPU_PWRGD
<48,9>
DGPU_PWROK <48>
+0.95VGS
+3VGS
+VGA_CORE
+3VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P
1.0
PCIE/LVDS
Custom
18 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P
1.0
PCIE/LVDS
Custom
18 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ZSWAA/ZCWAA LA-B301P
1.0
PCIE/LVDS
Custom
18 52
Monday, February 10, 2014
2013/09/25 2016/09/25
Compal Electronics, Inc.
RV167
0_0402_5%
@
RV167
0_0402_5%
@
1 2
TMDP
UV1F
2160856030-A0_FCBGA631
@
TMDP
UV1F
2160856030-A0_FCBGA631
@
DIGON
AB12
TXCAM_DPA3N
AK14
TXCAP_DPA3P
AL15
TXCBM_DPB3N
AJ19
TXCBP_DPB3P
AH20
TX0M_DPA2N
AJ15
TX0P_DPA2P
AH16
TX1M_DPA1N
AK16
TX1P_DPA1P
AL17
TX2M_DPA0N
AJ17
TX2P_DPA0P
AH18
NC_TXOUT_L3N
AK18
NC_TXOUT_L3P
AL19
TX3M_DPB2N
AK20
TX3P_DPB2P
AL21
TX4M_DPB1N
AJ21
TX4P_DPB1P
AH22
TX5M_DPB0N
AK22
TX5P_DPB0P
AL23
NC_TXOUT_U3N
AJ23
NC_TXOUT_U3P
AK24
VARY_BL
AB11
RV3 1K_0402_1%
VGA@
RV3 1K_0402_1%
VGA@
1 2
CV4
.1U_0402_16V7K VGA@ CV4
.1U_0402_16V7K VGA@
1
2
RV1 1.69K_0402_1%
VGA@
RV1 1.69K_0402_1%
VGA@
1 2
CV1
.1U_0402_16V7K VGA@ CV1
.1U_0402_16V7K VGA@
1
2
UV11
MC74VHC1G08DFT2G_SC70-5
@
UV11
MC74VHC1G08DFT2G_SC70-5
@
IN1
1
IN2
2
GND
3
OUT
4
VCC
5
CV6
.1U_0402_16V7K VGA@ CV6
.1U_0402_16V7K VGA@
1
2
RV52
VGA@
100K_0402_5%
RV52
VGA@
100K_0402_5%
1
2
CV8
.1U_0402_16V7K VGA@ CV8
.1U_0402_16V7K VGA@
1
2
UV8
MC74VHC1G08DFT2G_SC70-5
VGA@
UV8
MC74VHC1G08DFT2G_SC70-5
VGA@
IN1
1
IN2
2
GND
3
OUT
4
VCC
5
PCI
EXPRESS
INTERFACE
CLOCK
CALIBRATION
UV1A
@ 2160856030-A0_FCBGA631
PCI
EXPRESS
INTERFACE
CLOCK
CALIBRATION
UV1A
@ 2160856030-A0_FCBGA631
TEST_PG
N10
PCIE_CALR_RX
AA22
PCIE_CALR_TX
Y22
PCIE_REFCLKN
AK32 PCIE_REFCLKP
AK30
PCIE_RX0N
AE31 PCIE_RX0P
AF30
NC#R31
R31 NC#T30
T30
NC#P28
P28 NC#R29
R29
NC#N31
N31 NC#P30
P30
NC#M28
M28 NC#N29
N29
NC#L31
L31 NC#M30
M30
NC#K30
K30 NC#L29
L29
PCIE_RX1N
AD28 PCIE_RX1P
AE29
PCIE_RX2N
AC31 PCIE_RX2P
AD30
PCIE_RX3N
AB28 PCIE_RX3P
AC29
PCIE_RX4N
AA31 PCIE_RX4P
AB30
PCIE_RX5N
Y28 PCIE_RX5P
AA29
PCIE_RX6N
W31 PCIE_RX6P
Y30
PCIE_RX7N
V28 PCIE_RX7P
W29
NC#U31
U31 NC#V30
V30
NC#T28
T28 NC#U29
U29
PERSTB
AL27
PCIE_TX0N
AG31
PCIE_TX0P
AH30
NC#U23
U23
NC#U24
U24
NC#T27
T27
NC#T26
T26
NC#T23
T23
NC#T24
T24
NC#P26
P26
NC#P27
P27
NC#P23
P23
NC#P24
P24
NC#N26
N26
NC#M27
M27
PCIE_TX1N
AF28
PCIE_TX1P
AG29
PCIE_TX2N
AF26
PCIE_TX2P
AF27
PCIE_TX3N
AD26
PCIE_TX3P
AD27
PCIE_TX4N
AB25
PCIE_TX4P
AC25
PCIE_TX5N
Y24
PCIE_TX5P
Y23
PCIE_TX6N
AB26
PCIE_TX6P
AB27
PCIE_TX7N
Y26
PCIE_TX7P
Y27
NC#W23
W23
NC#W24
W24
NC#U26
U26
NC#V27
V27
RV2 1K_0402_5%
VGA@
RV2 1K_0402_5%
VGA@
1 2
CV3
.1U_0402_16V7K VGA@ CV3
.1U_0402_16V7K VGA@
1
2
RV56
@
100K_0402_5%
RV56
@
100K_0402_5%
1
2
CV7
.1U_0402_16V7K VGA@ CV7
.1U_0402_16V7K VGA@
1
2
CV5
.1U_0402_16V7K VGA@ CV5
.1U_0402_16V7K VGA@
1
2
CV2
.1U_0402_16V7K VGA@ CV2
.1U_0402_16V7K VGA@
1
2