This project is designed for electronic voting machine by using the fingerprint identification method.
Here voters thumb impressions are used for identifying the voters.
During voting when the voter keeps his/her thumb in the scanner, the system will check whether it matches with pre stored impressions in the database.
If it matches then system will allow the voter to poll his vote and otherwise prevent the voter from polling.
ADVANTAGES
The main advantages of the systems are,
Providing the preventive measures system for voting.
It completely rules out the chance of invalid votes.
Its use results in reduction of polling time.
Results in fewer problems in electoral preparations, law and order candidates' expenditure.
Provide easy and accurate counting without any mischief at the counting centre.
It is capable of saving considerable printing stationery and transport of large volumes of electoral material.
FUTURE SCOPE OF THE PROJECT
This system can be used for elections since it provide complete security and will provide accurate results and save time and expenditure.
This can be modify by interfacing it with a PC through a serial port in order to provide additional security.
we try to give a biometric secure e voting system and with back end compilations supported by DNA archieves which hav d feature of parallel processing as their inherent nature ...
This project is designed for electronic voting machine by using the fingerprint identification method.
Here voters thumb impressions are used for identifying the voters.
During voting when the voter keeps his/her thumb in the scanner, the system will check whether it matches with pre stored impressions in the database.
If it matches then system will allow the voter to poll his vote and otherwise prevent the voter from polling.
ADVANTAGES
The main advantages of the systems are,
Providing the preventive measures system for voting.
It completely rules out the chance of invalid votes.
Its use results in reduction of polling time.
Results in fewer problems in electoral preparations, law and order candidates' expenditure.
Provide easy and accurate counting without any mischief at the counting centre.
It is capable of saving considerable printing stationery and transport of large volumes of electoral material.
FUTURE SCOPE OF THE PROJECT
This system can be used for elections since it provide complete security and will provide accurate results and save time and expenditure.
This can be modify by interfacing it with a PC through a serial port in order to provide additional security.
we try to give a biometric secure e voting system and with back end compilations supported by DNA archieves which hav d feature of parallel processing as their inherent nature ...
Here are my slides for my preparation class for possible Master students in Electrical Engineering and Computer Science (Specialization in Computer Science)... for the entrance examination here at Cinvestav GDL
One of the fewest Evolutionary algorithms with proof about the Expected number of parents for a certain Schema. The slides have been updated with a better proof, however, the proof still have some problems... I seriously believe that we need a topology stochastic process to really understand what is going on in Genetic Algorithms. This quite tough because of mixing of topology and probability to define a realistic model of populations in Genetic Algorithms.
Here are my slides for my preparation class for possible Master students in Electrical Engineering and Computer Science (Specialization in Computer Science)... for the entrance examination here at Cinvestav GDL
One of the fewest Evolutionary algorithms with proof about the Expected number of parents for a certain Schema. The slides have been updated with a better proof, however, the proof still have some problems... I seriously believe that we need a topology stochastic process to really understand what is going on in Genetic Algorithms. This quite tough because of mixing of topology and probability to define a realistic model of populations in Genetic Algorithms.
Computer Organisation and Architecture (COA) UNIT 3
Computer Organisation and Architecture (COA) UNIT 3
Computer Organisation and Architecture (COA) UNIT 3Computer Organisation and Architecture (COA) UNIT 3Computer Organisation and Architecture (COA) UNIT 3Computer Organisation and Architecture (COA) UNIT 3Computer Organisation and Architecture (COA) UNIT 3
Computer Organisation and Architecture (COA) UNIT 3Computer Organisation and Architecture (COA) UNIT 3
Computer Organisation and Architecture (COA) UNIT 3
Computer Organisation and Architecture (COA) UNIT 3
Computer Organisation and Architecture (COA) UNIT 3Computer Organisation and Architecture (COA) UNIT 3
Low power architecture of logic gates using adiabatic techniquesnooriasukmaningtyas
The growing significance of portable systems to limit power consumption in ultra-large-scale-integration chips of very high density, has recently led to rapid and inventive progresses in low-power design. The most effective technique is adiabatic logic circuit design in energy-efficient hardware. This paper presents two adiabatic approaches for the design of low power circuits, modified positive feedback adiabatic logic (modified PFAL) and the other is direct current diode based positive feedback adiabatic logic (DC-DB PFAL). Logic gates are the preliminary components in any digital circuit design. By improving the performance of basic gates, one can improvise the whole system performance. In this paper proposed circuit design of the low power architecture of OR/NOR, AND/NAND, and XOR/XNOR gates are presented using the said approaches and their results are analyzed for powerdissipation, delay, power-delay-product and rise time and compared with the other adiabatic techniques along with the conventional complementary metal oxide semiconductor (CMOS) designs reported in the literature. It has been found that the designs with DC-DB PFAL technique outperform with the percentage improvement of 65% for NOR gate and 7% for NAND gate and 34% for XNOR gate over the modified PFAL techniques at 10 MHz respectively.
6th International Conference on Machine Learning & Applications (CMLA 2024)ClaraZara1
6th International Conference on Machine Learning & Applications (CMLA 2024) will provide an excellent international forum for sharing knowledge and results in theory, methodology and applications of on Machine Learning & Applications.
Harnessing WebAssembly for Real-time Stateless Streaming PipelinesChristina Lin
Traditionally, dealing with real-time data pipelines has involved significant overhead, even for straightforward tasks like data transformation or masking. However, in this talk, we’ll venture into the dynamic realm of WebAssembly (WASM) and discover how it can revolutionize the creation of stateless streaming pipelines within a Kafka (Redpanda) broker. These pipelines are adept at managing low-latency, high-data-volume scenarios.
2. DDaattaa RReepprreesseennttaattiioonn
HHooww ddoo ccoommppuutteerrss rreepprreesseenntt ddaattaa??
Most computers are digital
• Recognize only two discrete states:
on or off
• Computers are electronic devices
powered by electricity, which has only
two states, on or off
1 1 1 1 1
0 0 0 0 0
on
off
3. DDaattaa RReepprreesseennttaattiioonn
WWhhaatt iiss tthhee bbiinnaarryy ssyysstteemm??
A number system that has just two unique digits, 0 and 1
• A single digit is called a bit (binary digit)
• A bit is the smallest unit of data the computer can represent
• By itself a bit is not very informative
The two digits represent the two off and on states
Binary
Digit (bit)
Electronic
Charge
Electronic
State
4. DDaattaa RReepprreesseennttaattiioonn
WWhhaatt iiss aa bbyyttee??
Eight bits are grouped together to form a byte
0s and 1s in each byte are used to represent
individual characters such as letters of the
alphabet, numbers, and punctuation
8-bit byte for the number 3
8-bit byte for the number 5
8-bit byte for the capital letter T
5. DDaattaa RReepprreesseennttaattiioonn
WWhhaatt aarree ttwwoo ppooppuullaarr ccooddiinngg ssyysstteemmss ttoo
rreepprreesseenntt ddaattaa??
American Standard
Code for Information
Interchange (ASCII)
Extended Binary
Coded Decimal
Interchange Code
(EBCDIC)
• Sufficient for
English and
Western European
languages
• Unicode often
used for others
6. DDaattaa RReepprreesseennttaattiioonn
HHooww iiss aa cchhaarraacctteerr sseenntt ffrroomm tthhee kkeeyybbooaarrdd ttoo
tthhee ccoommppuutteerr??
Step 1:
The user presses the letter T key
on the keyboard
Step 2:
An electronic signal for the letter
T is sent to the system unit
Step 3:
The signal for the letter T is
converted to its ASCII binary
code (01010100) and is stored in
memory for processing
Step 4:
After processing, the binary code
for the letter T is converted to an
image on the output device
7. DDaattaa RReepprreesseennttaattiioonn
HHooww iiss aa cchhaarraacctteerr sseenntt ffrroomm tthhee kkeeyybbooaarrdd ttoo
tthhee ccoommppuutteerr??
Step 1:
The user presses the letter T key
on the keyboard
Step 2:
An electronic signal for the letter
T is sent to the system unit
Step 3:
The signal for the letter T is
converted to its ASCII binary
code (01010100) and is stored in
memory for processing
Step 4:
After processing, the binary code
for the letter T is converted to an
image on the output device
