2. TEXTBOOK:
• 1. Computer System Architecture – M. Moris Mano,
Third Edition, Pearson/PHI.
REFERENCES:
• Computer Organization – Car Hamacher, Zvonks
Vranesic, Safea Zaky, Vth Edition, McGraw Hill.
• Computer Organization and Architecture – William
Stallings Sixth Edition, Pearson/PHI.
• Structured Computer Organization – Andrew S.
Tanenbaum, 4th Edition, PHI/Pearson.
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3. Unit III
Data Representation: Data types
,Complements, fixed point Representations,
Floating point representation.
Computer Arithmetic: Addition and
subtraction, multiplication Algorithms, Division
Algorithms, Floating-point Arithmetic
operations, Decimal Arithmetic unit, Decimal
Arithmetic operations.
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4. Topics covered in session 23
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• Addition and subtraction
• Multiplication Algorithms
• Division Algorithms
• Floating-point Arithmetic operations
• Decimal Arithmetic unit
• Decimal Arithmetic operations.
5. Decimal Arithmetic unit
• A CPU with an arithmetic logic unit can perform
arithmetic microoperations with binary data.
• A decimal arithmetic unit is a digital function that
performs decimal microoperations.
• It can add or subtract decimal numbers, usually by
forming the 9’s or 10’s complements of the
subtrahend.
• The unit accepts coded decimal numbers and
generates results in the same adopted binary code.
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Department of CSE (AI/ML)
8. BCD Subtraction
• Subtraction is carried out by adding the ten’s complement
negative of the subtrahend to the minuend.
• Ten’s complement negative of subtrahend is obtained by
adding 1 to the nine’s complement negative of the subtrahend.
• In ten’s complement the number is positive if the left
most digit is between 0 and 4 and negative otherwise.
• The BCD of 4 and 5 are 0100 and 0101 both have 0 in
leftmost, 4 indicate positive number and 5 indicate
negative number.
• In an excess 3 encoding for each digit the left most bit
will indicate the sign
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9. Decimal Arithmetic operations
• Decimal Arithmetic Unit is a digital function that performs
decimal microoperations.
• can add or subtract decimal numbers, usually by forming
the 9's or 10's complement of the subtrahend.
• The unit accepts coded decimal numbers and generate
• A single-stage decimal arithmetic unit consists of:
– nine binary input variables
– five binary output variables ( since a minimum of four
bits is required to represent each coded decimal digit)
• Each stage must have four inputs for the augends digit, four
inputs for the addend digit, and an input-carry. s results in
the same adopted binary code.
• The outputs include four terminals for the sum digit and one
for the output-carry.
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Department of CSE (AI/ML)