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CS304PC:Computer
Organization and Architecture
(R18 II(I sem))
Department of computer science and
engineering (AI/ML)
Session 23
by
Asst.Prof.M.Gokilavani
VITS
2/18/2023 Department of CSE (AI/ML) 1
TEXTBOOK:
• 1. Computer System Architecture – M. Moris Mano,
Third Edition, Pearson/PHI.
REFERENCES:
• Computer Organization – Car Hamacher, Zvonks
Vranesic, Safea Zaky, Vth Edition, McGraw Hill.
• Computer Organization and Architecture – William
Stallings Sixth Edition, Pearson/PHI.
• Structured Computer Organization – Andrew S.
Tanenbaum, 4th Edition, PHI/Pearson.
2/18/2023 Department of CSE (AI/ML) 2
Unit III
Data Representation: Data types
,Complements, fixed point Representations,
Floating point representation.
Computer Arithmetic: Addition and
subtraction, multiplication Algorithms, Division
Algorithms, Floating-point Arithmetic
operations, Decimal Arithmetic unit, Decimal
Arithmetic operations.
2/18/2023 Department of CSE (AI/ML) 3
Topics covered in session 23
2/18/2023 Department of CSE (AI/ML) 4
• Addition and subtraction
• Multiplication Algorithms
• Division Algorithms
• Floating-point Arithmetic operations
• Decimal Arithmetic unit
• Decimal Arithmetic operations.
Decimal Arithmetic unit
• A CPU with an arithmetic logic unit can perform
arithmetic microoperations with binary data.
• A decimal arithmetic unit is a digital function that
performs decimal microoperations.
• It can add or subtract decimal numbers, usually by
forming the 9’s or 10’s complements of the
subtrahend.
• The unit accepts coded decimal numbers and
generates results in the same adopted binary code.
2/18/2023 5
Department of CSE (AI/ML)
2/18/2023 Department of CSE (AI/ML) 6
2/18/2023 Department of CSE (AI/ML) 7
BCD Subtraction
• Subtraction is carried out by adding the ten’s complement
negative of the subtrahend to the minuend.
• Ten’s complement negative of subtrahend is obtained by
adding 1 to the nine’s complement negative of the subtrahend.
• In ten’s complement the number is positive if the left
most digit is between 0 and 4 and negative otherwise.
• The BCD of 4 and 5 are 0100 and 0101 both have 0 in
leftmost, 4 indicate positive number and 5 indicate
negative number.
• In an excess 3 encoding for each digit the left most bit
will indicate the sign
2/18/2023 Department of CSE (AI/ML) 8
Decimal Arithmetic operations
• Decimal Arithmetic Unit is a digital function that performs
decimal microoperations.
• can add or subtract decimal numbers, usually by forming
the 9's or 10's complement of the subtrahend.
• The unit accepts coded decimal numbers and generate
• A single-stage decimal arithmetic unit consists of:
– nine binary input variables
– five binary output variables ( since a minimum of four
bits is required to represent each coded decimal digit)
• Each stage must have four inputs for the augends digit, four
inputs for the addend digit, and an input-carry. s results in
the same adopted binary code.
• The outputs include four terminals for the sum digit and one
for the output-carry.
2/18/2023 9
Department of CSE (AI/ML)
2/18/2023 Department of CSE (AI/ML) 10
2/18/2023 Department of CSE (AI/ML) 11
Addition and Subtraction
• Addition
– Parallel decimal adder
– Digit-serial. Bit-parallel decimal addition
– All serial decimal addition
2/18/2023 12
Department of CSE (AI/ML)
2/18/2023 Department of CSE (AI/ML) 13
2/18/2023 Department of CSE (AI/ML) 14
Multiplication
2/18/2023 Department of CSE (AI/ML) 15
2/18/2023 Department of CSE (AI/ML) 16
Division
•Ae-to accommodate
overflow(adding the
multiplicand to the
partial product)
•Be-to form the 9’s
complement of the
divisor when
subtracted from the
partial remainder.
2/18/2023 Department of CSE (AI/ML) 17
Topics to be covered in next session 24
• Input Output Interface
2/18/2023 Department of CSE (AI/ML) 18
Thank you!!!

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CS304PC Computer Organization and Architecture Session 23

  • 1. CS304PC:Computer Organization and Architecture (R18 II(I sem)) Department of computer science and engineering (AI/ML) Session 23 by Asst.Prof.M.Gokilavani VITS 2/18/2023 Department of CSE (AI/ML) 1
  • 2. TEXTBOOK: • 1. Computer System Architecture – M. Moris Mano, Third Edition, Pearson/PHI. REFERENCES: • Computer Organization – Car Hamacher, Zvonks Vranesic, Safea Zaky, Vth Edition, McGraw Hill. • Computer Organization and Architecture – William Stallings Sixth Edition, Pearson/PHI. • Structured Computer Organization – Andrew S. Tanenbaum, 4th Edition, PHI/Pearson. 2/18/2023 Department of CSE (AI/ML) 2
  • 3. Unit III Data Representation: Data types ,Complements, fixed point Representations, Floating point representation. Computer Arithmetic: Addition and subtraction, multiplication Algorithms, Division Algorithms, Floating-point Arithmetic operations, Decimal Arithmetic unit, Decimal Arithmetic operations. 2/18/2023 Department of CSE (AI/ML) 3
  • 4. Topics covered in session 23 2/18/2023 Department of CSE (AI/ML) 4 • Addition and subtraction • Multiplication Algorithms • Division Algorithms • Floating-point Arithmetic operations • Decimal Arithmetic unit • Decimal Arithmetic operations.
  • 5. Decimal Arithmetic unit • A CPU with an arithmetic logic unit can perform arithmetic microoperations with binary data. • A decimal arithmetic unit is a digital function that performs decimal microoperations. • It can add or subtract decimal numbers, usually by forming the 9’s or 10’s complements of the subtrahend. • The unit accepts coded decimal numbers and generates results in the same adopted binary code. 2/18/2023 5 Department of CSE (AI/ML)
  • 6. 2/18/2023 Department of CSE (AI/ML) 6
  • 7. 2/18/2023 Department of CSE (AI/ML) 7
  • 8. BCD Subtraction • Subtraction is carried out by adding the ten’s complement negative of the subtrahend to the minuend. • Ten’s complement negative of subtrahend is obtained by adding 1 to the nine’s complement negative of the subtrahend. • In ten’s complement the number is positive if the left most digit is between 0 and 4 and negative otherwise. • The BCD of 4 and 5 are 0100 and 0101 both have 0 in leftmost, 4 indicate positive number and 5 indicate negative number. • In an excess 3 encoding for each digit the left most bit will indicate the sign 2/18/2023 Department of CSE (AI/ML) 8
  • 9. Decimal Arithmetic operations • Decimal Arithmetic Unit is a digital function that performs decimal microoperations. • can add or subtract decimal numbers, usually by forming the 9's or 10's complement of the subtrahend. • The unit accepts coded decimal numbers and generate • A single-stage decimal arithmetic unit consists of: – nine binary input variables – five binary output variables ( since a minimum of four bits is required to represent each coded decimal digit) • Each stage must have four inputs for the augends digit, four inputs for the addend digit, and an input-carry. s results in the same adopted binary code. • The outputs include four terminals for the sum digit and one for the output-carry. 2/18/2023 9 Department of CSE (AI/ML)
  • 10. 2/18/2023 Department of CSE (AI/ML) 10
  • 11. 2/18/2023 Department of CSE (AI/ML) 11
  • 12. Addition and Subtraction • Addition – Parallel decimal adder – Digit-serial. Bit-parallel decimal addition – All serial decimal addition 2/18/2023 12 Department of CSE (AI/ML)
  • 13. 2/18/2023 Department of CSE (AI/ML) 13
  • 14. 2/18/2023 Department of CSE (AI/ML) 14
  • 16. 2/18/2023 Department of CSE (AI/ML) 16
  • 17. Division •Ae-to accommodate overflow(adding the multiplicand to the partial product) •Be-to form the 9’s complement of the divisor when subtracted from the partial remainder. 2/18/2023 Department of CSE (AI/ML) 17
  • 18. Topics to be covered in next session 24 • Input Output Interface 2/18/2023 Department of CSE (AI/ML) 18 Thank you!!!