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A Self-Oscillating LNA-Mixer
                                         Tero Koivisto                                                      Esa Tiiliharju
                                    University of Turku                                                  University of Turku
                                Microelectronics Laboratory                                           Microelectronics Laboratory
                         Turku Center for Computer Science, TUCS                                            Turku, Finland
                                      Turku, Finland
                                   Email: tejuko@utu.fi



                                                                                                Vdd                                      Vdd
   Abstract—In this paper, a new circuit topology to realize a stacked self-
oscillating LNA-Mixer is proposed. The basic idea has been to recognize
that in a high-performance down-conversion mixer its RF input-stage
gain, linearity, and noise tradeoff is often improved by feeding it with
                                                                                lo1             lo2                   lo1   lo1          lo2               lo1
a bypass current source. This current source could be isolated with an
inductor so as to allow free implementation of the oscillator block on
top of it. Using these guidelines, the presented circuit achieves high-          rf1                            rf2          rf1                         rf2
performance without sacrificing compatibility with modern low-voltage
                                                                                                a)                                        b)
CMOS implementations. To further demonstrate usefulness of the circuit,
an entire single-stage quadrature (IQ) RF front-end using this circuit as                       Vdd                                      Vdd
a core has been developed. The IQ front-end, targeted for the Galileo
satellite navigation system, has been designed using a 65-nm CMOS                                                                               VCO
technology, and it achieves NF=4.4 dB, IIP3=-15 dBm and Av =25 dB at
1.575 GHz, while using only 1 mA from the low 1.2-V supply.
                                                                                lo1             lo2                   lo1   lo1           lo2              lo1

                           I. I NTRODUCTION
   The growing market for satellite navigation systems, such as                  rf1                            rf2          rf1                         rf2

Galileo and GPS, is considered the killer application for high-                                 c)                                        d)

performance ultra low-power transceivers. For example, it is esti-
mated that EU companies, users and society can make at least 55                Fig. 1. The mixer circuit configurations: a) Gilbert mixer with/without current
                                                                               bleeding, b) Gilbert mixer with current reused bleed technique, c) Gilbert
billion euros benefits from Galileo over the next 20 years.                     mixer with current bleeding through differential inductor center tap and d) a
   A popular technique to achieve a low-power consumption in RF                current reused Gilbert mixer-oscillator.
front-end circuits is reusing the current between different functional
blocks, i.e. the same DC bias current is shared between different
circuit functionalities [1]. A well-known example of this trend is             current source supplies part of the RF input stage current, the larger
cascoding the Gilbert mixer on top of the LNA circuit [2], while               gm or RL can be utilized with RF and LO transistors operating
less popular is stacking voltage-controlled oscillator (VCO) [3] [4].          safely in saturation. The current source can be realized for example
Recently, an entire RF front-ends merging the functionalities of the           using PMOS current sources or passive resistor. Fig. 1b shows a
LNA, mixer and oscillator in a single circuit has been proposed [1]            current reused bleeding Gilbert mixer. In this topology, a PMOS
[5]. A widely used technique to realize a high performance low-                transistor operates simultaneously as a bleed current source and as
voltage RF CMOS circuits, such as mixer, is current boosting [6].              a part of the RF input amplification. In this case the higher overall
The intention of this idea is to allocate a smaller bias current to the        transconduntance reduces the NF [9]. Fig. 1c shows a Gilbert mixer,
switching transistors and to the load resistors than to the RF input           wherein the boost current is provided via a differential inductor center
device. This relaxes the trade-offs between linearity, gain and noise          tap. The inductor tunes out the parasitic capacitances present in switch
figure (NF) [7].                                                                transistor sources at the LO frequency and lowers the flicker noise
   In this paper, a new RF front-end suitable for low-voltage operation        of the mixer output. In addition, the boost current source noise is
is presented. The front-end, called self-oscillating LNA-mixer, per-           minimized [10] [11].
forms amplification, down-conversion and local oscillator (LO) signal              The intention is to use the boost current to realize other functionali-
generation while sharing the same DC bias current between different            ties demanded in the receiver. The most power-efficient approach is to
circuit blocks of the RF front-end resulting in a robust operation and         use that current to provide LO signals. Fig. 1d shows a Gilbert mixer,
low-power consumption (1.2 mW).                                                wherein we have used the boost current to realize LO signals. The
                                                                               resulting circuit is a self-oscillating mixer (SOM), wherein the current
        II. E VOLUTION TOWARDS THE PROPOSED CIRCUIT                            allocation between RF, VCO and quad transistors can be selected
   The evolution towards the proposed circuit is seen from Fig. 1. A           for best performance [4]. Furthermore, the RF signal present at the
CMOS Gilbert mixer is shown in Fig. 1a. In a low-supply voltages, it           outputs of the mixer RF transistors is zero at the inductor center tap,
is typically composed of a grounded-source pair, which converts the            since it is a virtual ground [10].
RF input voltage to current-mode signal. The current-mode signal
is then fed to the switching quad, which is driven by a large LO                       III. T HE S ELF -O SCILLATING LNA-M IXER AND CIRCUIT
signal. The output current of the mixer in low-noise applications is                                             ANALYSIS
usually driven to the passive resistor load (RL ). Fig. 1 (dashed lines          The proposed self-oscillating LNA-Mixer circuit is shown in Fig. 2,
and box) shows a current boosted Gilbert mixer [8]. Since boost                where we have used the VCO topology presented in [12] [13]. The



978-1-4244-8971-8/10$26.00 c 2010 IEEE
RF differential pair is now a LNA, a transconductor designed for low      B. Noise and Phase-Noise
input noise and 50 ohm input impedance. The chosen LNA topology             In active current commutating CMOS mixers, switches contribute
is a widely used inductively degenerated common-source LNA [8].           flicker noise to the mixer output in two different way. In direct
   The input impedance match to 50 ohm at the wanted frequency ω          mechanism, flicker noise modulates the time instants of mixer switch-
is achieved when the real part of the (1) is                              ing whereas in indirect mechanism, it induces current in the tail
                                                                          capacitance Cp , which is commutated to the output. The inductor
                               Ls gm
                        Rs =         = ωt Ls                        (1)   tunes out the Cp at the LO frequency and suppress the indirect
                                Cgs
                                                                          mechanism causing flicker noise. The direct mechanism [8],
  and the imaginary part is set to zero [14], which leads to
                                                                                                                  vn
                                                                                                      in = 4Isw                              (10)
                                       1                                                                          ST
                        ωo =                                        (2)
                               Cgs     Lg + Ls                               where Isw is the bias current of each switch pair, vn is the
                                                                          equivalent flicker noise of the switching quad, S is the slope of the
  It is seen, that in practice the impedance to 50 ohm is achieved by     LO signal at the switching event and T is LO period. It is seen that
controlling the value of the Ls , whereas the Lg sets up the wanted       flicker noise caused by this mechanism can be reduced using large
operating frequency by resonating out the parasitic gate capacitance.     W/L ratio, reducing the switch current or increasing the slope of
                                                                          the LO signal [8]. The thermal noise contribution from the VCO is
A. Gain                                                                   minimized since its noise is common mode at the mixer output due
   The effective transconductance of the LNA part of the proposed         to boosting through the differential inductor [10]. Therefore, the total
circuit is [14]                                                           thermal noise voltage of the mixer output is approximately [16]

                                                                                         2                      2RL Isw
                            Gm = gm Qin                             (3)                Von = 8kT RL (1 + γ               + γgm RL )          (11)
                                                                                                                  πA
  Overall, the gain of Gilbert cell mixer is [8]                             where γ is the FET noise factor and A is the LO signal amplitude.
                                                                          The three terms in (13) are output noise voltages due to the load
                                     2                                    resistors, the mixer differential switches and the input transconductor
                           Av =        gm RL                        (4)
                                     π                                    stage [16]. In the proposed circuit, the Isw is low and LO amplitude
   Taking into account the effective transconductance Gm of the LNA       is rather high leading to small switch noise contribution. Furthermore,
stage, the gain of the LNA-Mixer is                                       assuming that the Gloss in (11) is ≈1, the total input-referred DSB
                                                                          white noise spectral density is [16]
                    2         2 ωo (Lg + Ls )
             Av =     Gm RL =                 gm RL                 (5)                                               γ
                    π         π      2Rs                                                       DSBVin ≈ 2π 2 kT
                                                                                                    2
                                                                                                                                             (12)
                                                                                                                    gm Q2
                                                                                                                        in
   However, due to current division between mixer quad and differen-
                                                                             wherein the assumption is that the input transconductor dominates
tial inductor, part of the RF current flows to the differential inductor
                                                                          the noise.
[15]. Fig. 3 shows a simplified small-signal model seen at the sources
                                                                             As far as the oscillator is concerned, the main drawback of the
of mixer quad transistors M3 -M6 . The parasitic capacitance Cp seen
                                                                          proposed circuit is that the effective supply voltage used in the design
at the source nodes A and B is resonated out with the differential
                                                                          of the VCO is reduced by the Vds of the input RF transistors. The
inductor at the desired operating frequency. The impedance seen at
                                                                          phase-noise of the oscillator according to heuristic Leeson formula
the source nodes of each quad transistor is 1/gm . For differential
                                                                          is [17]
operation, the inductor center tap is a virtual ground and therefore
the effective impedance seen at the source nodes A and B is                                                    kT ω 2
                                                                                                SSSB = F                                     (13)
                             1    1                                                                         2Psig Q2 Δω 2
                         Z=    ||   ||Rp                            (6)
                            gm gm                                            where Q is the loaded quality factor of the tank, Δω=2πΔf is
                                                                          the angular frequency offset, and F is noise factor. It is seen that
  where
                                                                          in order to realize high spectral purity oscillator, it is important to
                                                                          maximize Q, Psig (or Vsig ) and minimize F. The F is a noise factor
                             Rp = ωLQ                               (7)   and analyzed in detail in [18]. To maximize Q in (16) the inductor
                                                                          must be chosen carefully, because the Q, especially at low microwave
   and Q is the quality factor of the inductor. Due to current division
                                                                          frequencies (≤ 5GHz) is mainly determined from the Q of inductor.
the gain of the LNA-Mixer is reduced by to first order by a factor of
                                                                          Furthermore, in the proposed circuit the VCO is capacitively loaded
                           gm + gm         2gm                            enabling a high loaded Q. Overall, the main drawbacks are the lower
              Gloss =                1
                                       =        1
                                                                    (8)   effective supply voltage and the presence of the complex biasing
                        g m + g m + Rp   2gm + Rp
                                                                          arrangement around the VCO in this circuit.
   To minimize the loss, the Rp should be as high as possible. This          The achievable spectral purity characteristics of the proposed
is the case when the L and Q are made as large as possible, as can be     circuit techniques was determined using Spectre RF simulations. The
seen from (9) [15]. Finally, the gain of the proposed self-oscillating    RF transistors M1 and M2 are biased using a current mirror to carry
LNA-Mixer is                                                              0.5 mA each, a total of 1 mA. This bias current is entirely by-passed
                                                                          to the VCO through differential inductor. The LC-VCO is voltage
              2               2 ωo (Lg + Ls )                             biased to operate in class-C mode for optimal performance. The mixer
       Av =     Gm RL Gloss =                 gm RL Gloss           (9)
              π               π      2Rs                                  quad is voltage biased to carry zero current. The differential 8 nH
TABLE I
         P HASE NOISE CONTRIBUTION OF EACH NOISE SOURCE
                               Noise source          Contribution                                                                       Rvco
                               Drain current            37 %

                                 Inductor               33 %

                              Voltage bias [V]          20 %                                                       Rs                                       Rs
                                Current bias            5%

                                   Other                5%
                                                                                                 1/gm              L         1/gm         1/gm              L         1/gm

                                                                                                                  A                                        B
                                            Vdd

                                                                                                                      Cp                                       Cp


                  lo11                                               lo22
                                                                                                 Fig. 3. The equivalent model of loading circuit seen at the source nodes of
                                                                                                 the switching quad


                    M8                     Vbias                     M9
                                                                                                 by one phase of the LO, and the other pairs on the right by
       out1                                                                    out2              its quadrature phase. The quadrature LO signal using the circuit
                                                                                                 presented in [20]. Furthermore, the NMOS transistors are voltage
                                                                                                 biased to operate in class-C mode. The quadrature functionality
      lo1                                      lo2                                  lo1          is accomplished using linear-region transistors in series with the
               M3             M4                          M5              M6                     gates of the LC-VCO PMOS active transistors. The coupling devices
                                                                                                 modulate the negative gm of the switching pairs to accomplish anti-
                                                                                                 phase injection-locking. The coupling devices do not consume voltage
        Lg                                                                     Lg
rf1                                                                                       rf2    headroom and dissipates no power. Furthermore, to first order, the
                         M1                                     M2
                                                                                                 devices do not contribute to phase-noise [20]. Moreover, only one
                                                                                                 differential inductor is needed in this topology, which saves silicon
                  Ls                                                  Ls                         area.
                                                                                                    The voltage conversion gain of the circuit is
                                               LNA
                                                                                                                                 12
                                                                                                                           Av =     gm Qin RL                      (15)
             Fig. 2.   The proposed Self-Oscillating LNA-Mixer                                                                   2π
                                                                                                    where the factor of 1 results from the fact that the LNA drives
                                                                                                                          2
                                                                                                 two mixers in parallel. The noise performance of this topology as
inductor has a high Q of 20. The capacitance consists of a 200 μm                                compared to that of the pair of Gilbert mixers depends on the relative
NMOS-transistor and a 1 pF MIM-capacitor. The achieved phase-                                    sizes of the RF transistors to the mixer quad transistors. The circuit
noise is -129 dBc/Hz at the 1 MHz offset from 1.6 GHz oscillating                                has a RF transconductor advantage noise advantage but a mixer quad
frequency. Table I shows the contribution of each noise source to                                transistor noise disadvantage [19]. Therefore, it is seen that when
the total phase-noise. It is seen that bias circuitry in this design                             quad transistors are made small, the noise performance of the circuit
contributes 25% of the total noise. The raw high spectral purity                                 relative to a pair of Gilbert mixers improves.
achieved in this self-oscillating LNA-Mixer is due to the class-C
operation of the VCO, high VCO amplitude swing and the high                                      A. Case Study: A Galileo RF Front-End
loaded Q offered by the proposed circuit.                                                           The circuit of Fig. 4 has been designed for Galileo application
                                                                                                 using 65 nm CMOS technology with an RF option. The LNA is
C. Linearity                                                                                     biased with an current mirror. The bias circuit is isolated from a
   The linearity of the circuit is limited in two different points. At                           signal path using 20 kΩ resistors. The RF transistors M1 and M2 are
the RF (input) port, it is limited by the bias Vef f = Vgs−vt of the                             biased at the drain current of 0.5 mA each. Then the required source
transistors M1−2 and the voltage gain in the matching circuit [8]                                inductance to realize 50 Ω input impedance is about 2.5 nH. The
                                                                                                 input network includes the total parasitic parallel capacitance (300
                                               IIP 3M1−2
                              IIP 3 =                                                     (14)   fF) including the ESD protection diodes and bonding pad structure.
                                                  Q2in                                           Finally, in order to series resonate the input impedance at 1.575
                                                                                                 GHz, the external gate inductors of 30 nH are used. The Q of these
         IV. T HE S ELF -O SCILLATING IQ RF F RONT-E ND                                          external inductors is 30. The circuit is biased such that the current
   The LNA in direct conversion receivers must drive two mixers                                  through the Q-VCO is 1 mA and the current through switching quad
to produce quadrature outputs. Essentially, there are two options to                             is almost zero. The quad is voltage biased in the vicinity of the
accomplish this, either the use of two separate circuits presented in                            threshold voltage. The load resistance RL is 1 kΩ. The differential 8
Fig. 2 or using a modified version of the circuit in Fig. 2 wherein                               nH inductor, which isolates the Q-VCO from the other circuitry has
the LNA part of the circuit drives two Gilbert cell switching quads                              a Q of 20 and resonates out the parasitic capacitance at the 1.575
as shown in Fig. 4 [19]. The two pairs on the left are switched                                  GHz. The Q-VCO consists of a 8 nH differential inductor with a Q
Vdd                                                            Vdd
                                                                                                                                                              V. C ONCLUSION
                                                                                                                                     A new circuit to realize self-oscillating LNA-Mixer has been
                            Q+               Q-                                     I-                 I+
                                                                                                                                  proposed. Furthermore, using the proposed circuit it is possible
                      I+                          I-                          Q+                             Q-                   to realize an entire single-stage RF receiver. The presented circuit
                                                                                                                                  achieves a high-performance with a low-power consumption. The
                                 Vtune                                                        Vtune
                                                                                                                                  future work includes the complete analysis of the presented circuit
            out1                                       out2            out3                                         out4          and possibly fabrication of the circuit.
                                   mp                                                             mp


           lo1                    lo2                    lo1           lo3                      lo4                   lo3
                                                                                                                                                            ACKNOWLEDGMENT
                       s1                                                                                   s2
                                                                                                                                    The first author would like to thank Jenny and Antti Wihuri
                                                                                                                                  foundation for financial support.
                                                               mp

                                                                                                                                                                 R EFERENCES
rf1                                                                                                                         rf2

                                                                                                                                  [1] Antonio Liscidini, Andrea Mazzanti et.al , ”Single-Stage Low-Power
                                                                                                                                      Quadrature RF Receiver Front-End: The LMV Cell”, IEEE Journal of
                                                                                                                                      Solid-State Circuits, vol 41, No.12, December 2006.
                                                                                                                                  [2] Henrik Sjoland, Ali Karimi-Sanjaani and Asad A. Abidi , ”A merged
                                                                                                                                      CMOS LNA and Mixer for a WCDMA receiver”, IEEE Journal of Solid-
                            Fig. 4.        The Self-Oscillating IQ LNA-Mixer                                                          State Circuits, vol 38, No.6, June 2003.
                                                                                                                                  [3] To-Po Wang, Chia-Chi Chang et.al , ”A Low-Power Oscillator Mixer in
                                                                                                                                      0.18-um CMOS Technology”, IEEE Transaction on Microwave Theory
                                TABLE II                                                                                              and Techniques, vol. 54, no. 1, January 2006.
      T HE RF FRONT- END PERFORMANCE AND COMPARISON WITH STATE OF                                                                 [4] Tero Koivisto and Esa Tiiliharju, ”A current reused oscillator-mixer for
                                                         THE ART
                                                                                                                                      DS-UWB”, Norchip, 2009.
                                                                                                                                  [5] M.Camponeschi, A.Bevilacqua, P.Andreani, ”Analysis and design of a
                                        This work               [1]                       [5]                      [21]               low-power single-stage CMOS wireless receiver”, Norchip, 2009.
            Results                       sim.                 meas.                     meas.                     meas.
                                                                                                                                  [6] W. H.Sansen, R. G.Meyer , ”Distortion in Bipolar Variable-Gain Ampli-
                                                                                                                                      fiers”, IEEE Journal of Solid-State Circuits, vol 8, No.4, August 1973.
           Av [dB]                         25                   36                        27                        26            [7] Behzad Razavi, ”Design Considerations for Future RF Circuits”, IEEE
         NF (SSB) [dB]                     4.4                  4.8                       13                        5.7               International Symposium on Circuits and Systems (ISCAS), 2007.
                                                                                                                                  [8] Pete Sivonen, ”Design, Analysis, and Optimization of Radio Frequency
         IIP3 [dBm]                        -15                  -19                      n.a.                      -14.5
                                                                                                                                      front-ends for integrated wireless transceivers”, PhD Thesis, Helsinki
         IIP2 [dBm]                        41                   n.a.                     n.a.                       26                University of Technology, 2006.
           S11 [dB]                     ≤ −15                   n.a.                 ≤ −10                        ≤ −25
                                                                                                                                  [9] Sang-Gug Lee, J. K.Choi , ”Current-reuse bleeding mixer”, Electronics
                                                                                                                                      Letters, April 2000.
       PN(1MHz) [dBc/Hz]                  -125                  -104                     n.a.                      -126
                                                                                                                                  [10] Jouni Kaukovuori, ”CMOS Radio Frequency Circuits for Short-Range
         IDD [mA]                          1                    4.5                       1.3                      15.3               Direct-Conversion Receivers”, PhD Thesis, Helsinki University of Tech-
          VDD [V ]                         1.2                  1.2                       1                         2.7
                                                                                                                                      nology, 2008.
                                                                                                                                  [11] Jinsung Park, Chang-Ho Lee et.al , ”Design and analysis of low flicker-
          Technology             0.065µm CMOS             0.13µm CMOS              0.09µm CMOS              0.35µm BiCMOS             noise CMOS mixers for direct-conversion receivers”, IEEE Transaction
                                                                                                                                      on Microwave Theory and Techniques, vol. 54, no. 12, December 2006.
                                                                                                                                  [12] Pietro Andreani, Ali Fard, ”A 2.3 GHz LC-tank CMOS VCO with
                                                                                                                                      optimal phase noise performance”, IEEE Int.Solid-State Circuits (ISSCC)
                                                                                                                                      Dig.Tech.Papers, 2006.
                                                                                                                                  [13] Andrea Mazzanti and Pietro Andreani , ”Class-C CMOS VCOs, with a
of 20 and varactors from the RF library. The outputs of the Q-VCO                                                                     general result on phase noise”, IEEE Journal of Solid-State Circuits, vol
are coupled to the switching quads through 4 pF coupling MIM-                                                                         43, No.12, December 2008.
                                                                                                                                  [14] Kuang-Wei Cheng, Karthik Natarajan and David J. Allstot, ”A current
capacitors. The quadrature coupling transistors are voltage biased
                                                                                                                                      reuse quadrature GPS receiver in 0.13 µ CMOS”, IEEE Journal of Solid-
through large resistors and the coupling between the Q-VCO and                                                                        State Circuits, vol 45, No.3, March 2010.
coupling devices has been accomplished using 4 pF capacitors. The                                                                 [15] Eyad Abou-Allam, John J. Nisbet and Michael C. Maliepaard , ”Low-
length of the all transistors is 0.13 μm. The width of the LNA                                                                        Voltage 1.9-GHz front-end receiver in 0.5-µm CMOS technology”, IEEE
transistors is 50 μm. The widths of the Q-VCO active transistors                                                                      Journal of Solid-State Circuits, vol 36, No.10, October 2001.
                                                                                                                                  [16] Hooman Darabi and Asad A. Abidi, ”Noise in RF-CMOS Mixers: A
is 20 μm and the width of the coupling transistors is 20 μm. The                                                                      simple physical model”, IEEE Journal of Solid-State Circuits, vol 35,
width of the quad transistors are 20 μm. The simulated performance                                                                    No.1, January 2000.
metrics for the proposed circuit are shown in Table 2. The voltage                                                                [17] Marc Tiebout , ”Low-Power Low-Phase-Noise Differentially Tuned
gain of the circuit is 25 dB with an IIP3 value of -15 dBm. The                                                                       Quadrature VCO Design in Standard CMOS ”, IEEE Journal of Solid-
                                                                                                                                      State Circuits, vol 36, No.7, July 2001.
gain can be controlled by varying the size of the load resistance. The                                                            [18] J. Rael and A. Abidi , ”Physical processes of phase noise in differential
single-sideband noise figure (SSB NF) NF is 4.4 dB at the 4 MHz                                                                        LC-oscillators ”, IEEE Custom Integrated Circuits Conference, May 2000.
IF frequency. The flicker noise corner is 170 kHz. The IIP2 is +41                                                                 [19] J. Harvey and R. Harjani , ”An integrated quadrature mixer with
dBm. The phase-noise of the Q-VCO is -125 dBc/Hz at the 1 MHz                                                                         improved image rejection at low voltage ”, 14th International Conference
offset from the oscillation frequency. The linear tuning range of the                                                                 on VLSI Design, January 2001.
                                                                                                                                  [20] Kuang-Wei Cheng, Karthik Natarajan, David Allstot, ”A 7.2mW
Q-VCO is 10 %. The RF front-end scattering parameter S11 is -25                                                                       Quadrature GPS Receiver in 0.13 µm CMOS”, IEEE Int.Solid-State
dB at the exact operating frequency. The circuit draws 1 mA from a                                                                    Circuits (ISSCC) Dig.Tech.Papers, 2009.
1.2 V supply. The isolation properties of the circuit has been studied                                                            [21] P.Sivonen, S.Kangasmaa, A.Parssinen, ”A SiGe RF front-end with on-
using Monte Carlo simulations with 200 iterations. The worst case                                                                     chip VCO for a GPS receiver”, IEEE European Solid-State Circuits
                                                                                                                                      Conference (ESSCIRC), 2002.
isolation from the RF input transistor to the inductor center tap is 40
dB.

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  • 1. A Self-Oscillating LNA-Mixer Tero Koivisto Esa Tiiliharju University of Turku University of Turku Microelectronics Laboratory Microelectronics Laboratory Turku Center for Computer Science, TUCS Turku, Finland Turku, Finland Email: tejuko@utu.fi Vdd Vdd Abstract—In this paper, a new circuit topology to realize a stacked self- oscillating LNA-Mixer is proposed. The basic idea has been to recognize that in a high-performance down-conversion mixer its RF input-stage gain, linearity, and noise tradeoff is often improved by feeding it with lo1 lo2 lo1 lo1 lo2 lo1 a bypass current source. This current source could be isolated with an inductor so as to allow free implementation of the oscillator block on top of it. Using these guidelines, the presented circuit achieves high- rf1 rf2 rf1 rf2 performance without sacrificing compatibility with modern low-voltage a) b) CMOS implementations. To further demonstrate usefulness of the circuit, an entire single-stage quadrature (IQ) RF front-end using this circuit as Vdd Vdd a core has been developed. The IQ front-end, targeted for the Galileo satellite navigation system, has been designed using a 65-nm CMOS VCO technology, and it achieves NF=4.4 dB, IIP3=-15 dBm and Av =25 dB at 1.575 GHz, while using only 1 mA from the low 1.2-V supply. lo1 lo2 lo1 lo1 lo2 lo1 I. I NTRODUCTION The growing market for satellite navigation systems, such as rf1 rf2 rf1 rf2 Galileo and GPS, is considered the killer application for high- c) d) performance ultra low-power transceivers. For example, it is esti- mated that EU companies, users and society can make at least 55 Fig. 1. The mixer circuit configurations: a) Gilbert mixer with/without current bleeding, b) Gilbert mixer with current reused bleed technique, c) Gilbert billion euros benefits from Galileo over the next 20 years. mixer with current bleeding through differential inductor center tap and d) a A popular technique to achieve a low-power consumption in RF current reused Gilbert mixer-oscillator. front-end circuits is reusing the current between different functional blocks, i.e. the same DC bias current is shared between different circuit functionalities [1]. A well-known example of this trend is current source supplies part of the RF input stage current, the larger cascoding the Gilbert mixer on top of the LNA circuit [2], while gm or RL can be utilized with RF and LO transistors operating less popular is stacking voltage-controlled oscillator (VCO) [3] [4]. safely in saturation. The current source can be realized for example Recently, an entire RF front-ends merging the functionalities of the using PMOS current sources or passive resistor. Fig. 1b shows a LNA, mixer and oscillator in a single circuit has been proposed [1] current reused bleeding Gilbert mixer. In this topology, a PMOS [5]. A widely used technique to realize a high performance low- transistor operates simultaneously as a bleed current source and as voltage RF CMOS circuits, such as mixer, is current boosting [6]. a part of the RF input amplification. In this case the higher overall The intention of this idea is to allocate a smaller bias current to the transconduntance reduces the NF [9]. Fig. 1c shows a Gilbert mixer, switching transistors and to the load resistors than to the RF input wherein the boost current is provided via a differential inductor center device. This relaxes the trade-offs between linearity, gain and noise tap. The inductor tunes out the parasitic capacitances present in switch figure (NF) [7]. transistor sources at the LO frequency and lowers the flicker noise In this paper, a new RF front-end suitable for low-voltage operation of the mixer output. In addition, the boost current source noise is is presented. The front-end, called self-oscillating LNA-mixer, per- minimized [10] [11]. forms amplification, down-conversion and local oscillator (LO) signal The intention is to use the boost current to realize other functionali- generation while sharing the same DC bias current between different ties demanded in the receiver. The most power-efficient approach is to circuit blocks of the RF front-end resulting in a robust operation and use that current to provide LO signals. Fig. 1d shows a Gilbert mixer, low-power consumption (1.2 mW). wherein we have used the boost current to realize LO signals. The resulting circuit is a self-oscillating mixer (SOM), wherein the current II. E VOLUTION TOWARDS THE PROPOSED CIRCUIT allocation between RF, VCO and quad transistors can be selected The evolution towards the proposed circuit is seen from Fig. 1. A for best performance [4]. Furthermore, the RF signal present at the CMOS Gilbert mixer is shown in Fig. 1a. In a low-supply voltages, it outputs of the mixer RF transistors is zero at the inductor center tap, is typically composed of a grounded-source pair, which converts the since it is a virtual ground [10]. RF input voltage to current-mode signal. The current-mode signal is then fed to the switching quad, which is driven by a large LO III. T HE S ELF -O SCILLATING LNA-M IXER AND CIRCUIT signal. The output current of the mixer in low-noise applications is ANALYSIS usually driven to the passive resistor load (RL ). Fig. 1 (dashed lines The proposed self-oscillating LNA-Mixer circuit is shown in Fig. 2, and box) shows a current boosted Gilbert mixer [8]. Since boost where we have used the VCO topology presented in [12] [13]. The 978-1-4244-8971-8/10$26.00 c 2010 IEEE
  • 2. RF differential pair is now a LNA, a transconductor designed for low B. Noise and Phase-Noise input noise and 50 ohm input impedance. The chosen LNA topology In active current commutating CMOS mixers, switches contribute is a widely used inductively degenerated common-source LNA [8]. flicker noise to the mixer output in two different way. In direct The input impedance match to 50 ohm at the wanted frequency ω mechanism, flicker noise modulates the time instants of mixer switch- is achieved when the real part of the (1) is ing whereas in indirect mechanism, it induces current in the tail capacitance Cp , which is commutated to the output. The inductor Ls gm Rs = = ωt Ls (1) tunes out the Cp at the LO frequency and suppress the indirect Cgs mechanism causing flicker noise. The direct mechanism [8], and the imaginary part is set to zero [14], which leads to vn in = 4Isw (10) 1 ST ωo = (2) Cgs Lg + Ls where Isw is the bias current of each switch pair, vn is the equivalent flicker noise of the switching quad, S is the slope of the It is seen, that in practice the impedance to 50 ohm is achieved by LO signal at the switching event and T is LO period. It is seen that controlling the value of the Ls , whereas the Lg sets up the wanted flicker noise caused by this mechanism can be reduced using large operating frequency by resonating out the parasitic gate capacitance. W/L ratio, reducing the switch current or increasing the slope of the LO signal [8]. The thermal noise contribution from the VCO is A. Gain minimized since its noise is common mode at the mixer output due The effective transconductance of the LNA part of the proposed to boosting through the differential inductor [10]. Therefore, the total circuit is [14] thermal noise voltage of the mixer output is approximately [16] 2 2RL Isw Gm = gm Qin (3) Von = 8kT RL (1 + γ + γgm RL ) (11) πA Overall, the gain of Gilbert cell mixer is [8] where γ is the FET noise factor and A is the LO signal amplitude. The three terms in (13) are output noise voltages due to the load 2 resistors, the mixer differential switches and the input transconductor Av = gm RL (4) π stage [16]. In the proposed circuit, the Isw is low and LO amplitude Taking into account the effective transconductance Gm of the LNA is rather high leading to small switch noise contribution. Furthermore, stage, the gain of the LNA-Mixer is assuming that the Gloss in (11) is ≈1, the total input-referred DSB white noise spectral density is [16] 2 2 ωo (Lg + Ls ) Av = Gm RL = gm RL (5) γ π π 2Rs DSBVin ≈ 2π 2 kT 2 (12) gm Q2 in However, due to current division between mixer quad and differen- wherein the assumption is that the input transconductor dominates tial inductor, part of the RF current flows to the differential inductor the noise. [15]. Fig. 3 shows a simplified small-signal model seen at the sources As far as the oscillator is concerned, the main drawback of the of mixer quad transistors M3 -M6 . The parasitic capacitance Cp seen proposed circuit is that the effective supply voltage used in the design at the source nodes A and B is resonated out with the differential of the VCO is reduced by the Vds of the input RF transistors. The inductor at the desired operating frequency. The impedance seen at phase-noise of the oscillator according to heuristic Leeson formula the source nodes of each quad transistor is 1/gm . For differential is [17] operation, the inductor center tap is a virtual ground and therefore the effective impedance seen at the source nodes A and B is kT ω 2 SSSB = F (13) 1 1 2Psig Q2 Δω 2 Z= || ||Rp (6) gm gm where Q is the loaded quality factor of the tank, Δω=2πΔf is the angular frequency offset, and F is noise factor. It is seen that where in order to realize high spectral purity oscillator, it is important to maximize Q, Psig (or Vsig ) and minimize F. The F is a noise factor Rp = ωLQ (7) and analyzed in detail in [18]. To maximize Q in (16) the inductor must be chosen carefully, because the Q, especially at low microwave and Q is the quality factor of the inductor. Due to current division frequencies (≤ 5GHz) is mainly determined from the Q of inductor. the gain of the LNA-Mixer is reduced by to first order by a factor of Furthermore, in the proposed circuit the VCO is capacitively loaded gm + gm 2gm enabling a high loaded Q. Overall, the main drawbacks are the lower Gloss = 1 = 1 (8) effective supply voltage and the presence of the complex biasing g m + g m + Rp 2gm + Rp arrangement around the VCO in this circuit. To minimize the loss, the Rp should be as high as possible. This The achievable spectral purity characteristics of the proposed is the case when the L and Q are made as large as possible, as can be circuit techniques was determined using Spectre RF simulations. The seen from (9) [15]. Finally, the gain of the proposed self-oscillating RF transistors M1 and M2 are biased using a current mirror to carry LNA-Mixer is 0.5 mA each, a total of 1 mA. This bias current is entirely by-passed to the VCO through differential inductor. The LC-VCO is voltage 2 2 ωo (Lg + Ls ) biased to operate in class-C mode for optimal performance. The mixer Av = Gm RL Gloss = gm RL Gloss (9) π π 2Rs quad is voltage biased to carry zero current. The differential 8 nH
  • 3. TABLE I P HASE NOISE CONTRIBUTION OF EACH NOISE SOURCE Noise source Contribution Rvco Drain current 37 % Inductor 33 % Voltage bias [V] 20 % Rs Rs Current bias 5% Other 5% 1/gm L 1/gm 1/gm L 1/gm A B Vdd Cp Cp lo11 lo22 Fig. 3. The equivalent model of loading circuit seen at the source nodes of the switching quad M8 Vbias M9 by one phase of the LO, and the other pairs on the right by out1 out2 its quadrature phase. The quadrature LO signal using the circuit presented in [20]. Furthermore, the NMOS transistors are voltage biased to operate in class-C mode. The quadrature functionality lo1 lo2 lo1 is accomplished using linear-region transistors in series with the M3 M4 M5 M6 gates of the LC-VCO PMOS active transistors. The coupling devices modulate the negative gm of the switching pairs to accomplish anti- phase injection-locking. The coupling devices do not consume voltage Lg Lg rf1 rf2 headroom and dissipates no power. Furthermore, to first order, the M1 M2 devices do not contribute to phase-noise [20]. Moreover, only one differential inductor is needed in this topology, which saves silicon Ls Ls area. The voltage conversion gain of the circuit is LNA 12 Av = gm Qin RL (15) Fig. 2. The proposed Self-Oscillating LNA-Mixer 2π where the factor of 1 results from the fact that the LNA drives 2 two mixers in parallel. The noise performance of this topology as inductor has a high Q of 20. The capacitance consists of a 200 μm compared to that of the pair of Gilbert mixers depends on the relative NMOS-transistor and a 1 pF MIM-capacitor. The achieved phase- sizes of the RF transistors to the mixer quad transistors. The circuit noise is -129 dBc/Hz at the 1 MHz offset from 1.6 GHz oscillating has a RF transconductor advantage noise advantage but a mixer quad frequency. Table I shows the contribution of each noise source to transistor noise disadvantage [19]. Therefore, it is seen that when the total phase-noise. It is seen that bias circuitry in this design quad transistors are made small, the noise performance of the circuit contributes 25% of the total noise. The raw high spectral purity relative to a pair of Gilbert mixers improves. achieved in this self-oscillating LNA-Mixer is due to the class-C operation of the VCO, high VCO amplitude swing and the high A. Case Study: A Galileo RF Front-End loaded Q offered by the proposed circuit. The circuit of Fig. 4 has been designed for Galileo application using 65 nm CMOS technology with an RF option. The LNA is C. Linearity biased with an current mirror. The bias circuit is isolated from a The linearity of the circuit is limited in two different points. At signal path using 20 kΩ resistors. The RF transistors M1 and M2 are the RF (input) port, it is limited by the bias Vef f = Vgs−vt of the biased at the drain current of 0.5 mA each. Then the required source transistors M1−2 and the voltage gain in the matching circuit [8] inductance to realize 50 Ω input impedance is about 2.5 nH. The input network includes the total parasitic parallel capacitance (300 IIP 3M1−2 IIP 3 = (14) fF) including the ESD protection diodes and bonding pad structure. Q2in Finally, in order to series resonate the input impedance at 1.575 GHz, the external gate inductors of 30 nH are used. The Q of these IV. T HE S ELF -O SCILLATING IQ RF F RONT-E ND external inductors is 30. The circuit is biased such that the current The LNA in direct conversion receivers must drive two mixers through the Q-VCO is 1 mA and the current through switching quad to produce quadrature outputs. Essentially, there are two options to is almost zero. The quad is voltage biased in the vicinity of the accomplish this, either the use of two separate circuits presented in threshold voltage. The load resistance RL is 1 kΩ. The differential 8 Fig. 2 or using a modified version of the circuit in Fig. 2 wherein nH inductor, which isolates the Q-VCO from the other circuitry has the LNA part of the circuit drives two Gilbert cell switching quads a Q of 20 and resonates out the parasitic capacitance at the 1.575 as shown in Fig. 4 [19]. The two pairs on the left are switched GHz. The Q-VCO consists of a 8 nH differential inductor with a Q
  • 4. Vdd Vdd V. C ONCLUSION A new circuit to realize self-oscillating LNA-Mixer has been Q+ Q- I- I+ proposed. Furthermore, using the proposed circuit it is possible I+ I- Q+ Q- to realize an entire single-stage RF receiver. The presented circuit achieves a high-performance with a low-power consumption. The Vtune Vtune future work includes the complete analysis of the presented circuit out1 out2 out3 out4 and possibly fabrication of the circuit. mp mp lo1 lo2 lo1 lo3 lo4 lo3 ACKNOWLEDGMENT s1 s2 The first author would like to thank Jenny and Antti Wihuri foundation for financial support. mp R EFERENCES rf1 rf2 [1] Antonio Liscidini, Andrea Mazzanti et.al , ”Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell”, IEEE Journal of Solid-State Circuits, vol 41, No.12, December 2006. [2] Henrik Sjoland, Ali Karimi-Sanjaani and Asad A. Abidi , ”A merged CMOS LNA and Mixer for a WCDMA receiver”, IEEE Journal of Solid- Fig. 4. The Self-Oscillating IQ LNA-Mixer State Circuits, vol 38, No.6, June 2003. [3] To-Po Wang, Chia-Chi Chang et.al , ”A Low-Power Oscillator Mixer in 0.18-um CMOS Technology”, IEEE Transaction on Microwave Theory TABLE II and Techniques, vol. 54, no. 1, January 2006. T HE RF FRONT- END PERFORMANCE AND COMPARISON WITH STATE OF [4] Tero Koivisto and Esa Tiiliharju, ”A current reused oscillator-mixer for THE ART DS-UWB”, Norchip, 2009. [5] M.Camponeschi, A.Bevilacqua, P.Andreani, ”Analysis and design of a This work [1] [5] [21] low-power single-stage CMOS wireless receiver”, Norchip, 2009. Results sim. meas. meas. meas. [6] W. H.Sansen, R. G.Meyer , ”Distortion in Bipolar Variable-Gain Ampli- fiers”, IEEE Journal of Solid-State Circuits, vol 8, No.4, August 1973. Av [dB] 25 36 27 26 [7] Behzad Razavi, ”Design Considerations for Future RF Circuits”, IEEE NF (SSB) [dB] 4.4 4.8 13 5.7 International Symposium on Circuits and Systems (ISCAS), 2007. [8] Pete Sivonen, ”Design, Analysis, and Optimization of Radio Frequency IIP3 [dBm] -15 -19 n.a. -14.5 front-ends for integrated wireless transceivers”, PhD Thesis, Helsinki IIP2 [dBm] 41 n.a. n.a. 26 University of Technology, 2006. S11 [dB] ≤ −15 n.a. ≤ −10 ≤ −25 [9] Sang-Gug Lee, J. K.Choi , ”Current-reuse bleeding mixer”, Electronics Letters, April 2000. PN(1MHz) [dBc/Hz] -125 -104 n.a. -126 [10] Jouni Kaukovuori, ”CMOS Radio Frequency Circuits for Short-Range IDD [mA] 1 4.5 1.3 15.3 Direct-Conversion Receivers”, PhD Thesis, Helsinki University of Tech- VDD [V ] 1.2 1.2 1 2.7 nology, 2008. [11] Jinsung Park, Chang-Ho Lee et.al , ”Design and analysis of low flicker- Technology 0.065µm CMOS 0.13µm CMOS 0.09µm CMOS 0.35µm BiCMOS noise CMOS mixers for direct-conversion receivers”, IEEE Transaction on Microwave Theory and Techniques, vol. 54, no. 12, December 2006. [12] Pietro Andreani, Ali Fard, ”A 2.3 GHz LC-tank CMOS VCO with optimal phase noise performance”, IEEE Int.Solid-State Circuits (ISSCC) Dig.Tech.Papers, 2006. [13] Andrea Mazzanti and Pietro Andreani , ”Class-C CMOS VCOs, with a of 20 and varactors from the RF library. The outputs of the Q-VCO general result on phase noise”, IEEE Journal of Solid-State Circuits, vol are coupled to the switching quads through 4 pF coupling MIM- 43, No.12, December 2008. [14] Kuang-Wei Cheng, Karthik Natarajan and David J. Allstot, ”A current capacitors. The quadrature coupling transistors are voltage biased reuse quadrature GPS receiver in 0.13 µ CMOS”, IEEE Journal of Solid- through large resistors and the coupling between the Q-VCO and State Circuits, vol 45, No.3, March 2010. coupling devices has been accomplished using 4 pF capacitors. The [15] Eyad Abou-Allam, John J. Nisbet and Michael C. Maliepaard , ”Low- length of the all transistors is 0.13 μm. The width of the LNA Voltage 1.9-GHz front-end receiver in 0.5-µm CMOS technology”, IEEE transistors is 50 μm. The widths of the Q-VCO active transistors Journal of Solid-State Circuits, vol 36, No.10, October 2001. [16] Hooman Darabi and Asad A. Abidi, ”Noise in RF-CMOS Mixers: A is 20 μm and the width of the coupling transistors is 20 μm. The simple physical model”, IEEE Journal of Solid-State Circuits, vol 35, width of the quad transistors are 20 μm. The simulated performance No.1, January 2000. metrics for the proposed circuit are shown in Table 2. The voltage [17] Marc Tiebout , ”Low-Power Low-Phase-Noise Differentially Tuned gain of the circuit is 25 dB with an IIP3 value of -15 dBm. The Quadrature VCO Design in Standard CMOS ”, IEEE Journal of Solid- State Circuits, vol 36, No.7, July 2001. gain can be controlled by varying the size of the load resistance. The [18] J. Rael and A. Abidi , ”Physical processes of phase noise in differential single-sideband noise figure (SSB NF) NF is 4.4 dB at the 4 MHz LC-oscillators ”, IEEE Custom Integrated Circuits Conference, May 2000. IF frequency. The flicker noise corner is 170 kHz. The IIP2 is +41 [19] J. Harvey and R. Harjani , ”An integrated quadrature mixer with dBm. The phase-noise of the Q-VCO is -125 dBc/Hz at the 1 MHz improved image rejection at low voltage ”, 14th International Conference offset from the oscillation frequency. The linear tuning range of the on VLSI Design, January 2001. [20] Kuang-Wei Cheng, Karthik Natarajan, David Allstot, ”A 7.2mW Q-VCO is 10 %. The RF front-end scattering parameter S11 is -25 Quadrature GPS Receiver in 0.13 µm CMOS”, IEEE Int.Solid-State dB at the exact operating frequency. The circuit draws 1 mA from a Circuits (ISSCC) Dig.Tech.Papers, 2009. 1.2 V supply. The isolation properties of the circuit has been studied [21] P.Sivonen, S.Kangasmaa, A.Parssinen, ”A SiGe RF front-end with on- using Monte Carlo simulations with 200 iterations. The worst case chip VCO for a GPS receiver”, IEEE European Solid-State Circuits Conference (ESSCIRC), 2002. isolation from the RF input transistor to the inductor center tap is 40 dB.