This document summarizes the key aspects of a DDR2 SDRAM controller, including:
1) It describes the differences between DDR1 and DDR2 memory technologies, such as lower power consumption and higher data rates in DDR2.
2) It provides a block diagram of the main components and I/O signals of a DDR2 SDRAM controller.
3) It explains the basic functionality of a DDR2 SDRAM controller, including initialization, refresh operations, and read and write operations.
HBM stands for high bandwidth memory and is a type of memory interface used in 3D-stacked DRAM (dynamic random access memory) in GPUs, as well as the server, machine-learning DSP , high-performance computing and networking and client space.
LAS16-402: ARM Trusted Firmware – from Enterprise to EmbeddedLinaro
LAS16-402: ARM Trusted Firmware – from Enterprise to Embedded
Speakers:
Date: September 29, 2016
★ Session Description ★
ARM Trusted Firmware has established itself as a key part of the ARMv8-A software stack. Broadening its applicability across all segments, from embedded to enterprise, is challenging. This session discusses the latest developments, including extension into the 32-bit space.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-402
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-402/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
IDT DDR4 RCD register and DB data buffer enable RDIMM and LRDIMM to faster speeds and deeper memories. This video helps you understand the DDR4 feature enhancements of IDT's DDR4 RCD and DB compared to earlier DDR3 technology. An introduction into some available LeCroy testing and debug tools completes the video. Presented by Douglas Malech, Product Marketing Manager at IDT and Mike Micheletti, Product Manager at Teledyne LeCroy. To learn more about IDT's leading portfolio of memory interface products, visit www.idt.com/go/MIP.
Highlighted notes while studying Concurrent Data Structures:
DDR3 SDRAM
Source: Wikipedia
Double Data Rate 3 Synchronous Dynamic Random-Access Memory, officially abbreviated as DDR3 SDRAM, is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors.
Wikipedia is a free online encyclopedia, created and edited by volunteers around the world and hosted by the Wikimedia Foundation.
Universal Flash Storage is an upcoming memory specification for use in mobile phones, tablets and other consumer electronics devices.
It is the successor of Embedded Multimedia controller (eMMC) that currently prevails and will be available as storage in on-chip and expandable form (in the form of memory cards).
The document describes the specifications and operations of Double Data Rate (DDR) SDRAM memory. It details features like double data rate architecture, burst lengths, CAS latencies, commands like read, write, refresh, and initialization procedures. It provides timing diagrams for different memory operations.
MIPI DevCon 2021: MIPI D-PHY and MIPI CSI-2 for IoT: AI Edge DevicesMIPI Alliance
Presented by Ashraf Takla, Mixel Inc.
This presentation covers the deployment of MIPI D-PHY℠ and MIPI CSI-2® in IoT and edge devices. While many mobile-influenced applications benefit from the low-power, small-form factor of MIPI specifications, AI edge processors in particular are seeing a surge in the use of MIPI specifications for their sensors as market trends shift from processing in the cloud or central location, to processing at the edge.
This presentation includes a high-level system overview of a specific use case, Perceive Ergo edge inference processor, and how Mixel was able to meet Perceive’s stringent requirements with its MIPI D-PHY CSI-2 TX and D-PHY CSI-2 RX IPs.
This document summarizes the key aspects of a DDR2 SDRAM controller, including:
1) It describes the differences between DDR1 and DDR2 memory technologies, such as lower power consumption and higher data rates in DDR2.
2) It provides a block diagram of the main components and I/O signals of a DDR2 SDRAM controller.
3) It explains the basic functionality of a DDR2 SDRAM controller, including initialization, refresh operations, and read and write operations.
HBM stands for high bandwidth memory and is a type of memory interface used in 3D-stacked DRAM (dynamic random access memory) in GPUs, as well as the server, machine-learning DSP , high-performance computing and networking and client space.
LAS16-402: ARM Trusted Firmware – from Enterprise to EmbeddedLinaro
LAS16-402: ARM Trusted Firmware – from Enterprise to Embedded
Speakers:
Date: September 29, 2016
★ Session Description ★
ARM Trusted Firmware has established itself as a key part of the ARMv8-A software stack. Broadening its applicability across all segments, from embedded to enterprise, is challenging. This session discusses the latest developments, including extension into the 32-bit space.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-402
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-402/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
IDT DDR4 RCD register and DB data buffer enable RDIMM and LRDIMM to faster speeds and deeper memories. This video helps you understand the DDR4 feature enhancements of IDT's DDR4 RCD and DB compared to earlier DDR3 technology. An introduction into some available LeCroy testing and debug tools completes the video. Presented by Douglas Malech, Product Marketing Manager at IDT and Mike Micheletti, Product Manager at Teledyne LeCroy. To learn more about IDT's leading portfolio of memory interface products, visit www.idt.com/go/MIP.
Highlighted notes while studying Concurrent Data Structures:
DDR3 SDRAM
Source: Wikipedia
Double Data Rate 3 Synchronous Dynamic Random-Access Memory, officially abbreviated as DDR3 SDRAM, is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors.
Wikipedia is a free online encyclopedia, created and edited by volunteers around the world and hosted by the Wikimedia Foundation.
Universal Flash Storage is an upcoming memory specification for use in mobile phones, tablets and other consumer electronics devices.
It is the successor of Embedded Multimedia controller (eMMC) that currently prevails and will be available as storage in on-chip and expandable form (in the form of memory cards).
The document describes the specifications and operations of Double Data Rate (DDR) SDRAM memory. It details features like double data rate architecture, burst lengths, CAS latencies, commands like read, write, refresh, and initialization procedures. It provides timing diagrams for different memory operations.
MIPI DevCon 2021: MIPI D-PHY and MIPI CSI-2 for IoT: AI Edge DevicesMIPI Alliance
Presented by Ashraf Takla, Mixel Inc.
This presentation covers the deployment of MIPI D-PHY℠ and MIPI CSI-2® in IoT and edge devices. While many mobile-influenced applications benefit from the low-power, small-form factor of MIPI specifications, AI edge processors in particular are seeing a surge in the use of MIPI specifications for their sensors as market trends shift from processing in the cloud or central location, to processing at the edge.
This presentation includes a high-level system overview of a specific use case, Perceive Ergo edge inference processor, and how Mixel was able to meet Perceive’s stringent requirements with its MIPI D-PHY CSI-2 TX and D-PHY CSI-2 RX IPs.
SSD - Solid State Drive PPT by Shyam jos Shyam Jos
Solid State Drive (SSD)
In 1995, M-Systems introduced the first flash-based solid-state drives. SSDs use non-volatile solid state memory like NAND flash or DRAM to store data without moving parts, distinguishing them from traditional hard disk drives. SSDs have significant performance advantages over HDDs with faster access times and read/write speeds, higher reliability since there are no moving parts, lower power consumption, and silent operation. However, SSDs currently have higher costs and offer less storage capacity than HDDs.
Here is a slide on Random Access Memory, slide consists of detailed presentation on primary Memory,types and history of RAM. Hope you will Enjoy the slide.
HKG15-107: ACPI Power Management on ARM64 Servers (v2)Linaro
HKG15-107: ACPI Power Management on ARM64 Servers
---------------------------------------------------
Speaker: Ashwin Chaugule
Date: February 9, 2015
---------------------------------------------------
★ Session Summary ★
Status of CPPC with runtime PM and discussion on idle PM with ACPI
--------------------------------------------------
★ Resources ★
Pathable: https://hkg15.pathable.com/meetings/250767
Video: https://www.youtube.com/watch?v=eDDgYIkUHLI
Etherpad: http://pad.linaro.org/p/hkg15-107
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2015 - #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
DDR - SDRAMs are classified into different types including SDRAM, DDR1, DDR2, DDR3, and DDR4. SDRAM synchronizes itself with the CPU timing to allow for faster memory access. DDR1 allows for higher transfer rates through double pumping of the data bus. DDR2 further increases speeds through lower power usage and internal clock running at half the external clock rate. DDR3 and DDR4 continue to improve speeds and bandwidth through higher data transfer rates and lower voltage requirements. Each new generation is not compatible with previous types due to changes in signaling and interfaces.
Computer memory, also known as RAM, is temporary storage that allows the computer to perform tasks by holding instructions and data in an easily accessible location. There are two main types of computer memory: volatile and non-volatile. Volatile memory, like RAM, loses its contents when power is removed while non-volatile types like ROM retain data without power. Over time, RAM technologies have evolved from SIMMs to DIMMs and SDRAM to DDR, DDR2, and DDR3, with each generation offering faster speeds and higher capacities. Proper identification and installation of the correct RAM type is important for system functionality and performance.
The document discusses Universal Flash Storage (UFS), which was created as a replacement for eMMC to meet increasing requirements for high bandwidth, high capacity, low power mobile storage. UFS uses a serial interface that builds on standards like SCSI, MIPI UniPro and M-PHY. It offers significantly higher performance than eMMC along with improved power efficiency. An ideal UFS implementation requires a complete IP solution including digital IP blocks, analog PHY IP, verification IP and software/hardware validation tools.
Solid-state drives (SSDs) are emerging as the storage technology of the future. SSDs use electronic circuits rather than mechanical components like hard disk drives to store data. They have no moving parts, faster read/write speeds, lower power consumption, and are more resistant to damage. While SSDs provide better performance than HDDs, they also have some limitations like write endurance and cost. Overall, SSDs are expected to become the basic storage component in servers and PCs due to their efficiency advantages over traditional hard drives.
This document discusses NAND flash memory, which is used in USB flash drives for portable storage. It describes how NAND flash works, including that it has a controller that sends commands serially to program and read the flash. Issues with NAND flash include bad blocks, long access times since it is not random access, and short lifetimes due to being programmable. Technologies like wear leveling aim to extend the lifetime by distributing writes across blocks.
RAM, or Random Access Memory, is a type of data storage used in computers that is located on the motherboard and allows quick access by the processor. There are two main types of RAM: DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory). DRAM needs to be refreshed often and uses a single transistor and capacitor per bit, while SRAM does not need to be refreshed and uses an array of six transistors per bit, making it faster to access but more expensive than DRAM.
Android uses cgroups to monitor system memory usage via the Low Memory Killer daemon and to group processes for effective CPU sharing. Cgroups are used to create mount points for memory and CPU control groups. The LMK daemon uses cgroups to receive memory pressure events and kill processes as needed. Init.rc uses cgroups to create groups for real-time and background tasks and assign CPU shares. Android further groups processes by scheduling policy for scheduling priorities.
Primary storage, also known as main storage or memory, is the area in a computer in which data is stored for quick access by the computer's processor. The terms random access memory (RAM) and memory are often as synonyms for primary or main storage
Join this video course on udemy . Click here :
https://www.udemy.com/course/mastering-microcontroller-with-peripheral-driver-development/?couponCode=SLIDESHARE
Learn bare metal driver development systems using Embedded C: Writing drivers for STM32 GPIO,I2C,SPI,USART from scratch
Software/Hardware used:
In this course, the code is developed such a way that, It can be ported to any MCU you have at your hand.
If you need any help in porting these codes to different MCUs you can always reach out to me!
The course is strictly not bound to any 1 type of MCU. So, if you already have any Development board which runs with ARM-Cortex M3/M4 processor,
then I recommend you to continue using it.
But if you don’t have any Development board, then check out the below Development boards.
SPI (Serial Peripheral Interface) allows for high-speed synchronous serial communication between microcontrollers and peripheral devices. It uses three wires (MOSI, MISO, SCK) to transmit data serially from a master to a slave device. The master device generates a clock signal on SCK to synchronize data transfer. The SS pin is used to select a specific slave device when there are multiple slaves. Common applications of SPI include in-system programming of microcontrollers and communicating with sensors, memory, and other peripherals. An example shows how to use SPI to control LEDs on a slave microcontroller from a master using button inputs.
This slide provides a basic understanding of hypervisor support in ARM v8 and above processors. And these slides (intent to) give some guidelines to automotive engineers to compare and choose right solution!
This document discusses solid state drives (SSDs) as an alternative to traditional hard disk drives (HDDs). It describes SSDs as using solid state memory rather than mechanical components to store data. The document outlines SSD form factors, architecture involving flash memory, controllers, caches and host interfaces. It compares the technical aspects of SSDs and HDDs, noting SSDs advantages as faster speeds, reliability and lower power use, while their main disadvantage is higher costs. The document concludes SSDs will likely replace HDDs in most applications due to their performance benefits.
Serial peripheral Interface - Embedded System ProtocolAditya Porwal
Serial Peripheral Interface (SPI) is a synchronous serial data protocol used by micro-controllers for communicating with one or more peripheral devices quickly over short distances. It can also be used for communication between two micro-controllers.
This document provides an overview of different types of storage technologies including RAM, ROM, magnetic storage, optical storage, solid-state storage, and cloud storage. It explains what each type is, how it works, and key details about its uses and capabilities. RAM is described as temporary memory that allows quick access to data for processing while storage devices like hard drives, optical discs, flash memory, and cloud servers provide more permanent storage of large amounts of data that can be accessed from different devices using internet connectivity. The document outlines the advantages and disadvantages of various storage options.
THIS SLIDE INCLUDES DEFINITION AND USE OF 4 COMPUTER MEMORY. THIS IS FOR ACADEMIC STUDY WHICH DESCRIBES ABOUT TYPES, ADVANTAGES, AND DISADVANTAGES OF MEMORY
PCIe is a standard expansion card interface introduced in 2004 to replace PCI and PCI-X. It uses serial instead of parallel communication and is scalable, allowing for higher maximum system bandwidth. The presentation discusses the history of expansion card standards leading to PCIe, including ISA, EISA, VESA, PCI, and PCI-X. It also covers key aspects of PCIe such as the root complex, endpoints, switches, lanes, bus:device.function notation, enumeration, and address spaces such as configuration space.
This document provides information on different types of computer memory, including ROM and RAM. It discusses the main characteristics and uses of ROM types like PROM, EPROM, and EEPROM (including EAROM and flash memory). It also covers the basics of RAM like SDRAM, and specific types like SDR-SDRAM, DDR-SDRAM, and RDRAM. The document is intended to explain the differences between read-only and random access memory.
SSD - Solid State Drive PPT by Shyam jos Shyam Jos
Solid State Drive (SSD)
In 1995, M-Systems introduced the first flash-based solid-state drives. SSDs use non-volatile solid state memory like NAND flash or DRAM to store data without moving parts, distinguishing them from traditional hard disk drives. SSDs have significant performance advantages over HDDs with faster access times and read/write speeds, higher reliability since there are no moving parts, lower power consumption, and silent operation. However, SSDs currently have higher costs and offer less storage capacity than HDDs.
Here is a slide on Random Access Memory, slide consists of detailed presentation on primary Memory,types and history of RAM. Hope you will Enjoy the slide.
HKG15-107: ACPI Power Management on ARM64 Servers (v2)Linaro
HKG15-107: ACPI Power Management on ARM64 Servers
---------------------------------------------------
Speaker: Ashwin Chaugule
Date: February 9, 2015
---------------------------------------------------
★ Session Summary ★
Status of CPPC with runtime PM and discussion on idle PM with ACPI
--------------------------------------------------
★ Resources ★
Pathable: https://hkg15.pathable.com/meetings/250767
Video: https://www.youtube.com/watch?v=eDDgYIkUHLI
Etherpad: http://pad.linaro.org/p/hkg15-107
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2015 - #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
DDR - SDRAMs are classified into different types including SDRAM, DDR1, DDR2, DDR3, and DDR4. SDRAM synchronizes itself with the CPU timing to allow for faster memory access. DDR1 allows for higher transfer rates through double pumping of the data bus. DDR2 further increases speeds through lower power usage and internal clock running at half the external clock rate. DDR3 and DDR4 continue to improve speeds and bandwidth through higher data transfer rates and lower voltage requirements. Each new generation is not compatible with previous types due to changes in signaling and interfaces.
Computer memory, also known as RAM, is temporary storage that allows the computer to perform tasks by holding instructions and data in an easily accessible location. There are two main types of computer memory: volatile and non-volatile. Volatile memory, like RAM, loses its contents when power is removed while non-volatile types like ROM retain data without power. Over time, RAM technologies have evolved from SIMMs to DIMMs and SDRAM to DDR, DDR2, and DDR3, with each generation offering faster speeds and higher capacities. Proper identification and installation of the correct RAM type is important for system functionality and performance.
The document discusses Universal Flash Storage (UFS), which was created as a replacement for eMMC to meet increasing requirements for high bandwidth, high capacity, low power mobile storage. UFS uses a serial interface that builds on standards like SCSI, MIPI UniPro and M-PHY. It offers significantly higher performance than eMMC along with improved power efficiency. An ideal UFS implementation requires a complete IP solution including digital IP blocks, analog PHY IP, verification IP and software/hardware validation tools.
Solid-state drives (SSDs) are emerging as the storage technology of the future. SSDs use electronic circuits rather than mechanical components like hard disk drives to store data. They have no moving parts, faster read/write speeds, lower power consumption, and are more resistant to damage. While SSDs provide better performance than HDDs, they also have some limitations like write endurance and cost. Overall, SSDs are expected to become the basic storage component in servers and PCs due to their efficiency advantages over traditional hard drives.
This document discusses NAND flash memory, which is used in USB flash drives for portable storage. It describes how NAND flash works, including that it has a controller that sends commands serially to program and read the flash. Issues with NAND flash include bad blocks, long access times since it is not random access, and short lifetimes due to being programmable. Technologies like wear leveling aim to extend the lifetime by distributing writes across blocks.
RAM, or Random Access Memory, is a type of data storage used in computers that is located on the motherboard and allows quick access by the processor. There are two main types of RAM: DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory). DRAM needs to be refreshed often and uses a single transistor and capacitor per bit, while SRAM does not need to be refreshed and uses an array of six transistors per bit, making it faster to access but more expensive than DRAM.
Android uses cgroups to monitor system memory usage via the Low Memory Killer daemon and to group processes for effective CPU sharing. Cgroups are used to create mount points for memory and CPU control groups. The LMK daemon uses cgroups to receive memory pressure events and kill processes as needed. Init.rc uses cgroups to create groups for real-time and background tasks and assign CPU shares. Android further groups processes by scheduling policy for scheduling priorities.
Primary storage, also known as main storage or memory, is the area in a computer in which data is stored for quick access by the computer's processor. The terms random access memory (RAM) and memory are often as synonyms for primary or main storage
Join this video course on udemy . Click here :
https://www.udemy.com/course/mastering-microcontroller-with-peripheral-driver-development/?couponCode=SLIDESHARE
Learn bare metal driver development systems using Embedded C: Writing drivers for STM32 GPIO,I2C,SPI,USART from scratch
Software/Hardware used:
In this course, the code is developed such a way that, It can be ported to any MCU you have at your hand.
If you need any help in porting these codes to different MCUs you can always reach out to me!
The course is strictly not bound to any 1 type of MCU. So, if you already have any Development board which runs with ARM-Cortex M3/M4 processor,
then I recommend you to continue using it.
But if you don’t have any Development board, then check out the below Development boards.
SPI (Serial Peripheral Interface) allows for high-speed synchronous serial communication between microcontrollers and peripheral devices. It uses three wires (MOSI, MISO, SCK) to transmit data serially from a master to a slave device. The master device generates a clock signal on SCK to synchronize data transfer. The SS pin is used to select a specific slave device when there are multiple slaves. Common applications of SPI include in-system programming of microcontrollers and communicating with sensors, memory, and other peripherals. An example shows how to use SPI to control LEDs on a slave microcontroller from a master using button inputs.
This slide provides a basic understanding of hypervisor support in ARM v8 and above processors. And these slides (intent to) give some guidelines to automotive engineers to compare and choose right solution!
This document discusses solid state drives (SSDs) as an alternative to traditional hard disk drives (HDDs). It describes SSDs as using solid state memory rather than mechanical components to store data. The document outlines SSD form factors, architecture involving flash memory, controllers, caches and host interfaces. It compares the technical aspects of SSDs and HDDs, noting SSDs advantages as faster speeds, reliability and lower power use, while their main disadvantage is higher costs. The document concludes SSDs will likely replace HDDs in most applications due to their performance benefits.
Serial peripheral Interface - Embedded System ProtocolAditya Porwal
Serial Peripheral Interface (SPI) is a synchronous serial data protocol used by micro-controllers for communicating with one or more peripheral devices quickly over short distances. It can also be used for communication between two micro-controllers.
This document provides an overview of different types of storage technologies including RAM, ROM, magnetic storage, optical storage, solid-state storage, and cloud storage. It explains what each type is, how it works, and key details about its uses and capabilities. RAM is described as temporary memory that allows quick access to data for processing while storage devices like hard drives, optical discs, flash memory, and cloud servers provide more permanent storage of large amounts of data that can be accessed from different devices using internet connectivity. The document outlines the advantages and disadvantages of various storage options.
THIS SLIDE INCLUDES DEFINITION AND USE OF 4 COMPUTER MEMORY. THIS IS FOR ACADEMIC STUDY WHICH DESCRIBES ABOUT TYPES, ADVANTAGES, AND DISADVANTAGES OF MEMORY
PCIe is a standard expansion card interface introduced in 2004 to replace PCI and PCI-X. It uses serial instead of parallel communication and is scalable, allowing for higher maximum system bandwidth. The presentation discusses the history of expansion card standards leading to PCIe, including ISA, EISA, VESA, PCI, and PCI-X. It also covers key aspects of PCIe such as the root complex, endpoints, switches, lanes, bus:device.function notation, enumeration, and address spaces such as configuration space.
This document provides information on different types of computer memory, including ROM and RAM. It discusses the main characteristics and uses of ROM types like PROM, EPROM, and EEPROM (including EAROM and flash memory). It also covers the basics of RAM like SDRAM, and specific types like SDR-SDRAM, DDR-SDRAM, and RDRAM. The document is intended to explain the differences between read-only and random access memory.
상업적 이용 및 출처없는 무단전재를 금합니다.
애자일과 애자일 테스트 소개 (테스트기본교육 3장 2절)
애자일의 스크럼, XP에 대한 기본적인 소개와 스크럼 팀 안에서 테스트 역할자로써 사용자 스토리 리뷰, 테스트 설계, 짝 테스트, 테스트 자동화 등에 대한 내용을 사례 기반으로 소개하고 있습니다.
When develpment met test(shift left testing)SangIn Choung
Sharing my thoughts and cases about co-work with test and developemnt. Two big approaches.
One is Engineering approach (
1. Early testing education
2. Test design
3. Test code guide
4. Pair-testing, programming
5. Test-Automation),
Second is Strategic activities (
1. Test Strategy/Plan
2. Test analysis/report)
Also, I wanted to mention tester's various career paths.
Thank you.
글로벌 향 서비스 구축 시, 네이버 클라우드 플랫폼에서 사용할 수 있는 서비스들과 인프라단에서 고려해야 할 사항들에 대해서 자세히 소개해 드립니다 | Let me introduce you in detail the services available on the Naver cloud platform and what the infrastructure needs to consider when building a global service.
The document discusses various machine learning clustering algorithms like K-means clustering, DBSCAN, and EM clustering. It also discusses neural network architectures like LSTM, bi-LSTM, and convolutional neural networks. Finally, it presents results from evaluating different chatbot models on various metrics like validation score.
The document discusses challenges with using reinforcement learning for robotics. While simulations allow fast training of agents, there is often a "reality gap" when transferring learning to real robots. Other approaches like imitation learning and self-supervised learning can be safer alternatives that don't require trial-and-error. To better apply reinforcement learning, robots may need model-based approaches that learn forward models of the world, as well as techniques like active localization that allow robots to gather targeted information through interactive perception. Closing the reality gap will require finding ways to better match simulations to reality or allow robots to learn from real-world experiences.
[243] Deep Learning to help student’s Deep LearningNAVER D2
This document describes research on using deep learning to predict student performance in massive open online courses (MOOCs). It introduces GritNet, a model that takes raw student activity data as input and predicts outcomes like course graduation without feature engineering. GritNet outperforms baselines by more than 5% in predicting graduation. The document also describes how GritNet can be adapted in an unsupervised way to new courses using pseudo-labels, improving predictions in the first few weeks. Overall, GritNet is presented as the state-of-the-art for student prediction and can be transferred across courses without labels.
[234]Fast & Accurate Data Annotation Pipeline for AI applicationsNAVER D2
This document provides a summary of new datasets and papers related to computer vision tasks including object detection, image matting, person pose estimation, pedestrian detection, and person instance segmentation. A total of 8 papers and their associated datasets are listed with brief descriptions of the core contributions or techniques developed in each.
[226]NAVER 광고 deep click prediction: 모델링부터 서빙까지NAVER D2
This document presents a formula for calculating the loss function J(θ) in machine learning models. The formula averages the negative log likelihood of the predicted probabilities being correct over all samples S, and includes a regularization term λ that penalizes predicted embeddings being dissimilar from actual embeddings. It also defines the cosine similarity term used in the regularization.
[214] Ai Serving Platform: 하루 수 억 건의 인퍼런스를 처리하기 위한 고군분투기NAVER D2
The document discusses running a TensorFlow Serving (TFS) container using Docker. It shows commands to:
1. Pull the TFS Docker image from a repository
2. Define a script to configure and run the TFS container, specifying the model path, name, and port mapping
3. Run the script to start the TFS container exposing port 13377
The document discusses linear algebra concepts including:
- Representing a system of linear equations as a matrix equation Ax = b where A is a coefficient matrix, x is a vector of unknowns, and b is a vector of constants.
- Solving for the vector x that satisfies the matrix equation using linear algebra techniques such as row reduction.
- Examples of matrix equations and their component vectors are shown.
This document describes the steps to convert a TensorFlow model to a TensorRT engine for inference. It includes steps to parse the model, optimize it, generate a runtime engine, serialize and deserialize the engine, as well as perform inference using the engine. It also provides code snippets for a PReLU plugin implementation in C++.
The document discusses machine reading comprehension (MRC) techniques for question answering (QA) systems, comparing search-based and natural language processing (NLP)-based approaches. It covers key milestones in the development of extractive QA models using NLP, from early sentence-level models to current state-of-the-art techniques like cross-attention, self-attention, and transfer learning. It notes the speed and scalability benefits of combining search and reading methods for QA.
3. 동기 & 목적
• 앱 개발자들이 flash memory의 I/O 동작을 이해하면 더 빠른 앱을 개발할 수
있을 것이라고 생각했습니다.
• 성능을 측정하고 I/O 동작의 분석을 통해 원인을 설명하는 방식으로 진행됩니
다.
• 최근에 출시된 또는 곧 만나게 될 flash memory를 소개하겠습니다.
• 설명을 위한 도표는 이해를 돕기 위해 간략하게 표현하였고, 이로 인해 다소
과장된 부분이 있을 수 있습니다.
23. 주요 interface 속도
0 100 200 300 400 500 600
LTE Category 10 DL
IEEE 802.11ac
SD card class 10
eMMC 5.0
USB 3.0
UFS 2.0 HS-GEAR3
MB/s
24. UFS에서 압축 앱 성능 test
00:16
00:26
01:20
00:09
00:17
00:36
0
20
40
60
80
100
A B C
eMMC UFS
25. eMMC는 Half, UFS는 Full
UFS
READ
WRITE
storage READ
WRITE
ZIPhost ZIP
TIME
READ
WRITE
ZIP
READ
WRITE
ZIP
READ WRITEstorage READ WRITE
ZIPhost ZIP
TIME
eMMC
READ READ
ZIP
26. eMMC는 Half, UFS는 Full
UFS
READ
WRITE
storage READ
WRITE
ZIPhost ZIP
TIME
READ
WRITE
ZIP
READ
WRITE
ZIP
READ WRITEstorage READ WRITE
ZIPhost ZIP
TIME
eMMC
READ READ
ZIP
27. eMMC, UFS 전송 방식 차이점
UFS
eMMC
TIME
storage
host
TIME
storage
host
D0 D1 D2 D3
28. UFS, thread에 따른 BM 결과
0.0
2.0
4.0
6.0
8.0
1 4 8
number of thread
4KB Random Read
DDP QDP
0.0
2.0
4.0
6.0
8.0
1 4 8
number of thread
4KB Random Write
DDP QDP
35. Barrier Command
W W WWF W W F F
RAM
RAM
NAND
RAM
NAND
NAND
W W WWB W W B B
G1 G2 G3
Keep an order
RAM NAND
RAM
36. SQLite의 write request 빈도
0%
20%
40%
60%
80%
100%
web
surfing
camera facebook contacts file copy hangouts movie
player
image
viewer
music
player
YouTube video
recording
Journal Meta SQLite Normal Data
37. SQLite의 chunk size 비율
0%
20%
40%
60%
80%
100%
web
surfing
camera facebook contacts file copy hangouts movie
play
image
viewer
music
play
YouTube video
recording
4KB 8KB 12~16KB 20~32KB 36~64KB 68~512KB
41. 마치며
• 가능하면 multi-thread, flush는 필요할 때만.
• Ecosystem이 발전하면 더 빠른 I/O 환경이 구축.
• 효율적인 RAM 사용.
• 4K UHD 영상, VR 촬영으로 더 빠르고 많은 저장 공간 필요.
• 빠른 flash memory를 활용할 수 있는 앱도 있었으면...