Theory of Time 2024 (Universal Theory for Everything)
SHA 1 Algorithm
1. Message Digest Algorithm : SHA-1
Shiva Ram Dam
MSc Information System Engineering
June 12, 2019
Pokhara University
Nepal
2. Introduction
• SHA1: Secure Hash Algorithm 1
• Designed by the United States National Security Agency
• Produces hash value known as Message Digest
2June 12, 2019 SHA-1 Algorithm
3. Salient Features
• Works for any input message that is less than 264 bits
• produces160 bits length message digest
• Infeasible to retain the original message from the message digest
• Same message digest to be produced from both sender and
receiver
• Purpose: Authentication , not Encryption
• widely used in security applications and protocols, including TLS,
SSL, PGP, SSH, IPSec and S/MIME
3June 12, 2019 SHA-1 Algorithm
5. Abstract view of SHA
• Input to the SHA can be of
arbitrary length.
• Produces fixed length output
(i.e. 160 bits length)
June 12, 2019 SHA-1 Algorithm 5
SHA 1
Arbitrary Length
H(X)
160 bits
X
7. 1. Padding
Process of adding extra bits (i.e. 0
followed after a 1)
June 12, 2019 SHA-1 Algorithm 7
Padding
X (X1, X2, ….Xn)
Compression
Function
512
bits
160 bits
H(X)
160 bits
Fig: Padding of string "abc" in bits
8. 2. Appending length
• After padding, length of the
message is represented in 24
bit
• In total, the string is a multiple
of 512 bits.
June 12, 2019 SHA-1 Algorithm 8
Padding
X (X1, X2, ….Xn)
Compression
Function
512
bits
160 bits
H(X)
160 bits
Fig: Padding of string "abc" in bits, finalized by the length
of the string, which is 24 bits
9. • This 512 bits input to the
compression function
• The message divided into 16
words.
• Each word consists of 32 bits.
• 512/32 =16 words
June 12, 2019 SHA-1 Algorithm 9
Padding
X (X1, X2, ….Xn)
Compression
Function
512
bits
160 bits
H(X)
160 bits
10. 3. Initialize hash buffer
Initial values of Ho are predefined
and stored in registers ABCDE
These initial values are used in
Round 0.
June 12, 2019 SHA-1 Algorithm 10
H Hex values
Ho(A) 01234567
Ho(B) 89ABCDEF
Ho(C) FEDCBA98
Ho(D) 76543210
Ho(E) C3D2E1F0
Source:
https://www.researchgate.net/publication/238180532_An_Architecture_for_a
_SHA1_Applied_for_DSA/figures?lo=1
CF
11. 4. SHA Processing
SHA1 has 80 rounds defined.
The Message Scheduler Algorithm
schedules each word to rounds as:
• W0 Round 0
• W1 Round 1
……
• W15 Round 15
• W16 Round 16
…..
• W79 Round 79
June 12, 2019 SHA-1 Algorithm 11
Wt is
calculatedSource:
https://www.researchgate.net/publication/238180532_An_Architecture_for_a
_SHA1_Applied_for_DSA/figures?lo=1
Word assigning to rounds:
12. 4. SHA Processing (contd.)
June 12, 2019 SHA-1 Algorithm 12
Source:
https://www.researchgate.net/publication/238180532_An_Architecture_for_a
_SHA1_Applied_for_DSA/figures?lo=1
Word assigning to round 0:
13. 4. SHA Processing (contd.)
June 12, 2019 SHA-1 Algorithm 13
Source:
https://www.researchgate.net/publication/238180532_An_Architecture_for_a
_SHA1_Applied_for_DSA/figures?lo=1
Word assigning to other rounds:
For others (i.e round 16- 79)
W[t] = S1(w[t-16] XOR W[t-14] XOR W[t-8] XOR W[t-3])
For example: when round is 16,
• W[16] = S1(w[16-16] XOR W[16-14] XOR W[16-8] XOR W[16-3])
• Here W0, W2, W8 and W13 are XORed.
• The output is the new word for round 16.
14. 4. SHA Processing (contd.)
Stages Round
t=1 0 to 19
t=2 20 to 39
t=3 40 to 59
t=4 60 to 79
June 12, 2019 SHA-1 Algorithm 14
Each stage has 20 rounds.
Source:
https://www.researchgate.net/publication/238180532_An_Architecture_for_a
_SHA1_Applied_for_DSA/figures?lo=1
Division of stages:
15. 4. SHA Processing (contd.)
At each stage:
June 12, 2019 SHA-1 Algorithm 15
Stage Predefined value of k
t1 K1=0X5A827999
t2 K2= 0X6ED9EBA1
t3 K3=0X8F1BBCDC
t4 K4=0XCA62C1D6
Source:
https://www.researchgate.net/publication/238180532_An_Architecture_for_a
_SHA1_Applied_for_DSA/figures?lo=1
Constant values:
16. 4. SHA Processing (contd.)
Each round takes 3 inputs:
• 32 bit word form 512 bit block
(i.e.Wt)
• The values from register
ABCDE
• Constant Kt
June 12, 2019 SHA-1 Algorithm 16
Source:
https://www.researchgate.net/publication/238180532_An_Architecture_for_a
_SHA1_Applied_for_DSA/figures?lo=1
Process in each round:
17. 4. SHA Processing (contd.)
Stage Ft
t1 Ft(B.C,D) = (B AND C) OR ((NOT B)
AND D)
t2 Ft(B.C,D) = B XOR C XOR D
t3 Ft(B.C,D) = (B AND C) OR (B AND D)
OR (C AND D)
t4 Ft(B.C,D) = B XOR C XOR D
June 12, 2019 SHA-1 Algorithm 17
Source: https://en.wikipediaorg/wiki/SHA-1
Ft at different stages:
18. 4. SHA Processing (contd.)
June 12, 2019 SHA-1 Algorithm 18
Source: https://en.wikipediaorg/wiki/SHA-1
• Output of Ft and E are added
• Value in register A is 5 bit circular-left
shifted.
• This then added to previous sum.
• Wt is added
• Kt introduced
• B is circular-left shifted by 30 bits.
New values for next round
At each Round:
Denotes addition module 232
19. 5. The Output
June 12, 2019 SHA-1 Algorithm 19
• The 160 bit output from the final
round is modulo added to the initial
predefined values of Ho at registers
ABCDE.
• Output obtained thus is a 160 bit
hash code.
After Final Round:
InitialvaluesofHo
atABCDE
32 bits 32 bits 32 bits 32 bits 32 bits
H(X)
160 bits