2. A Energy Efficient Scheduling
Base on Dynamic Voltage and Frequency Scaling
for Multi-core Embedded Real-Time System
Xin Huang, KenLi Li, and RenFa Li
School of Computer and Communication, Hunan University, Changsha,
410082 Hunan province, P.R. China
4. DVFS
Dynamic Voltage and Frequency Scaling is a
technique in computer architecture whereby the
frequency of a microprocessor can be
automatically adjusted "on the fly," either to
conserve power or to reduce the amount of heat
generated by the chip.
Dynamic frequency scaling is commonly used in
laptops and other mobile devices, where energy
comes from a battery and thus is limited.
5. Goal : reducing power consumption
for multi-core embedded real-time
system.
Limitations : all cores must run at
the same performance level and
implemented Dynamic voltage and
frequency scaling (DVS).
6. Importance
As mobile real-time systems grow more
common, the demand for high-performance
processors will also grow.
It seems likely that in the future, the throughput
of processors will be improved mainly by
increasing the number of integrated cores.
7. What is proposed in this paper ?
a novel scheduling algorithm use Earliest
Deadline First (EDF) to guarantee meeting the
deadlines of all real time task sets for each core
and to make DVS more efficiency.Meanwhile,
they considered about leakage power as well.
8. What is EDF ?
Earliest deadline first (EDF) is a dynamic scheduling
algorithm used in real-time operating systems. It
places processes in a priority queue. Whenever a
scheduling event occurs (task finishes, new task
released, etc.) the queue will be searched for the
process closest to its deadline. This process is the
next to be scheduled for execution.
9. Utilization
The utilization ui of task τi is defined by (7). A
proportion ui of the total number of cycles of a core
will be dedicated to executing τi :
ui = wi / pi (7)
Wi =WCET(WorstCase ExecutionTime)
Pi = Predefined Period
10. Simple Power-Aware Scheduling
Initial state: both cores are switched off
Filling cores: applies when there is a ready task T
Step1: Is there any core empty?
If so, if core A is empty then launch T to core A,
otherwise launch T to core B
If not, go to step 2.
Step2: Launch T to the core less loaded,
If both cores are equally loaded then
increase frequency and launch T to core A.
Reducing frequency: applies when a task T finishes
Step3: Are both cores equally loaded?
If so, reduce frequency
11. DVS-EDF
Initial state: all cores are switched off
Loop:
Filling cores: applies when there is a ready task τi
Is there any core empty?
If so, launch τi to empty core Cempty, update Uempty
If not, Launch τi to the core has minimum Umini, update Umini
If Umini >1,Increase frequency to guarantee Umini=1,update all
the Un
Else If Umax<1, Calculate the frequency ftry which can make
Umax=1,
If ftry > fcritical, reduce frequency, update all the Un
applies when a task τf on Cf finishes, update Uf
end Loop
if we can guarantee the maximum sum of
task utilization Umax is less than one, then all
the deadlines of tasks in every cores will be
met.
12. fcritical
as shown in Fig.1, when the Vdd is lower then
0.75V, the leakage power is more then the
dynamic power consumption . it means there
should a critical frequency fcritical which make DVS
scheduling makes no energy efficiency when
reduce frequency less than it .
13.
14. What happend as result?
The DVS-EDF algorithm that proposed in this
paper can save energy more than Simple Power-
Aware Scheduling algorithm ranging from 3% to
12%.
15. Refrences
[1] Huang X, L. K. L. R. (2009). A energy efficient scheduling base on dynamic voltage and
frequency scaling for multi-core embedded real-time system.Lecture Notes in Computer
Science including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in
Bioinformatics, 5574 LNCS, 137-145.
[2]Chen, J.-J., & Kuo, C.-F. (2007). Energy-Efficient Scheduling for Real-Time Systems on
DynamicVoltage Scaling (DVS) Platforms. 13th IEEE International Conference on Embedded and
RealTimeComputing Systems and Applications RTCSA 2007, 0(Rtcsa), 28-38. Ieee.
[3]A. Mohsen and R. Hofmann, "Near Optimal and Energy-Efficient Scheduling for Hard Real-
Time Embedded Systems", in Proc. EUC, 2005, pp.234-244.
Fig.1 [1]
Editor's Notes
تکنیک تغییر ولتاژ و فرکانس در حالت انجام به کار برای کاهش مصرف توان
گسترش سیستم های قابل حمل بلادرنگدر آینده افزایش بازدهی پردازنده ها عمدتا با افزایش تعداد هسته ها امکان پذیر خواهد بود
در این مقاله چه پیشنهاداتی ارائه شده ؟یک الگوریتم زمانبندی جدید مبنتی بر EDF که انجام TASK های RealTime رو در deadline مشخص شده تضمین می کنه.بعلاوه توان نشتی هم در نظر گرفته شده.
یک الگوریتم زمانبندی پویا که پروسس ها را در یک صف اولویت قرار می دهد و با اتمام تسک قبلی و ورود هر تسک جدید و صف برای یافتن پروسس با نزدیکترین ددلاین جستجو می شود.