Challenges in Physical Modeling for Adaptation of Cyber-Physical Systems
AADL Overview: Brief Introduction to Architecture Analysis and Design Language
1. *
AADL Overview
Brief and Pointless
Ivan Ruchkin
November 12, 2012
1
*Architecture Analysis and Design Language
2. Agenda
● Intro
● Elements
– Components
– Ports
– Connections
● Special features
– Modes
– Flows
2
– Annexes
3. Definition
● What it is:
– (Systems Engineering) A high-level system
specification language, specialized on real-
time and embedded systems.
– (Architecture Description) an ADL for the
domain of avionics and automotive.
● What is it not:
– Not UML
– Not programming language
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4. Use of AADL
● Capture topology of architecture + properties
– Specific to embedded real-time systems
● Generate code
– C, Simulink, UML
● Do analysis
– For example, end-to-end latency
– May extend with annexes
– Tools not included into AADL
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5. Timeline
● 2004: the Society of Automotive Engineers
(SAE) released AADL v1.0.
– 4 annexes
● 2009: AADL v2.0.
– Several major additions and improvements, +3
annexes
● 09/2012: AADL v2.1.
– Minor fixes, +3 annexes
* This presentation considers 1.0 5
8. Component Base Types 1 of 2
● Software (“application”):
– Thread – a unit of execution
– Process – a unit of protected address space
– Thread group – a logical grouping of threads
– Data – a unit of information
– Subprogram – a callable unit of code
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9. Component Base Types 2 of 2
● Hardware (“execution platform”):
– Processor – an executer for threads
– Memory – a binary data storage
– Device – a component that interfaces with
external environment (transducer)
– Bus – a communication channel
● Composite
– System – a composite component
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10. Separation of Type and Impl
● Component type: externally visible
– Extends
– Features
– Flows
– Properties
● Component impl: externally invisible
– Extends, refines
– Subcomponents, calls, connections
– Flows
– Modes
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– Properties
11. Example: Component (text)
process control_processing
features
input: in data port sensor_data;
output: out data port command_data;
end control_processing;
process implementation control_processing.speed_control
subcomponents
control_input: thread control_in.input_processing_01;
control_output: thread control_out.output_processing_01;
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end control_processing.speed_control;
15. Ports
● Data ports
– Typed state data, no queuing
● Event ports
– Event data, may be queued
● Both: event data ports
– Typed data and event with queuing.
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16. Connectors (conceptually)
● Port dataflow
● Shared data access (data or bus)
● Subprogram call
– By value
– By reference
– Global
* Not first-class elements, unlike e.g. ports
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17. Binding
● For a model to be complete:
– Each thread bound to processor
– Each process, data, and port bound to
memory
– Each interprocessor communication is bound
to bus
– …
● No language primitives to bind
– Assuming it is done automatically
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18. Modes
● State of a component
● Part of the component's state machine
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20. Flows
● An abstract information path from the source
to the sink
● Directional
● Type contains source, sink, and path
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21. Annexes
● Language extensions (not libraries of types!)
● Needs to be approved
● Currently around 10:
– Notation annexes (graphical, XML)
– Error model annex
– Behavior annex
– ...
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22. Summary for the Language
● Separation of software and hardware
● Separation of type and implementation
● Specific semantics: properties and constraints
● Special features: modes, flows
● Generation to code, Simulink, UML
● Analysis tools - standalone
● Analogy to views: implementations
– Unified through shared types 22
23. References
● P. Feiler, D. Gluch, J. Hudak, B. Lewis.
Embedded System Architecture Analysis
Using SAE AADL. CMU/SEI-2004-TN-005.
June 2004.
● P. Feiler, D. Gluch, J. Hudak. The
Architecture Analysis & Design Language
(AADL): An Introduction. CMU/SEI-2006-
TN-011. February 2006.
● P. Feiler, J. Hudak. Developing AADL Models
for Control Systems: A Practitioner’s Guide. 23
CMU/SEI-2006-TR-019. October 2006.