This document discusses Jasper's formal verification solutions for ARM processor-based system-on-chip (SoC) designs. It describes how Jasper can be used at the IP level to verify ARM Cortex processors and at the system level to verify aspects of full SoCs such as protocol verification, deadlock detection, and connectivity verification. Customers mentioned include Ericsson, Apple, Sony, and AMCC.
A comprehensive formal verification solution for ARM based SOC design
1. A Comprehensive Formal Verification
Solution for ARM® Processor Based SoC
Design
Laurent Arditi, PhD – ARM Formal Verification Expert
Ziyad Hanna, PhD – Jasper VP of Research & Chief Architect
May 2, 2012
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