1. AMOL T. BAREWAR.
M. Tech ( 1st sem).
ID no.=120151

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3. Introduction of a processor
 Before discussing about i3 processor, let a small
introduction of processor.
 A processor is the logic circuitry that responds to and
processes the basic instructions that drive a computer.
 The term processor has generally replaced the term
central processing unit (CPU). The processor in a personal
computer or embedded in small devices is often called a
microprocessor.
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4. Brief introduction about i3 processor
 The only question I have is if there's any advantage to
using a Core i3 over a Core2Duo.
 The Core i3 is a 3.2 GHz dual core chip, and it's quite a big
improvement over the Core2Duo. It's a good 700 MHz
faster, much faster bus with significantly faster RAM.
 The first Core i3 processors were launched on January 7,
2010.
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5. the single core
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6. Multi-core CPU chip
The cores fit on a single processor socket .Also called CMP
(Chip Multi-Processor
Task level and Tread level parallelism.
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8. Some features of i3
Intel® Hyper-Threading Technology (Intel® HT Technology).
Intel® Virtualization Technology (Intel® VT).
Intel® Smart Cache.
Intel Smart Memory Access.
Execute Disable Bit.
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9. Intel Hyper-Threading Technology
Single core can run multiple thread.
Simultaneous multi threading.
Increase throughput and efficiency.
Turbo Bust Technology.
Thermal Design Power(TDP)
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10. L1 D-Cache D-TLB
L2 Cache and Control
Integer Floating Point
Schedulers
Uop queues
Rename/Alloc
BTB Trace Cache uCode ROM
Decoder This scenario is
impossible with SMT
Bus
BTB and I-TLB
on a single core
Thread 1 Thread 2 (assuming a single
IMPOSSIBLE integer unit)10

11. L1 D-Cache D-TLB L1 D-Cache D-TLB
Integer Floating Point Integer Floating Point
L2 Cache and Control
L2 Cache and Control
Schedulers Schedulers
Uop queues Uop queues
Rename/Alloc Rename/Alloc
BTB Trace Cache uCode BTB Trace Cache uCode
ROM ROM
Decoder Decoder
Bus
Bus
BTB and I-TLB BTB and I-TLB
Thread 1 Thread 3 Thread 2 11
Thread 4

12. Speeding up the transfer of platform control between the guest
operating systems (OSs) and the virtual machine manager
(VMM)/hypervisor.
Enabling the VMM to uniquely assign I/O devices to guest OSs
Optimizing the network for virtualization with adapter-based
acceleration
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13. Server Virtualization
Intel® VT Flex Priority
Intel® VT Flex Migration
Desktop Virtualization
Types of Hypervisor
Type 1: oracle VM server for SPARC
Type2:VMWare workstation , Virtual Box
Its also provide help to run 32bit O.S. on 64 bit
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15. Smart Cache is a level 2 or level 3 cache method for multiple
execution cores invented by Intel.
It shares the cache among cores
It decrease the cache miss rate.
It provide peak transfer rate of 96GB/sec .
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17. Improve the performance.
It aim to locate data as close as possible to reduce memory
latency time.
It also include Memory disambiguation.
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19. Malicious buffer overflow attacks pose a significant security
threat to businesses.
These attacks cost businesses precious productivity time, which
can equal significant financial loss.
It allows the processor to classify where application code can execut
and where it cannot in the memory.
When a malicious worm attempts to insert code in the buffer,
the processor disables code execution.
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20. REFERENCES
http://www.intel.com/content/www/us/en/processors/core/core-i3-processor.html
http://www.intel.com/products/processor/corei3/specifications.htm
http://www.intel.com/technology/xdbit/index.htm
http://en.wikipedia.org/wiki/Hypervisor
http://en.wikipedia.org/wiki/Memory_disambiguation
http://www.realworldtech.com/merom/9/
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