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1TMT H E A R C H I T E C T U R E F O R T H E D I G I T A L W O R L D
The ARM Processor
2TM 239v10 The ARM Architecture
Submitted by –
Pradipta Roy
Sidhartha Rajak
Santanu Mondal
3TM 339v10 The ARM Architecture
 ARM – Acorn RISC Machine/Advanced RISC Machine
 Family – RISC (Reduced Instruction Set Computing)
 Designer – ARM Holdings.
4TM 439v10 The ARM Architecture
History
 Invention Year – 1980
 First Processor – BBC Micro Series
 Personal Use for Acorm Computer -> Business Market
 Acrom Computers -> ARM Ltd.
5TM 539v10 The ARM Architecture
RISC
 RISC - Reduced Instruction Set Computing.
 A reduced instruction set computer is a computer which
only use simple instructions that can be divide into
multiple instructions which perform low-level operation
within single clock cycle, as its name suggest “REDUCED
INSTRUCTION SET”
6TM 639v10 The ARM Architecture
RISC
 RISC - Reduced Instruction Set Computing.
Let we take an example of multiplying two numbers
A = A * B; <<<======this is C statement
LOAD R1, A <<<======this is assembly statement
LOAD R2,B <<<======this is assembly statement
PROD A, B <<<======this is assembly statement
STORE R3, A <<<======this is assembly statement
7TM 739v10 The ARM Architecture
RISC
 RISC – Advantages.
•Each instruction requires only one clock cycle to execute,
the entire program will execute in approximately the same
amount of time as the multi-cycle “MULT” command.
•These RISC “reduced instructions” require less transistors
of hardware space than the complex instructions, leaving more
room for general purpose registers. Because all of the
instructions execute in a uniform amount of time (i.e. one
clock)
•Pipelining is possible.
•Less Transistor = Reduced cost,low Heat & Power consumption.
8TM 839v10 The ARM Architecture
ARM Powered Products
9TM 939v10 The ARM Architecture
ARM Partnership Model
10TM 1039v10 The ARM Architecture
Licence
 Perpetual (Implementation) License.
 Term License .
 Per Use License.
11TM 1139v10 The ARM Architecture
Data Sizes and Instruction Sets
 The ARM is a 32-bit architecture.
 When used in relation to the ARM:
 Byte means 8 bits
 Halfword means 16 bits (two bytes)
 Word means 32 bits (four bytes)
 Most ARM’s implement two instruction sets
 32-bit ARM Instruction Set
 16-bit Thumb Instruction Set
 Jazelle cores can also execute Java bytecode
12TM 1239v10 The ARM Architecture
Processor Modes
 The ARM has seven basic operating modes:
 User : unprivileged mode under which most tasks run
 FIQ : entered when a high priority (fast) interrupt is raised
 IRQ : entered when a low priority (normal) interrupt is raised
 Supervisor : entered on reset and when a Software Interrupt
instruction is executed
 Abort : used to handle memory access violations
 Undef : used to handle undefined instructions
 System : privileged mode using the same registers as user mode
13TM 1339v10 The ARM Architecture
The Registers
 ARM has 37 registers all of which are 32-bits long.
 1 dedicated program counter
 1 dedicated current program status register
 5 dedicated saved program status registers
 30 general purpose registers
14TM 1439v10 The ARM Architecture
Data processing Instructions
 Consist of :
 Arithmetic: ADD ADC SUB SBC RSB RSC
 Logical: AND ORR EOR BIC
 Comparisons: CMP CMN TST TEQ
 Data movement: MOV MVN
 These instructions only work on registers, NOT memory.
15TM 1539v10 The ARM Architecture
Marketing
 2005 – 90% Mobile Phone Processor Was ARM.
 2010 – 95% Smart Phone, 35% Digital Television & Set-top Boxes.
 2011 – Most Widely Used Arc. (32bit) in all Mobile phone & ES.
 2013 – 10 Billion(1000 Crore) ARM Based Devices Produced.
 2015 – 47 Billion (4700 Crore) ARM Based Chip Produced.
16TM 1639v10 The ARM Architecture
64-bit ARM
 2012 – ARM Cortex A53 & A57.
 2013 – Apple Developed First 64-bit Smartphone iPhone 5S(ARM v8) .
 2014 – Google Nexus 9 (NVDIA TEGRA KI Processor).
 2015 – Lenovo P90 (Intel 64-bit Atom).
17TM 1739v10 The ARM Architecture
OS Support
 First 32-bit ARM Based Processor – Arthur OS
18TM 1839v10 The ARM Architecture
Embedded OS
19TM 1939v10 The ARM Architecture
Android & iOS
20TM 2039v10 The ARM Architecture
XL & Lumia OS
21TM 2139v10 The ARM Architecture
BlackBerry OS
22TM 2239v10 The ARM Architecture
Ubuntu Touch OS
23TM 2339v10 The ARM Architecture
Symbeian OS
24TM 2439v10 The ARM Architecture
Desktop OS Debian
25TM 2539v10 The ARM Architecture
Desktop OS - FreeBSD
26TM 2639v10 The ARM Architecture
Desktop OS - Fedora
27TM 2739v10 The ARM Architecture
Desktop OS - Open Suse
ARM Architecture Explained

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ARM Architecture Explained

  • 1. 1TMT H E A R C H I T E C T U R E F O R T H E D I G I T A L W O R L D The ARM Processor
  • 2. 2TM 239v10 The ARM Architecture Submitted by – Pradipta Roy Sidhartha Rajak Santanu Mondal
  • 3. 3TM 339v10 The ARM Architecture  ARM – Acorn RISC Machine/Advanced RISC Machine  Family – RISC (Reduced Instruction Set Computing)  Designer – ARM Holdings.
  • 4. 4TM 439v10 The ARM Architecture History  Invention Year – 1980  First Processor – BBC Micro Series  Personal Use for Acorm Computer -> Business Market  Acrom Computers -> ARM Ltd.
  • 5. 5TM 539v10 The ARM Architecture RISC  RISC - Reduced Instruction Set Computing.  A reduced instruction set computer is a computer which only use simple instructions that can be divide into multiple instructions which perform low-level operation within single clock cycle, as its name suggest “REDUCED INSTRUCTION SET”
  • 6. 6TM 639v10 The ARM Architecture RISC  RISC - Reduced Instruction Set Computing. Let we take an example of multiplying two numbers A = A * B; <<<======this is C statement LOAD R1, A <<<======this is assembly statement LOAD R2,B <<<======this is assembly statement PROD A, B <<<======this is assembly statement STORE R3, A <<<======this is assembly statement
  • 7. 7TM 739v10 The ARM Architecture RISC  RISC – Advantages. •Each instruction requires only one clock cycle to execute, the entire program will execute in approximately the same amount of time as the multi-cycle “MULT” command. •These RISC “reduced instructions” require less transistors of hardware space than the complex instructions, leaving more room for general purpose registers. Because all of the instructions execute in a uniform amount of time (i.e. one clock) •Pipelining is possible. •Less Transistor = Reduced cost,low Heat & Power consumption.
  • 8. 8TM 839v10 The ARM Architecture ARM Powered Products
  • 9. 9TM 939v10 The ARM Architecture ARM Partnership Model
  • 10. 10TM 1039v10 The ARM Architecture Licence  Perpetual (Implementation) License.  Term License .  Per Use License.
  • 11. 11TM 1139v10 The ARM Architecture Data Sizes and Instruction Sets  The ARM is a 32-bit architecture.  When used in relation to the ARM:  Byte means 8 bits  Halfword means 16 bits (two bytes)  Word means 32 bits (four bytes)  Most ARM’s implement two instruction sets  32-bit ARM Instruction Set  16-bit Thumb Instruction Set  Jazelle cores can also execute Java bytecode
  • 12. 12TM 1239v10 The ARM Architecture Processor Modes  The ARM has seven basic operating modes:  User : unprivileged mode under which most tasks run  FIQ : entered when a high priority (fast) interrupt is raised  IRQ : entered when a low priority (normal) interrupt is raised  Supervisor : entered on reset and when a Software Interrupt instruction is executed  Abort : used to handle memory access violations  Undef : used to handle undefined instructions  System : privileged mode using the same registers as user mode
  • 13. 13TM 1339v10 The ARM Architecture The Registers  ARM has 37 registers all of which are 32-bits long.  1 dedicated program counter  1 dedicated current program status register  5 dedicated saved program status registers  30 general purpose registers
  • 14. 14TM 1439v10 The ARM Architecture Data processing Instructions  Consist of :  Arithmetic: ADD ADC SUB SBC RSB RSC  Logical: AND ORR EOR BIC  Comparisons: CMP CMN TST TEQ  Data movement: MOV MVN  These instructions only work on registers, NOT memory.
  • 15. 15TM 1539v10 The ARM Architecture Marketing  2005 – 90% Mobile Phone Processor Was ARM.  2010 – 95% Smart Phone, 35% Digital Television & Set-top Boxes.  2011 – Most Widely Used Arc. (32bit) in all Mobile phone & ES.  2013 – 10 Billion(1000 Crore) ARM Based Devices Produced.  2015 – 47 Billion (4700 Crore) ARM Based Chip Produced.
  • 16. 16TM 1639v10 The ARM Architecture 64-bit ARM  2012 – ARM Cortex A53 & A57.  2013 – Apple Developed First 64-bit Smartphone iPhone 5S(ARM v8) .  2014 – Google Nexus 9 (NVDIA TEGRA KI Processor).  2015 – Lenovo P90 (Intel 64-bit Atom).
  • 17. 17TM 1739v10 The ARM Architecture OS Support  First 32-bit ARM Based Processor – Arthur OS
  • 18. 18TM 1839v10 The ARM Architecture Embedded OS
  • 19. 19TM 1939v10 The ARM Architecture Android & iOS
  • 20. 20TM 2039v10 The ARM Architecture XL & Lumia OS
  • 21. 21TM 2139v10 The ARM Architecture BlackBerry OS
  • 22. 22TM 2239v10 The ARM Architecture Ubuntu Touch OS
  • 23. 23TM 2339v10 The ARM Architecture Symbeian OS
  • 24. 24TM 2439v10 The ARM Architecture Desktop OS Debian
  • 25. 25TM 2539v10 The ARM Architecture Desktop OS - FreeBSD
  • 26. 26TM 2639v10 The ARM Architecture Desktop OS - Fedora
  • 27. 27TM 2739v10 The ARM Architecture Desktop OS - Open Suse