SPICE MODEL of NJU7109 in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

1. Device Modeling Report
COMPONENTS : VOLTAGE COMPARATOR (CMOS)
PART NUMBER : NJU7109
MANUFACTURER : NEW JAPAN RADIO
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

2. MODEL PARAMETER
Pspice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Modility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

3. Output Low Voltage
Simulation result
500mV
Simulation
250mV
0V
0s 0.5us 1.0us
V(Vol)
Time
Evaluation Circuit
U1
IN- VDD
-
VSS
+
IN+ OUT Vol
V2
NJU7109
V1 I1 3
1
5m
0
Comparison Table
IOL=5mA Measurement Simulation %Error
VOL (V) 0.3 0.295854 -1.382
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

4. Output High Voltage
Simulation result
5.0V
Simulation
2.5V
0V
0s 0.5us 1.0us
V(Voh)
Time
Evaluation Circuit
U2
IN- VDD
-
VSS
+
IN+ OUT Voh
V4
NJU7109
V3 I2 3
1
5m
0
Comparison Table
IOH=-5mA Measurement Simulation %Error
VOH (V) 2.7 2.7027 0.1
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

5. Input Bias Current and Input Offset Current Characteristics
Simulation result
3.0pA
Ib
2.0pA
Ios
1.0pA
0A
50us 100us 150us 200us
(I(V1)+I(V2))/2 I(V1)- I(V2)
Time
Evaluation Circuit
U1
IN- VDD
-
VSS
+
IN+ OUT OUTPUT
V2 V3
NJU7109
V1
0 3
0
0
Comparison Table
Measurement Simulation %Error
Ib (pA) 1 0.9995 -0.050
Ios(pA) 1 1.0007 0.070
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

6. Input Offset Voltage Characteristics
Simulation result
3.0V
Simulation
2.0V
1.0V
0V
0V 5mV 10mV 15mV
V(OUTPUT)
V_V1
Evaluation Circuit
U1
IN- VDD
-
VSS
+
IN+ OUT OUTPUT
V2
NJU7109
V1
0 3
0
Comparison Table
Measurement Simulation %Error
VIO (mV) 7 6.8955 -1.493
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

7. Propagation Delay Time and Response Time
Simulation result
5.0V 100mV
1 2
2.5V 0V
Simulation
>>
0V -100mV
0s 50us 100us
1 V(OUTPUT) 2 V(U1:IN+)
Time
Evaluation Circuit
U1
IN- VDD
-
VSS
+
IN+ OUT OUTPUT
V3
NJU7109
V1 V1 = -100m
V2 = 100m C1 3
TD = 10u
TR = 5n 15p
TF = 5n
PW = 50u
PER = 100u
0
Comparison Table
Over drive=100mV Measurement Simulation %Error
tPLH (ns) 110 105.336 -4.240
tPHL (ns) 70 73.241 4.630
tTLH (ns) 7 7.2568 3.669
tTHL (ns) 6 5.9453 -0.912
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005