LABS OF digital logic and design

1. ASSIGNMENT : DIGITAL LOGIC AND DESIGN
SUBMITTED TO : MS SUFIA RAJPUT
SUBMITTED BY : PADAM RAI
ROLL NO : F-16CS-36

2. PRACTICAL NO # 01
Object : To verify truth tables of AND, OR, NOT, NAND, NOR, XOR and XNOR
logical gates.
Tools:-
Circuit maker
Theory:-
AND gate:-
The AND gate, is composed oftwo or more inputs and a single output, performs logical multiplication. The
logical operation ofthe AND gate is such that the output is HIGH (1) when all the inputs are HIGH,
otherwise it is LOW (0)
LogicSymbolforANDgate
Truth tableforAND gate
The OR gate:-
The OR gate, is composed oftwo or more inputs and a single output, performs logical addition. The logical
operation ofthe OR gate is such that the output is HIGH (1) when any ofthe inputs are HIGH, otherwise it
is LOW (0).
Symbol:-
INPUT OUTPUT
A B X=A.B
0 0 0
0 1 0
1 0 0
1 1 1

3. Truth tablefor ORgate
The NAND Gate:-
The term NAND is formed by the concatenation NOT-AND and implies an AND function with an inverted
output.. The logical operation ofthe NAND gate is such that the output is LOW (0) only when all the inputs
are HIGH (1)
Symbol:-
Truth tablefor ORgate:-
INPUT OUTPUT
A B
0 0 0
0 1 1
1 0 1
1 1 1
INPUT OUTPUT
A B
0 0 1
0 1 1
1 0 1
1 1 0

4. The NOR gate:-
The term NOR is formed by the concatenation NOT-OR and implies an OR function with an inverted output.
The logical operation ofthe NOR gate is such that the output is HIGH (1) only when all the inputs are LOW.
Symbol:-
Truth tablefor NORgate:-
The X-OR GATE:-
The logical operation ofthe XOR gate is such that the output is HIGH (1) only when two inputs are different
not same.
Symbol:-
X
Truth tablefor X-ORgate:-
INPUT OUTPUT
A B
0 0 1
0 1 0
1 0 0
1 1 0

5. The X-NOR Gate:-
The logical operation ofthe X-NOR gate is such that the output is HIGH (1) only when two inputs are same.
Symbol:-
Truth tablefor X-NORgate:-
TheINVERTORGATE:-
The outputis the complimentof itsinputslike inputis1 thenoutputis0 andvise versa.
Symbol:-
Truth tablefor INVERTOR gate:-
INPUT OUTPUT
A B X
0 0 0
0 1 1
1 0 1
1 1 0
INPUT OUTPUT
A B X
0 0 1
0 1 0
1 0 0
1 1 0

6. INPUT OUTPUT
A A’
1 0
0 1
Procedure:
Step1:Open the environmentof circuit maker.
Step2:On the menu bar click hotkeys1>& select one the following options for all
four gates.
Step3:On the menu bar click hotkeys1>& select logic display for output.
Step4:On the menu bar click hotkeys2>& select logic switch for two inputs.
Step5: select button for connecting inputs to the gates and also for output.
Step6: select one key for execution.
Step7:give differentinputs to note output.
Options are givenbelow:
1=2-In AND 74LS08 (AND)
2=2-In OR 74LS32(OR)
3=2-In NAND 74LS00 (NAND)
4=2-In NOR 74LS02 (NOR)
5=2-In XOR 74CS86 (XOR)
6=2-In XNOR 4077 (XNOR)
7=2-In Invertor 74cs04
RESULT:
Circuit for AND:
Circuit for OR:
Circuit for NAND:
5V
5V
5V
5V

7. Circuit for NOR:
Circuit for XOR:
Circuit for X-NOR:
Circuit for Invertor:
0V
0V
0V
0V
U1A
V1
0V
V2
5V
L1
V3
0V
L2
U2A

8. PracticalNO # 02
Object:-
Prove rules of BooleanAlgebra forand OR and NOT operations:
Tools:-
Circuit maker
Theory:-
Boolean Algebra:
A mathematical system for formulating logical statements with symbols so that problems can be solved
in a manner to ordinary algebra.
AND Operations (·)
0·0 = 0 A·0 = 0
1·0 = 0 A·1 = A
0·1 = 0 A·A = A
1·1 = 1 A·A' = 0
OR Operations (+)
0+0 = 0 A+0 = A
1+0 = 1 A+1 = 1
0+1 = 1 A+A = A
1+1 = 1 A+A' = 1
NOT Operations (')
0' = 1 1’ = 0 A'' = A
Procedure:

9. Step1: Openthe environmentof circuitmaker.
Step2: On the menubarclickhotkeys1>&selectone the followingselectAND,OR& NOT gate
Step3:- On the menubarclickhotkeys1>&selectlogic displayfor output
Step4:- On the menubarclickhotkeys2>&selectlogic switchfortwo inputs
Step 5:- select buttonfor connectinginputstothe gates and alsofor output
Step 6:- select onekey for execution
Step7 :- give different inputsto noteoutput.
RESULT:-
Circuit ofAND:-
Circuit for OR:-
Circuit for NOT:-
V8
5V
V7
5V
V6
5V
V5
0V
U1B
U1A
L4
L3
V8
5V
V7
0V
V6
5V
V5
5V
U1D
U1C
L4
L3
0V 5V
V8
0V
V7
0V
V6
5V
V5
0V
U1D
U1C
L4
L3
V8
0V
V7
5V
V6
0V
V5
0V
U1B
U1A
L4
L3

10. Practical NO # 03
Object :-
Prove Associative Law , Distributive Law , Commutative Law
Tools:-
Circuit maker
Theory:-
Commutative Laws
The commutative lawof multiplicationforORoperation
The commutative law ofaddition for two variables is algebraically expressed as
A + B = B + A
The commutative lawof multiplicationforANDoperation
A.B = B.A
In summary, the order in which the variables are ORed or ANDed make no difference.
Associative Laws
The associative law of addition ofthree variables is expressed as
A + (B + C) = (A + B) + C
The associative law of multiplication of three variables is expressed as
A.(B.C) = (A.B).C
In summary, ORing or ANDing a grouping ofvariables produces the same resultregardless ofthe
grouping ofthe variables.
Distributive Law
The distributive law of three variables is expressed as follows:
A. (B+C) = A.B + A.C

11. Associative Law
(A·B)·C = A·(B·C) = A·B·C
(A+B)+C = A+(B+C) = A+B+C
Distributive Law
A·(B+C) = (A·B) + (A·C)
A+(B·C) = (A+B) · (A+C)
Commutative Law
A·B = B·A
A+B = B+A
Procedure:
Step1: Openthe environmentof circuitmaker.
Step2: On the menubarclickhotkeys1>&selectlogic gates
Step3:- On the menubarclickhotkeys1>&selectlogic displayfor output
Step4:- On the menubarclickhotkeys2>&selectlogic switchfortwo inputs
Step 5:- select buttonfor connectinginputstothe gates and alsofor output
Step 6:- select onekey for execution
Step7 :- give different inputsto noteoutput.
Result:-
Construct circuits and prove Associative Law , Distributive Law , Commutative Law
1) Associative Law is Verified for
AND Gates: OR Gates:
A.(B.C) = (A.B).C A+(B+C) = (A+B)+C

12. 2) Distributive law is verified for:
AND Gates: OR Gates:
A.(B+C) = (A.B)+(A+C) A+(B . C) = (A+B).(A+C)
3) Commutative lawisverifiedfor:
ANDGate:- OR Gates:-
A . B = B . A A+B = B+A
V6
0V
V5
0V
V4
5V
V3
5V
V2
0V
V1
0V
U2D
U2C
U2B
U2A
L2
L1
V6
5V
V5
0V
V4
5V
V3
5V
V2
5V
V1
0V
L2
U2B
U1C
U1B
L1
U2A
U1A
U4A
U3A
U2D
U2C
U1D
V6
5V
V5
0V
V4
5V
V3
5V
V2
5V
V1
0V
L2
L1
V4
5V
V3
0V
V2
5V
V1
0V
U1B
U1A
L2
L1
V6
5V
V5
5V
V4
5V
V3
5V
V2
5V
V1
5V
L2
U1D
U1C
L1
U1B
U1A
V4
0V
V3
5V
V2
0V
V1
5V
U1B
L2
L1
U1A