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NYPHO P. PAREÑO
nypho43481@gmail.com
Manila, Philippines
+63 977 1394 088 / 044 760 5008
Summary
FPGA design engineer with in-depth knowledge and solid
background in logic and RTL hardware design, and FPGA architecture.
Experience
FPGA Test Development Engineer
October 2012 – Present
Lattice Semiconductor – Philippines
Northgate Cyberpark
Alabang, Muntinlupa, Philippines
 Develop high quality tests plans for programmable logic products
 Implement efficient manufacturing tests to be executed in an ATE
environment
 Verify test patter functionality and fault coverage through pre-silicon
simulation
 Validate test patterns on ATE to ensure delivery of robust tests
 Drive coverage closure to reach product test quality objectives
 Document device or SW issues that affect product testability
 Debug test patterns to understand and improve yield
Science Research Specialist
June 2009 – Oct 2012
Philippines eScience Grid Project
Microelectronics/Research and Development Division
Advanced Science and Technology Institute
Department of Science and Technology
UP Diliman, Quezon City, Philippines
 Built applications using reconfigurable hardware technology that ran
on Philippine Computing Grid
 Mapped algorithms to FPGA design
 Interfaced FPGA design with software frontend
 Implement high performance logic design for Ray-Triangle
Intersection Algorithm for Ray-Tracing in Image Rendering in Xilinx
FPGA board
On-the-job Training – Test Engineer
April-May 2007
Dallas Semiconductor Division
Maxim Philippines Operating Company
Gateway Business Park, Special Export Processing Zone,
General Trias, Cavite, Philippines
 Support and analysed device testing to improve yield of
semiconductor products
Skills / Area of Expertise
In-depth knowledge in FPGA field
Strong board level debugging skills
Software and Hardware interfacing
RTL hardware design and implementation
FPGA Test Development and Debugging
Test Integration and Debugging
Programming Languages and scripting:
VHDL
Verilog
C/C++
Perl
Software Tools
Lattice Design Tools (Diamond)
Xilinx Design Tools (ISE)
Synopsis Synplify
Active HDL
Hardware Lab Equipment
Mix-signal digital oscilloscopes
Logic Analyzers
Has in-depth understanding and experience in:
Lattice Semiconductor programmable logic products
FPGA test development and debugging
Xilinx FPGA
Reconfigurable Computing
High Performance Computing
Simultaneous Switching Output
Achievements
Mindanao State University – Iligan Institute of Technology
BS in Electronics and Communications Engineering
Graduated May 2008
Licensed Electronics and Communications Engineer
October 2008, Philippines

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NyphoPareno-FPGA Engineer

  • 1. NYPHO P. PAREÑO nypho43481@gmail.com Manila, Philippines +63 977 1394 088 / 044 760 5008 Summary FPGA design engineer with in-depth knowledge and solid background in logic and RTL hardware design, and FPGA architecture. Experience FPGA Test Development Engineer October 2012 – Present Lattice Semiconductor – Philippines Northgate Cyberpark Alabang, Muntinlupa, Philippines  Develop high quality tests plans for programmable logic products  Implement efficient manufacturing tests to be executed in an ATE environment  Verify test patter functionality and fault coverage through pre-silicon simulation  Validate test patterns on ATE to ensure delivery of robust tests  Drive coverage closure to reach product test quality objectives  Document device or SW issues that affect product testability  Debug test patterns to understand and improve yield
  • 2. Science Research Specialist June 2009 – Oct 2012 Philippines eScience Grid Project Microelectronics/Research and Development Division Advanced Science and Technology Institute Department of Science and Technology UP Diliman, Quezon City, Philippines  Built applications using reconfigurable hardware technology that ran on Philippine Computing Grid  Mapped algorithms to FPGA design  Interfaced FPGA design with software frontend  Implement high performance logic design for Ray-Triangle Intersection Algorithm for Ray-Tracing in Image Rendering in Xilinx FPGA board On-the-job Training – Test Engineer April-May 2007 Dallas Semiconductor Division Maxim Philippines Operating Company Gateway Business Park, Special Export Processing Zone, General Trias, Cavite, Philippines  Support and analysed device testing to improve yield of semiconductor products Skills / Area of Expertise In-depth knowledge in FPGA field Strong board level debugging skills Software and Hardware interfacing RTL hardware design and implementation FPGA Test Development and Debugging Test Integration and Debugging Programming Languages and scripting:
  • 3. VHDL Verilog C/C++ Perl Software Tools Lattice Design Tools (Diamond) Xilinx Design Tools (ISE) Synopsis Synplify Active HDL Hardware Lab Equipment Mix-signal digital oscilloscopes Logic Analyzers Has in-depth understanding and experience in: Lattice Semiconductor programmable logic products FPGA test development and debugging Xilinx FPGA Reconfigurable Computing High Performance Computing Simultaneous Switching Output Achievements Mindanao State University – Iligan Institute of Technology BS in Electronics and Communications Engineering Graduated May 2008 Licensed Electronics and Communications Engineer October 2008, Philippines