Ceramic capacitors are a key component in just about any electronic system used today and perform critical functions such as filtering, decoupling, bypass, voltage suppression, just to name a few. The increase in automotive sensors, harsh environment applications, and unique electrical and mechanical requirements has driven ceramic capacitors to take on more unique form factors. This webinar will explore how form factor plays a vital role in electrical and mechanical performance and what to consider when selecting the various options.
7. C = Design Capacitance
K = Dielectric Constant
A = Overlap Area
d = Ceramic Thickness
n = Number of Electrodes
C = e0KA(n-1)
d
+
-
Capacitances in parallel are additive
CT=C1+C2+C3+….Cn
Standard Surface Mount
Base MLCC Structure
9. Model Parameters
• C - Nominal capacitance
• ESR - Series resistance
• ESL - Series inductance
Simplified Real Model
10pF example
Standard Surface Mount
Base Electrical Model
Typical MLCC Inductance <1nH
C ESR ESL
Current Path
11. Standard Surface Mount
Piezoelectricity and Electrostriction
Z
X
Y
Electrical Noise
Audible Noise
AC Voltage
Piezoelectricity
Electrical Noise
Electrostriction
Electrical Noise
12. Standard Surface Mount
Available Solutions
Standard Commercial
C0G, U2J, X7R, X5R, X8R, X8L, Z5U, Y5V
Sn & SnPb Plating Options
0201 - 2225
6.3 and 250 Vdc
Automotive
C0G, U2J, X7R, X5R, X8R, X8L
Sn Plating Options
0402 - 2225
6.3 and 250 Vdc
High Voltage (≥500V)
Commercial and Automotive
C0G, X7R
Sn & SnPb Plating Options
0603 - 6560
500 and 5,000 Vdc
High Temperature (≥150V)
Commercial and Automotive
C0G, X7R, X8R, X8L
Sn, SnPb, and Au Plating Options
0603 - 4540
500 and 3,000 Vdc
Defense and Aerospace
MIL-PRF-123, 55681, 32535
C0G, X7R, BP, BX
Sn, SnPb & Au Plating Options
0402 - 2220
4 and 200 Vdc
Flex Mitigation
Commercial, Automotive, High Voltage
C0G, X7R, X8L & X8R
Sn, SnPb Plating Options
0603 - 2225
6.3 and 250 Vdc
16. Leaded Stack MLCC
Piezoelectricity and Electrostriction
Z
X
Y
Electrical Noise
Piezoelectricity
Electrical Noise Electrostriction
Electrical NoiseAudible Noise
AC Voltage
Mechanical Absorption
17. Leaded Stack MLCC
Design Consideration: Size and Added Parasitics
Model Parameters
• C – Nominal capacitance
• ESR – Series resistance
• ESL – Series inductance
• L1/L2 – Lead Inductance
• R1/R2 – Lead Resistance
Simplified Real Model
Typical Inductance 1nH – 3nH
C ESR ESLL1 L2
R1 R2
ESL_total = ESL + L1 + L2
ESR_total = ESR + R1 + R2
Current Path
18. Leaded Stack MLCC
Available Solutions
KPS MIL
MIL-PRF-49470
B & T(space) Levels
SMD or Thru-hole
KPS+
Bulk Capacitance
Footprint reduction
SMD or Thru-hole
Hi Volt / Temp options
KPS Commercial and AUTO
AEC-Q200 qualified
1 or 2-chip stacks, SMD
1210 – 2220 footprints
10V – 250 Vdc
KPS HV
Commercial & Automotive Grades
1 or 2-chip stacks, SMD
2220 footprint, J Lead
500 and 630 Vdc
KPS X8L
High Temperature 150ºC
Commercial & Automotive Grades
1 or 2-chip stacks, SMD
1210 and 2220 footprint, J Lead
KPS SnPb
Commercial Grade
1 or 2-chip stacks, SMD
1210 and 2220 footprint, J Lead
Defense, Avionic & Industrial applications
KPS HV SM Series
Industrial Grade
C0G and X7R Dielectrics
L and J Lead
500 and 10kV Vdc
KPS-MCC SMPS Stacks
Industrial Grade
C0G
L and J Lead
50 and 20kV Vdc
19. Axial and Radial Leaded
Benefits
No PCB Required!
Flex Mitigation
Noise Reduction
Highly Versatile Mounting
High Vibration
24. AC Voltage
Axial and Radial Leaded
Piezoelectricity and Electrostriction
Z
X
Y
Electrical Noise
Piezoelectricity
Electrical Noise Electrostriction
Electrical Noise
Mechanical Absorption
25. Axial and Radial Leaded
Design Consideration: Added Parasitics
Model Parameters
• C – Nominal capacitance
• ESR – Series resistance
• ESL – Series inductance
• L1/L2 – Lead Inductance
• R1/R2 – Lead Resistance
Simplified Real Model
Typical Inductance ~10nH for
½” lead wire
C ESR ESL
L1 L2R1 R2
ESL_total = ESL + L1 + L2
ESR_total = ESR + R1 + R2
30. Thank You!!!
Mark R. Laps
Technical Product Manager
Ceramic Business Unit
KEMET Electronics
Cell Phone: +1-864-399-4879
Office Phone: +1-864-963-6383
www.kemet.com | marklaps@kemet.com