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Computer Organization
Instructors :
Dr. Abdul Raouf Khan
Mr.Marwan El-Haj
Timing and Control
The timing for all registers in the basic
computer is controlled by a master clock
generator.
The clock pulses don’t change the state of a
register, unless the register is enabled by a
control signal.
The control signals are generated in control
unit.

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Control Organization
There are two types of control organization.
1. Hardwired Control
2. Microprogrammed Control
Hardwired Control
In the hardwire organization, the control logic
is implemented with logic gates, flip-flops,
decoders and other digital circuits.
Advantage: produces fast mode of operations.
Disadvantage: if design has to be changed or
modified, it needs changes in the wiring.

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Microprogrammed Control
In the Microprogrammed organization, the
control information is stored in a control memory.
The control memory is programmed to initiate the
required sequence of microoperations
Advantage: changes can be done easily by
updating the micro-program in control memory
Disadvantage: execution takes longer time
Block Diagram of Hardwired Control Unit

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Block Diagram of Hardwired
Control Unit
It consists of two decoders, a sequence
counter, and a number of control logic gates.
An instruction read from memory is placed in
the instruction register (IR). And is decoded
with a 3x8 line decoder.
4 bit sequence counter can count from 0 to
15. The outputs are decoded into 16 timing
signals T0 to T15
Hardwired logic contd .
The sequence counter SC is incremented to
provide the sequence of timing signals. Once
a while the counter is cleared to 0, causing
the next active timing signal to be T0.
For example D3T4 :SC 0 means at time T4,
SC is cleared to 0 if decoder output D3=1.
The timing diagram shows the time
relationship of the control signal.

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Timing Diagram
example
Transfer Contents of PC to AR in one Clock
Cycle Represented by T0
– PC is put onto the bus(S2 S1 S0 = 010)
– LD (Load) input of AR is enabled(LD =1)
– Actual transfer occur at the end of the cycle
– T0 becomes 0 (inactive ) and T1 becomes 1 (active)