The document discusses the phases of an instruction cycle in a basic computer, including fetching an instruction from memory, decoding the instruction, reading the effective address from memory if indirect, and executing the instruction. It also describes the microoperations for fetching and decoding instructions, including loading the program counter with the first instruction address and incrementing the sequence counter to provide timing signals. The types of instructions are determined and subdivided into four paths.

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Computer Organization
Instructors :
Dr. Abdul Raouf Khan
Mr.Marwan El-Haj
Instruction Cycle
In the Basic Computer each instruction cycle
consists of the following phases
1. Fetch an instruction from Memory
2. Decode the instruction
3. Read the effective address from memory if it
has indirect address
4. Execute the instruction

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Fetch and decode
Initially, the program counter PC is loaded with
the address of the first instruction in the
program.
The sequence counter SC is cleared to zero
(0), providing a decoded timing signal T0.
After each clock pulse, SC is incremented by
one, so that the timing signals go through T0, T1
& T2 and so on.
Microoperation for fetch and decode

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Microoperation for fetch and decode
T0

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Microoperation for fetch and decode
T1
Determine the type of Instruction
The timing signal that is active after decoding is
T3.
The Flowchart below presents initial configuration.

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Determine the type of Instruction
The three instruction types are subdivided
into four separate paths
D’7IT3 : AR M[AR]
D’7I’T3 : Nothing
D7I’T3 : Execute register-reference Instruction
D7IT3 : Execute Input-Output instruction