Every single Logic Gate with their respective information.

1. Electrónica Digital
Eduardo Emanuel Tovias
Garza
Engineer Aurelio García
Técnico
Mecatrónica Área
Automatización
28th October 2020 - Matamoros,
Tamaulipas

2. SEPARATOR: Logic
Gates – Datasheets,
Pinout, Operation
Characteristics

3. 74LS04 NOT Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A Y = A’
0 1
1 0

4. 74LS08 AND Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = A x B
0 0 0
1 0 0
0 1 0
1 1 1

5. 74LS32 OR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = A + B
0 0 0
1 0 1
0 1 1
1 1 1

6. 74LS86 XOR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = (A + B) x (A’+B’)
0 0 0
1 0 1
0 1 1
1 1 0

7. 74LS00 NAND Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = (A’)(B’)
0 0 1
1 0 1
0 1 1
1 1 0

8. 74LS02 NOR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = A’+B’
0 0 1
1 0 0
0 1 0
1 1 0

9. 74LS66 XNOR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = (A x B) + (A’ x B’)
0 0 1
1 0 0
0 1 0
1 1 1

10. SEPARATOR:
BREADBOARD
IMPLEMENTATION

11. Testing logic gates using combination Input
A=0 & Input B=0

12. Testing logic gates using combination Input
A=0 & Input B=1

13. Testing logic gates using combination Input
A=1 & Input B=0

14. Testing logic gates using combination Input
A=1 & Input B=1

15. SEPARATOR:
PROTEUS SOFTWARE
SIMULATION

16. Testing logic gates using combination Input
A=0 & Input B=0

17. Testing logic gates using combination Input
A=0 & Input B=1

18. Testing logic gates using combination Input
A=1 & Input B=0

19. Testing logic gates using combination Input
A=1 & Input B=1