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DIGITAL LOGIC DESIGN
LECTURE 04
BY-FARHAT ULLAH
LOGIC GATES
A logic gate is an electronic device
implementing a Boolean function,
a logical operation performed on one or more
binary inputs that produces a single binary
output.
When a transistor is on, or open, then an
electric current can flow through. And when it's
off, then no current flows.
When you string a bunch of these transistors
together, then you get what's called a logic
gate, which lets you add, subtract, multiply,
and divide binary numbers in any way
imaginable
AND GATE
1 output
2 inputs
3 inputs
4 inputs
Multiple inputs
&0
0
0
AND GATE FUNCTION
Logical Multiplication function
Input Output
A B F
0 0 0
0 1 0
1 0 0
1 1 1
BAF 
NCBAF  ....
AND GATE TIMING DIAGRAM
t0 t4 t5 t6t1 t2 t3
A
B
F
OR GATE
1 output
2 inputs
3 inputs
4 inputs
Multiple inputs
>=10
0
0
OR GATE FUNCTION
Boolean Add function
Input Output
A B F
0 0 0
0 1 1
1 0 1
1 1 1
BAF 
NCBAF  ..
OR GATE TIMING DIAGRAM
t0 t4 t5 t6t1 t2 t3
A
B
F
NOT GATE
1 input
1 output
NOT GATE FUNCTION
Invert function
Input Output
A F
0 1
1 0
AF 
NOT GATE TIMING DIAGRAM
t0 t4 t5 t6t1 t2 t3
A
F
AND GATE APPLICATIONS
Enable/Disable Device
 Counter counts when it receives pulses
U/D
Reset
B1
B8
Carry out
ENB
Counter
A
B
Clock Pulses
Enable
Disable
OR GATE APPLICATIONS
Car door open alarm
Alarm
Front left door
Rear left door
Front right door
Rear right door
NOT GATE APPLICATIONS
1’s Complement
1 1 1 1
1 1 1 1
0 0
0 0
0
0 0
0
ALTERNATE REPRESENTATIONS
NAND GATE
1 output
2 inputs
3 inputs
4 inputs
Multiple inputs
&0
0
0
NAND GATE FUNCTION
NOT-AND function
Input Output
A B F
0 0 1
0 1 1
1 0 1
1 1 0
BAF 
NCBAF  ....
NAND GATE TIMING DIAGRAM
t0
t4
t5
t6
t1
t2
t3
A
B
F
NAND UNIVERSAL GATE
Input Output
A B F
0 0 1
0 1 1
1 0 1
1 1 0
NAND UNIVERSAL GATE
1 2
Input Output Output
A B F1 F
0 0 1 0
0 1 1 0
1 0 1 0
1 1 0 1
NAND UNIVERSAL GATE
3
1
2
Input Output
A B F
0 0 0
0 1 1
1 0 1
1 1 1
NOR GATE
1 output
2 inputs
3 inputs
4 inputs
Multiple inputs
>=10
0
0
NOR GATE FUNCTION
NOT-OR function
Input Output
A B F
0 0 1
0 1 0
1 0 0
1 1 0
BAF 
NCBAF  ....
NOR GATE TIMING DIAGRAM
t0 t4 t5 t6t1 t2 t3

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Digital logic design lecture 04