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Topic: Bus Interface Unit(BIU) of 8086 MP
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Contents
• BIU and EU of 8086 MP
• The Bus Interface unit (BIU)
• Different Parts of BIU
• Instruction Queue
• Segment Register
• Code segment (CS)
• Stack segment (SS)
• Extra segment (ES)
• Data segment (DS)
• Instruction Pointer
Page 2 out of 13
BIU and EU of 8086 MP
The 8086 micro-processor is organized as two separate units, called the
Bus Interface Unit (BIU) and the Execution Unit (EU). The BIU provides
generation of the memory and I/O addresses for the transfer of data.
Page 3 out of 13
The Bus Interface unit (BIU)
• Handles all transfer of data and addresses on the buses for the EU.
• This unit sends out addresses
• Fetches instructions from memory
• Reads data from ports and memory
• Writes data to ports and memory
Page 4 out of 13
Different Parts of BIU
1. Instruction Queue
2. Segment Register
3. Instruction Pointer
Page 5 out of 13
Instruction Queue
• The last section of BIU is the FIFO group of registers called a queue. It
is basically a group of registers.
• This arrangement makes possible for the BIU to fetch the instruction
byte while EU is decoding an instruction or executing an instruction
which does not require use of buses.
• This arrangement is called pipelining.
• This is done to speed up the program
execution.
Page 6 out of 13
Segment Register
BIU contains four 16-bit segment registers as follows:
1. Code segment (CS) register
2. Stack segment (SS) register
3. Extra segment (ES) register
4. Data segment (DS) register
Page 7 out of 13
The Code Segment(CS)
• 16 bit
• It holds the upper 16 bits of the starting or base address for the current
code segment.
• IP contains the distance or offset from this address to the next
instruction byte to be fetched.
• BIU computes the 20-bit physical address by logically shifting the
contents of CS 4-bits to the left and then adding the 16-bit contents of
IP.
Page 8 out of 13
The Stack Segment(SS)
• 16-bit
• It is used to hold the upper 16 bits of the starting address for the
program stack.
• Points to the current stack.
• The 20-bit physical stack address is calculated from the Stack Segment
(SS) and the Stack Pointer (SP) for stack instructions such as PUSH
and POP.
Page 9 out of 13
The Extra Segment(ES)
• 16-bit
• Points to the extra segment in which data is stored. (if excess of 64K
pointed to by the DS)
• String instructions use the ES and Destination Index(DI) to determine
the 20-bit physical address for the destination.
Page 10 out of 13
The Data Segment(DS)
• 16-bit
• Points to the current data segment; operands for most instructions are
fetched from this segment.
• The 16-bit contents of the Source Index (SI) or Destination Index (DI)
or a 16-bit displacement are used as offset for computing the 20-bit
physical address.
Page 11 out of 13
Instruction Pointer
• It’s a 16-bit register, which identifies the location of the next word of
instruction code that is to be fetched in the current code segment.
• IP contains an offset instead of the actual address of the next
instruction.
• The 20-bit address produced after addition of the offset stored in IP
to segment base address in the CS is called the Physical address of the
code byte.
Page 12 out of 13
Page 13 out of 13

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Bus Interface Unit(BIU) of 8086 Microprocessor

  • 1. Topic: Bus Interface Unit(BIU) of 8086 MP 1
  • 2. Contents • BIU and EU of 8086 MP • The Bus Interface unit (BIU) • Different Parts of BIU • Instruction Queue • Segment Register • Code segment (CS) • Stack segment (SS) • Extra segment (ES) • Data segment (DS) • Instruction Pointer Page 2 out of 13
  • 3. BIU and EU of 8086 MP The 8086 micro-processor is organized as two separate units, called the Bus Interface Unit (BIU) and the Execution Unit (EU). The BIU provides generation of the memory and I/O addresses for the transfer of data. Page 3 out of 13
  • 4. The Bus Interface unit (BIU) • Handles all transfer of data and addresses on the buses for the EU. • This unit sends out addresses • Fetches instructions from memory • Reads data from ports and memory • Writes data to ports and memory Page 4 out of 13
  • 5. Different Parts of BIU 1. Instruction Queue 2. Segment Register 3. Instruction Pointer Page 5 out of 13
  • 6. Instruction Queue • The last section of BIU is the FIFO group of registers called a queue. It is basically a group of registers. • This arrangement makes possible for the BIU to fetch the instruction byte while EU is decoding an instruction or executing an instruction which does not require use of buses. • This arrangement is called pipelining. • This is done to speed up the program execution. Page 6 out of 13
  • 7. Segment Register BIU contains four 16-bit segment registers as follows: 1. Code segment (CS) register 2. Stack segment (SS) register 3. Extra segment (ES) register 4. Data segment (DS) register Page 7 out of 13
  • 8. The Code Segment(CS) • 16 bit • It holds the upper 16 bits of the starting or base address for the current code segment. • IP contains the distance or offset from this address to the next instruction byte to be fetched. • BIU computes the 20-bit physical address by logically shifting the contents of CS 4-bits to the left and then adding the 16-bit contents of IP. Page 8 out of 13
  • 9. The Stack Segment(SS) • 16-bit • It is used to hold the upper 16 bits of the starting address for the program stack. • Points to the current stack. • The 20-bit physical stack address is calculated from the Stack Segment (SS) and the Stack Pointer (SP) for stack instructions such as PUSH and POP. Page 9 out of 13
  • 10. The Extra Segment(ES) • 16-bit • Points to the extra segment in which data is stored. (if excess of 64K pointed to by the DS) • String instructions use the ES and Destination Index(DI) to determine the 20-bit physical address for the destination. Page 10 out of 13
  • 11. The Data Segment(DS) • 16-bit • Points to the current data segment; operands for most instructions are fetched from this segment. • The 16-bit contents of the Source Index (SI) or Destination Index (DI) or a 16-bit displacement are used as offset for computing the 20-bit physical address. Page 11 out of 13
  • 12. Instruction Pointer • It’s a 16-bit register, which identifies the location of the next word of instruction code that is to be fetched in the current code segment. • IP contains an offset instead of the actual address of the next instruction. • The 20-bit address produced after addition of the offset stored in IP to segment base address in the CS is called the Physical address of the code byte. Page 12 out of 13
  • 13. Page 13 out of 13