1. A mini project
on
Linear Feedback Shift
Register
By
Arpith (09B81A0410)
Himaja (09B81A0429)
Kishore (09B81A0432

2. SHIFT REGISTER
• Shift register consists of an arrangement of flip-flops and are
important in applications involving the storage and transfer
data in a digital system, it is a type of sequential logic circuit,
mainly for storage of digital data.
• They are a group of flip-flops connected in a chain so that the
output from one flip-flop becomes the input of the next flip-
flop.

3. CONTENTS
• WHAT IS LFSR?
• SHIFT REGISTER
• 8 BIT LINEAR FEEDBACK SHIFT REGISTER (LFSR)
• Circuit of 8-bit LFSR
• Working of 8-bit LFSR
• TIMING DIAGRAMS
• APPLICATIONS
• IMPLEMENTATION AS CYCLIC REDUNDANCY CHECK
• DATA TRANSMISSON
• CRC ENCODING (USING LFSR)
• CRC DECODING (USING LFSR)
• TIMING DIAGRAMS
• Conclusion

4. WHAT IS LFSR?
Linear Feedback Shift Register (LFSR) is popularly known as
Pseudo-random number generator. The random numbers repeat itself
after 2^n-1 clock cycles (where n is the number of bits in LFSR). A
standard polynomial function: X^8+X^7+X^6+X^4+X^2+1 is used
to generate random numbers. 8 bit Linear Feedback shift register uses
8 D-Flip-flops and xor gates. Each D-Flip-flop uses Asynchronous
reset which is independent of clock. LSFR also uses Asynchronous
reset.

5. 8 BIT LINEAR FEEDBACK
SHIFT REGISTER (LFSR)
• A linear feedback shift register (LFSR) is a shift
register whose input bit is a linear function of its previous
state.
• The most commonly used linear function of single bits is
XOR.
• The initial value of the LFSR is called the seed, and because
the operation of the register is deterministic, the stream of
values produced by the register is completely determined by
its current (or previous) state.

6. Circuit of 8-bit LFSR

7. CLOCK RESET Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1
1 1 0 1 0 1 0 1 0
1 00 1 0 0 1 0 0 1
1 1 0 0 1 0 0 1 0
1 0 0 1 1 1 0 0 1
Working of 8-bit LFSR

8. TIMING DIAGRAMS

9. HARDWARE IMPLEMENTATION

10. APPLICATIONS
• Random number generators
• Error detection and correction
• Jamming
• Warfare

11. IMPLEMENTATION AS
CYCLIC REDUNDANCY CHECK
WHAT IS CRC?
A Cyclic Redundancy Check (CRC) is
an error-detecting code commonly used in
digital networks and storage devices to detect
accidental changes to raw data. Blocks of data entering
these systems get a short check value attached, based
on the remainder of a polynomial of their contents; on
retrieval the calculation is repeated, and corrective
action can be taken against presumed data corruption if
the check values do not match.

12. DATA TRANSMISSON

13. CRC ENCODING
(USING LFSR)
1 0 1 1 0 0 1 0 0 0 0
0 0 0 0
0 0 0 1 0 1 1 0 0 1 0 0 0 0
0 0 1 0 1 1 0 0 1 0 0 0 0
0 1 0 1 1 0 0 1 0 0 0 0
1 0 1 1 0 0 1 0 0 0 0
0 1 0 1 0 1 0 0 0 0
1 0 1 0 1 0 0 0 0
0 1 1 0 0 0 0 0
Message sent:
1 1 0 0 0 0 0
1 0 1 1 0 0
0 1 0 1 0
1 0 1 0
10110011010

14. CRC DECODING
(USING LFSR)
1 0 1 1 0 0 1 1 0 1 0
0 0 0 0
0 0 0 1 0 1 1 0 0 1 1 0 1 0
0 0 1 0 1 1 0 0 1 1 0 1 0
0 1 0 1 1 0 0 1 1 0 1 0
1 0 1 1 0 0 1 1 0 1 0
0 1 0 1 0 1 1 0 1 0
1 0 1 0 1 1 0 1 0
0 1 1 0 1 0 1 0
1 1 0 1 0 1 0
1 0 0 1 1 0
0 0 0 0 0
0 0 0 0
Let the received
sequence be

15. TIMING DIAGRAMS
AT TRANSMITTER
AT RECEIVER

16. Conclusion
• LFSR’s are n-bit counters exhibiting pseudo-random
behaviour. These are built from a small number of xor
gates and hence require very less hardware.
• This can be used as a fast counter, if the particular
sequence of count values is not important.
• A traditional application for LFSRs is in cyclic
redundancy check (CRC)calculations, which can be
used to detect errors in data communications. The
stream of data bits being transmitted is used to modify
the values fed back into an LFSR .