2. 2
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Precursors: current state and future requirements
Applications
3. 3
Outline
Atomic layer deposition:
Introduction
Principle
Advantages
Materials and films
Types of ALD processes
Types of ALD reactors
Precursors: current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high-volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
4. 4
Atomic layer deposition: introduction
First ALD(E) process patented by Tuomo Suntola
in Finland in 1977 for ZnS layers on glass for
electroluminescent flat panel displays
ALD application areas are continuously
expanding and diversifying
High-volume production solutions are
available
B. Van Nooten “ALD in Semiconductor Processing”, Nanotechnology Forum, 2009, Czech Republic
5. 5
Atomic layer deposition: principle
Reactant species are introduced sequentially, in a repetitive mode,
with sequences separated by a purge with inert gas step
Precursors should not react in gas phase (differently from CVD)
At the end of step 4, a cycle is completed; growth rate is measured
as growth per cycle (GPC)
Purge with inert
gas
Purge with inert
gas
Modified diagram from T. Suntola, ALD 2004, Helsinki, Finland
Step 1 Step 2 Step 3 Step 4
6. 6
Atomic layer deposition: advantages
Excellent uniformity: surface reaction controlled
High reproducibility: “digital” thickness control
Excellent conformality: deposition in high aspect ratio and in any
3D structures
Low deposition temperatures (especially if processing with
plasma)
Low added particle count: no gas phase reactions
Al2O3 ALD
7. 7
Outline
Atomic layer deposition
Materials and films:
Materials possible with ALD
Examples of ALD films
Types of ALD processes
Types of ALD reactors
Precursors: current state and future requirements
Applications: ITRS roadmap for logic and DRAM
Scaling-up to high-volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
8. 8
Materials possible with ALD
Adapted from “Surface chemistry of atomic layer deposition: a case study for the trimethylaluminum/water
process”, R. Puurunen, J. Appl. Phys. 97 (2005) 121301 - Courtesy Oxford Instruments Plasma Technology
10. 10
Outline
Atomic layer deposition
Materials and films
Types of ALD processes:
Thermal
Plasma-enhanced
Types of ALD reactors
Precursors: current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
11. 11
Types of ALD processes: thermal
Most commonly-used
Find a CVD process based on a binary reaction and then apply the A
and B reactants separately in a ABAB… sequence
Thermal energy is sufficient for layer deposition
Suitable for deposition in high volume machines (batch)
Most suitable for deposition in high aspect ratio structures
All equipment manufacturers produce thermal ALD machines
Most common thermal ALD systems are metal oxides: Al2O3, TiO2,
ZnO, ZrO2, HfO2, Ta2O5
– Thermal oxidation sources: H2O and O3
Other thermal ALD systems are metal nitrides: TiN, TaN, W2N
Some thermal ALD systems exist also for sulfides: ZnS, CdS and for
phosphides: GaP, InP
Very difficult to deposit single-element films of metals and
semiconductors
12. 12
Types of ALD processes: plasma
Plasma ALD reaches 10% of the total ALD publications
Plasma assisted ALD reactors are provided by several equipment
manufacturers
Reactors:
– remote plasma
– direct plasma
– combination
Suitable for deposition at low temperatures (room temperature) on
thermally fragile substrates (polymers)
Layers with lower impurity content
Denser layers
Suitable to deposit single-element films of metals and
semiconductors: Ru, Pt, Si
Less suitable for high
aspect ratio structures
Less suitable for batch
production
One patent application from Hitachi Kokusai
13. 13
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Types of ALD reactors:
Single-wafer
Batch
Precursors: current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
14. 14
Single-wafer ALD reactors (1): thermal
a) Cross-flow: forced flow of the gas
laterally across the wafer:
– Convective gas flow: displacement time
can be very short (~100ms)
– Depletion between the leading and
trailing edge of the wafer can occur
b) Single-hole top injection:
– Convective gas flow
– Whole wafer is exposed to the “fresh
gas” flow
c) Shower-head (multiple hole top
injection):
– Risk of “pockets” of stagnant gas that
can only be removed through diffusive
rather than convective transport,
resulting in longer purge times
E. Granneman et al. “Batch ALD:
Characteristics, comparison with single
wafer ALD and examples”, Surface &
Coatings Technology 201 (2007), 8899
15. 15
Single-wafer ALD reactors (2): plasma
E. Kessels “Reaction mechanisms during remote plasma ALD for low temperature materials
and energy-related applications”, ALD 2009, Monterey, USA
16. 16
Batch ALD reactors: ASM A412- LP
vertical reactor
Adapted from E. Granneman et al.
“Batch ALD: Characteristics, comparison
with single wafer ALD and examples”,
Surface & Coatings Technology 201
(2007), 8899
More recent variant of A412
with lateral multi-hole injectors
– Convective transport along
the boat and diffusive
transport between the wafers
-> longer pulse (purge times)
(~10s)
– Careful design of the
injectors hole spacing:
At the top: longer residence
time than at the bottom (closer
to the pump)
17. 17
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Types of ALD reactors
Precursors, current state and future requirements:
Requirements
Delivery systems
Non-metallic precursors
Metallic precursors
New metallic compounds, cyclopentadienyls
ALD chemistry review work
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
18. 18
ALD precursor requirements (1)
Adapted from T. Suntola “Atomic Layer Epitaxy”, Handbook of Crystal Growth, Vol.3, Part B,
Chapter 14, D.T.J. Hurle Ed. Elsevier, Amsterdam, 1994
“ALD window” is the region of “ideal” ALD behavior between the “non-
ideal” ALD regions:
- At lower T, the reactants can condense on the surface or the surface
reactions may not have enough thermal energy to reach completion
- At higher T, the surface species could decompose and allow additional
reactant adsorption (CVD process) or surface desorption can occur
19. 19
ALD precursor requirements (2)
Self-limited growth preferably in a large temperature window,
with a high growth rate (GPC) => precursor requirements:
sufficient volatility: 0.1 – 1Torr (higher for high volume); liquids and
gases are preferred
aggressive and complete reactions
thermal stability (no self-decomposition)
no etching of the film or substrate material
no dissolution into the substrate material
sufficient purity
non-reactive, volatile by-products
easy to synthesis, handle and deliver
inexpensive
environmentally-friendly
often contradictory
21. 21
Delivery systems: solid precursors
Efficient delivery requires high surface area and optimized contact
with the carrier gas
22. 22Delivery systems: low vapor pressure
precursors
Z. Karim et al. “Needs for next generation memory and enabling solutions based on advanced vaporizer
ALD technology”, ALD 2009, Monterey, USA
23. 23
Examples of non-metallic precursors ALD
Oxidizers:
– H2O - clean protonation reaction e.g.: Al(CH3)3+H2O ->Al2O3+CH4
- low reactivity with B-diketonates
– O3 - partly combustion reaction e.g.: Al(CH3)x(ads)+O3->Al2O3+COx+H2O
- oxidizes also the underlying substrate (Si)
– O- radicals/plasma - partly combustion reaction e.g.:
Al(CH3)x(ads)+O->Al2O3+COx+H2O
- oxidizes also the underlying substrate (Si)
Hydrides: H2S, H2Se, H2Te, NH3, PH3, AsH3, HF
– toxic
– alkylated derivatives are available, but with low reactivity
Metal fluorides: TiF4, TaF5
Plasma activation: H2, N2, NH3
Reducing agents: TaCl5, TiCl4
– essential for metal and transition metal nitride deposition
24. 24
Examples of metallic ligands available for ALD
N. Blasco, “ALD Precursor Design and Optimization for Next Generation DRAM Capacitors”– ALD 2008,
Bruges, Belgium
25. 25
Example of new heteroleptic
metallic compounds for ALD
N. Blasco, “ALD Precursor Design and Optimization for Next Generation DRAM Capacitors” – ALD 2008,
Bruges, Belgium
Target: to combine high thermal stability and high reactivity
26. 26
Cyclopentadienyl compounds for ALD
For oxides: with H2O (high
reactivity), O3, plasma oxygen:
MgO, NiO, SrTiO3, BaTiO3,
Ln2O3, Y2O3
For sulfides: SrS, BaS
When mixed with other ligands
also for: ZrO2, HfO2
Nobel metal Cps also react with
O2 to deposit pure metals: Ru
Versatile group of precursors:
Large molecules: sterically-demanding
Examples of Cp complexes that can be
used in ALD: Rs represent alkyl groups,
e.g. Me, Et
27. 27
ALD chemistry review work
R. Puurunen, “Surface chemistry of atomic layer deposition:
a case study for the trimethylaluminum/water process”, J. Appl.
Phys. 97 (2005) 121301
M. Ritala and M. Leskelä, “Atomic Layer Deposition” in
Handbook of Thin Film Materials, H.S. Nalwa, Academic Press,
San Diego (2001), Chapter 2, p.103-159
M. Leskelä and M. Ritala, “Atomic layer deposition (ALD):
from precursors to thin film structures”, Thin Solid Films 409
(2002) 138
M. Leskelä and M. Ritala, “Atomic layer deposition (ALD)
chemistry-recent developments and future challenges”,
Angewandte Chemie International Edition 42 (2003) 5548
28. 28
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Types of ALD reactors
Precursors: current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high volume production: e.g.: ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
29. 29
ITRS 2009: DRAM potential solutions
Research required
Development underway
Qualification/pre-production
Continuous improvement
30. 30
Examples of ALD materials for DRAM
High/ultra high-k dielectrics in storage capacitors: HfO2,
HfO2/Al2O3/HfO2, ZrO2, ZrO2/Al2O3/ZrO2, SrTiO3, BaTiO3,
BST
Electrodes: TiN, TaN, Ru, Pt
STI liner: SiO2
31. 31
ITRS 2009: Logic potential solutions
Research required
Development underway
Qualification/pre-production
Continuous improvement
33. 33
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Precursors: current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
34. 34
Zr-Cp precursors screening
for scaling-up ZrO2 process
S. Haukka, et al. “Comparison of the Behavior of Zirconium Cyclopentadienyl Precursors in ALD Reactors with
Varying Substrate Surface Areas” – ALD 2008, Bruges, Belgium
35. 35
Effect of substrate surface area
• Surface area = 0.2m2
• Temperature = 275-375ºC
• Pulse time: seconds
• Surface area = 20m2 (for trenched
wafers (250-500m2)
• Temperature = 240-350ºC
• Pulse time: tens of seconds
• 3g porous silica with surface area = 900m2
• Temperature = 200-325ºC
• Pulse time: hours
F-120
S. Haukka, et al. “Comparison of the Behavior of Zirconium Cyclopentadienyl Precursors in ALD Reactors with
Varying Substrate Surface Areas” – ALD 2008, Bruges, Belgium
36. 36GPC and thickness uniformity results for ZrO2
in 200mm single wafer reactor F-450
Both precursors give GPC ~ 0.5-0.6Å/cycle
Zr-D04 shows a better-defined and wider ALD window ~(275-350)ºC compared to
D02 (300-325)ºC, which also extends to higher temperatures (350ºC compared to 325
ºC for D02) -> Zr-D04 has greater thermal stability than Zr-D02
Above 325ºC for D02 and 350ºC for D04, thickness non-uniformity increases pointing
to possible precursor decomposition onset of CVD
Comparable WiW uniformity in the ALD window for D02 and D04 (~1% 1)
S. Haukka, et al. “Comparison of the
Behavior of Zirconium Cyclopentadienyl
Precursors in ALD Reactors with Varying
Substrate Surface Areas” – ALD 2008,
Bruges, Belgium
37. 37
Thickness uniformity maps for ZrO2
in 200mm single wafer reactor F-450
S. Haukka, et al. “Comparison of the Behavior of Zirconium Cyclopentadienyl Precursors in ALD Reactors with
Varying Substrate Surface Areas” – ALD 2008, Bruges, Belgium
38. 38
GPC and thickness uniformity results for
ZrO2 in 300mm batch reactor A412
ZrD04 shows a better-defined and wider ALD window ~(240-300)ºC compared to D02
~(240-270)ºC which extends to higher temperatures (similar to single wafer behavior)
Above 270ºC for D02 and 300ºC for D04, thickness non-uniformity increases,
indicating precursor decomposition (onset of CVD)
Comparable WiW uniformity in the ALD window for D02 and D04 (<2% 1)
ALD window shifts by ~50ºC to lower temperatures for both precursors: increased
surface area and higher residence time
Adapted from S. Haukka, et al.
“Comparison of the Behavior of Zirconium
Cyclopentadienyl Precursors in ALD
Reactors with Varying Substrate Surface
Areas” – ALD 2008, Bruges, Belgium
Single wafer window
39. 39
Thickness uniformity maps for ZrO2 on
300mm wafers in batch reactor
Good WiW thickness uniformity
across the load
S. Haukka, et al. “Comparison of the Behavior of Zirconium Cyclopentadienyl Precursors in ALD Reactors with
Varying Substrate Surface Areas” – ALD 2008, Bruges, Belgium
40. 4013C NMR spectra of Zr-Cp deposited on silica
Cp peak still present at 280ºC for D02 and at 300ºC for D04
The peak around 13-15ppm present in all spectra is most probably due to the CH3
group on the Cp ring
The methoxy group (~50-55ppm) disappears from D04 at all temperatures indicating
that it is the most reactive ligand to the Si-OH groups on the surface of the silica
Additional peaks observed ~25ppm, indicating possible formation of other surface
species
S. Haukka, et al. “Comparison of
the Behavior of Zirconium
Cyclopentadienyl Precursors in ALD
Reactors with Varying Substrate
Surface Areas” – ALD 2008,
Bruges, Belgium
41. 41
Possible surface species
causing the NMR peak at 25ppm
With increasing residence time, these reactions can lead to the
decomposition of the ligands, thus explaining the differences observed
between single wafer and batch:
(a) The interaction of the Cp-CH3 groups with the Zr metal
(b) Interaction of Zr-CH3 with the neighboring Zr atoms of the other surface
adsorbed complexes
S. Haukka, et al. “Comparison of the Behavior of Zirconium Cyclopentadienyl Precursors in ALD Reactors with
Varying Substrate Surface Areas” – ALD 2008, Bruges, Belgium
(a) (b)
42. 42
Summary and conclusions
of the scaling-up study
Results obtained in the 200mm single-wafer reactor show for the Zr-Cp
compounds used, an ALD window that is displaced by ~50ºC towards
higher temperatures, compared to the 300mm batch reactor (even higher
temperatures have been reported in small scale single wafer research
tools)
Results obtained in the single-wafer and batch reactors are consistent for
the two different types of precursors used, indicating a wider ALD window,
extending to higher temperatures for Zr-D04 precursor (better thermal
stability
The precursor decomposition temperatures found in the case of the high
surface area silica correspond to those found in the batch reactor
Results obtained from precursor studies on high surface area can be
applied for a first screening of the precursor thermal stability suitability in
batch
Results obtained on single wafer tool can not directly be transferred to
batch
Characterization of the precursor behavior in single-wafer tool is
necessary in order to complete the picture of its suitability for batch use
43. 43
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Types of ALD reactors
Precursors: current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up for high-volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
44. 44
Batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications
This study: Pt top electrode / ZrO2/Al2O /ZrO2 (ZAZ) dielectric / TiN bottom electrode
DRAM stack capacitor technology recommendations near-term years
DRAM materials recommendations
G.D. Dilliway, et al. “Effect of deposition and anneal temperature on batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications” – ALD 2008, Bruges, Belgium
45. 45
Dielectric materials choice
(X. Zhao and D. Vanderbilt, Phys. Rev. B 65, 075105 (2002))
Zr
O
Cubic Tetragonal Monoclinic
k~ 36.8 46.6 19.7
Crystalline properties - thickness and deposition/anneal temperature
Amorphous-crystalline – thickness, deposition/anneal temperature and
substrate material
Al2O3
Capacitor dielectric tetragonal/cubic phase for high k
Lower dielectric constant ~ 10
Reduction in leakage (D.-S. Kil et al. VLSI 2006)
Crystalline grain boundaries - leakage paths
ZrO2
G.D. Dilliway, et al. “Effect of deposition and anneal temperature on batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications” – ALD 2008, Bruges, Belgium
46. 46Deposition of ZrO2/Al2O3/ZrO2 on
TiN bottom electrode
In-situ ZrO2 / Al2O3 / ZrO2 dielectric stack :
ZrO2 from Zr-D04 Cp compound and O3
Al2O3 from TMA and O3
Thermal ALD process in low pressure ASM A412TM vertical furnace
TiN bottom electrode Zr precursor stability
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
220 240 260 280 300 320 340 360 380
Growth temperature (ºC)
GPC(Å)
G.D. Dilliway, et al. “Effect of deposition and anneal temperature on batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications” – ALD 2008, Bruges, Belgium
47. 47
Experiments
Two thickness series of symmetric ZAZ stacks:
Two different deposition temperatures amorphous-crystalline:
225ºC and 300ºC
For deposition at 300ºC, thickness tuning amorphous-
crystalline:
– as-deposited amorphous stack 3/0.5/3 nm;
– as-deposited crystalline stacks: 4/0.5/4 nm; 7/0.5/7 nm
All ZAZ stacks annealed in N2 for 3 min
As-deposited and annealed stacks physically and electrically
characterized
G.D. Dilliway, et al. “Effect of deposition and anneal temperature on batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications” – ALD 2008, Bruges, Belgium
48. 48
As-deposited: XRD and electrical results
Deposition at 225ºC => amorphous
Deposition at 300º C, stacks with ZrO2 layers
thicker than 4 nm crystallize
Similar k values, slightly higher for the
crystalline stacks
0
0.5
1
1.5
2
2.5
3
4 6 8 10 12 14 16
ZAZ thickness (nm)
EOT(nm)
300C
225C
k=23
k=28
A
Deposition at 225°C
0
20
40
60
80
100
120
20 30 40 50 60 70
2 theta [º]
Intensity[a.u.]
3/0.5/3 nm
4/0.5/4 nm
6/0.5/6 nm
TiN(111)
TiN(220)
Deposition at 300°C
0
20
40
60
80
100
120
20 30 40 50 60 70
2 theta [º]
Intensity[a.u.]
3/0.5/3 nm
4/0.5/4 nm
7/0.5/7 nm
C/T-ZrO2
G.D. Dilliway, et al. “Effect of deposition and anneal temperature on batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications” – ALD 2008, Bruges, Belgium
49. 49
As-deposited: XTEM results
TiN / ZAZ (4/0.5/4 nm) / TiN MIM structure (ZAZ deposition at 300ºC)
Both ZrO2 films are polycrystalline as-deposited
The bottom ZrO2 layer (deposited on TiN) has smaller grains than the top ZrO2
layer (deposited on Al2O3)
Presence of the Al2O3 interlayer (layer of lower density/lighter elements), but
its thickness cannot be resolved
Al2O3
ZrO2
TiN
High resolution imaging
Al2O3 interlayer
HAADF-STEM (Z-contrast) analysis
G.D. Dilliway, et al. “Effect of deposition and anneal temperature on batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications” – ALD 2008, Bruges, Belgium
50. 50
Stacks deposited at 225ºC
after PDA at 700ºC and 800ºC
After PDA @ 800C
0
20
40
60
80
20 30 40 50 60 70
Theta - 2 theta [deg]
Intensity[a.u.]
6/0.5/6 nm
4/0.5/4 nm
3/0.5/3 nm
C/T-ZrO2
After PDA @ 700C
0
20
40
60
80
20 30 40 50 60 70
Theta - 2 theta [deg]
Intensity[a.u.]
3/0.5/3 nm
4/0.5/4 nm
6/0.5/6 nm
C/T-ZrO2
After PDA @ 700ºC:
the thickest stack crystallizes
the intermediate stack crystallizes partially
the thinnest stack does not crystallize
stacks shrink
After PDA @ 800ºC:
the thickest stack does not change
the intermediate stack crystallizes fully
the thinnest stack also crystallizes
substantial increase in k = 45
0
0.5
1
1.5
2
2.5
3
2 4 6 8 10 12 14
ZAZ thickness (nm)
EOT(nm)
As deposited
After PDA @ 700C
After PDA @ 800C
A
k (after PDA @ 800ºC) = 45
k (as-deposited) = 23
C
A
A
C
51. 51
Stacks deposited at 300ºC: after PDA at 700ºC
3/0.5/3 nm ZAZ stack on TiN
The whole ZAZ stack is crystalline
The Al2O3 layer can no longer be
resolved
TiN
ZAZ
Small increase in k value with
the crystallization of the thinnest
stack
0
0.5
1
1.5
2
2.5
4 6 8 10 12 14 16
ZAZ thickness (nm)
EOT(nm)
PDA @ 700C
300C
k as deposited =28
k after PDA = 30
A
C
G.D. Dilliway, et al. “Effect of deposition and anneal temperature on batch ALD ZrO2/Al2O3/ZrO2 for
DRAM applications” – ALD 2008, Bruges, Belgium
52. 52
Electrical results: leakage
Low leakage current density (1E-8 A/cm2) for all as-deposited stacks, even for
the thin crystalline ones
Leakage current density increases after PDA: ZrO2 layers crystallize and the
Al2O3 layer is consumed
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
-7 -5 -3 -1 1 3 5 7
Applied voltage (V)
leakagecurrentdensity(A/cm2)
D5-RTA 700C
D6-RTA 700C
D7-RTA 700C
Deposition at 225C and PDA at 700CAs-deposited at 225C
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
-7 -5 -3 -1 1 3 5 7
Applied voltage (V)
Leakagecurrentdensity
(A/cm2)
3/0.5/3 nm
4/0.5/4 nm
6/0.5/6 nm
As deposited at 300C
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
-7 -5 -3 -1 1 3 5 7
Applied voltage (V)
Leakagecurrentdensity
(A/cm2)
3/0.5/3 nm
4/0.5/4 nm
7/0.5/7 nm
Deposition at 300C and PDA at 700C
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
-7 -5 -3 -1 1 3 5 7
Applied voltage (V)
Leakagecurrentdensity
(A/cm2)
3/0.5/3 nm
4/0.5/4 nm
7/0.5/7 nm
53. 53
Summary, conclusions and future directions
Thickness series of symmetric ZAZ stacks deposited at two different
temperatures
As-deposited stacks show k values 23 (for the amorphous stacks) – 28 (for the
crystalline stacks) – low for application
Leakage current density values are low (1E-8 A/cm2) for all as-deposited stacks,
even the thinnest crystalline ones – suitable for application
k value increases after PDA, less for the crystalline as-deposited stacks, but
substantially for the amorphous as-deposited stacks, after crystallization, k ~ 45 –
reaches target requirements (>43)
Leakage current stays low after PDA for the as-deposited crystalline thin stacks,
but increases for the thick ones
Leakage current increases after PDA for the amorphous as-deposited layers
Very delicate balance between high k and low leakage values
Future directions: asymmetric stacks
54. 54
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Types of ALD reactors
Precursors: current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high volume production: e.g. ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
55. 55
Single wafer ALD SrTiO3 for
DRAM applications
This study: Pt top electrode / STO / TiN bottom electrode
DRAM stack capacitor technology recommendations near-term years
DRAM materials recommendations
56. 56
STO from Sr-Cp in ASM Pulsar 2000/3000 Module
Sr from Sr(t-Bu3Cp)2, solid with mp~150ºC
Ti from Ti(OCH3)4 compound, solid with
mp~204ºC
Stable process achieved
Composition: Sr:Ti:O = 0.35:0.37:1 (close to
stoichiometric
Low impurity content: C, N, F <1 at%
Low hydroxide content: H<4 at %
J.W. Maes et al. “Sr-Cp Precursor Based ALD SrTiO3 for MIM Capacitor Applications” – ALD 2008, Bruges, Belgium
57. 57
Crystallinity, k value
J.W. Maes et al. “Sr-Cp Precursor Based ALD SrTiO3 for MIM Capacitor Applications” – ALD 2008, Bruges, Belgium
58. 58
Excellent step coverage
J.W. Maes et al. “Sr-Cp Precursor Based ALD SrTiO3 for MIM Capacitor Applications” – ALD 2008, Bruges, Belgium
60. 60
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Types of ALD reactors
Precursors, current state and future requirements
Applications: ITRS roadmap for DRAM and logic
Scaling-up to high volume production: ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications
61. 61
ALD for logic: high-k/metal gate evolution
M. Heyns “ALD for highly scaled CMOS and
beyond” – ALD 2008, Bruges, Belgium
Initial focus on ZrO2, eventually replaced by HfO2:
– ZrO2 has higher k value than HfO2
– ZrO2 is not compatible with Si and especially
poly-Si gates (silicide formation)
– Eventually, problems with HfO2 also, due to
Fermi level pinning
Hf/Zr/Al oxide systems:
– good leakage (amorphous systems)
– problems with charges and stability
Hf-based materials (including silicates):
– Nitridated HfSiOx: amorphous up to high
temperatures
Metal gates
– increased mobility for same thickness of
interfacial oxide
Interface engineering: key to obtaining high mobility and low EOT
Scaling down to <1nm EOT was demonstrated with Hf and Zr-based materials
ALD plays the major role in depositing high quality layers
62. 62
Sub 1nm TiN/ALD HfO2 n and pFET
W. Tsai et al. – IMEC, IEDM2003
Low EOT with HfO2 (from HfCl4 and H2O) deposited on top of 0.4nm chemical SiO2:
0.83nm for nFET and 0.75nm for pFET
SiO2 interface is important as it acts as a good starting surface for ALD of high-k
SiO2 preserves all the positive properties, e.g. low interface states density
63. 63
High-k metal gate stacks
M. Heyns “ALD for highly scaled CMOS and beyond” – ALD 2008, Bruges, Belgium
higher
64. 64
Mobility and high-k dielectrics
Effectiveholemobility(cm2.V-1.s-1)
Both electron and hole mobilities are reduces when high-k are used
compared to the “universal” Si/SiO2
– Reduced mobility -> lower drive current and poorer transitor performance
By increasing the interfacial oxide thickness, the mobility recovers, but at the
expense of the EOT
– Suitable choice of dielectric
65. 65
Mobility reduction in high-k transistors
Suggestions for mobility recovery:
– Increase interfacial oxide thickness: move scatter centres away from the channel
– Introduce strain in the channel: mobility boost
– Metal gates: screening of defects
High-k
66. 66
Metal gates
Advantages of using metal gates:
Additional capacitance results from
having depletion in poly-Si
Replacing poly-Si with metal
results in no depletion layer in the
gate electrode and no additional
capacitance
Metal gates with suitable p+ and n+ work functions are needed
Issue with metal gates: most candidates tend to shift to mid-gap during
thermal annealing
Solution: metal gate “first”
67. 67
Challenges for high-k metal gate stacks
K. Mistri et al. – INTEL, IEDM 2007
Bandgap (band offset) decreases with increasing k value:
– Optimum working point depends on target application
k value becomes more difficult to control when the polarization in the material
increases:
– k value dependence on the crystal orientation -> either single crystal or amorphous
materials are required
k value need to be maintained for very thin films:
– Minimize interaction with interfaces (metal, Si)
Remote phonon scattering will limit mobility when no interfacial layer is present
68. 68
Improved electrostatic control in transistors
Transition from planar to 3D structures is necessary in order to reduce the
short channel effects by improving the electrostatic control over the channel
The excellent conformality of ALD makes possible the deposition of
high-k and metal gate materials in such structures
69. 69
FinFET devices
Tri-gate devices have complex topography
Good step coverage and conformality provided by ALD are needed for
high-k deposition
70. 70
Beyond classic CMOS
L. Nyns et al. “H2O and O3 based atomic layer deposition of high-k dielectric layers on high mobility substrates”
ALD 2009, Monterey, USA
71. 71
Outline
Atomic layer deposition
Materials and films
Types of ALD processes
Precursors, current state and future requirements
Applications: ITRS roadmap for logic and DRAM
Scaling-up: example for DRAM: ZrO2
Batch ALD ZrO2/Al2O3/ZrO2 on TiN for DRAM-MIM
Single wafer ALD SrTiO3 for DRAM-MIM
ALD for logic electronics
ALD for other applications:
Introduction to the ALD Group, Centre for Process Innovation
Introduction to the nanomaterials group, Newcastle University
72. 72
ALD applications
B. Van Nooten “ALD in Semiconductor Processing”, Nanotechnology Forum, 2009, Czech Republic
Editor's Notes
Technology nodes and leaders
2009-2010: logic electronics: metal gate, gatestack, low T spacer, memory: stack DRAM, 2011, still logic and memory: 3D through silicon vias, flash inter poly dielectric, GST for phase change memory, but also non-semiconductor applications and solar to even further applications.
Technology nodes and leaders
2009-2010: logic electronics: metal gate, gatestack, low T spacer, memory: stack DRAM, 2011, still logic and memory: 3D through silicon vias, flash inter poly dielectric, GST for phase change memory, but also non-semiconductor applications and solar to even further applications.