USB 3.1 Gen 2 Physical layer compliance testing and debug

USB 3.1 Gen 2
Physical layer compliance testing and debug
4/24/2017 1
Karthik Radhakrishna
Field Applications Engineer

Agenda
 Introduction to the USB 3.1 Gen 2 ecosystem
- Defining the terminology
 Understanding the physical layer specifications
- Signaling, TX and RX parameters
 Compliance testing methodology
- Understanding the compliance test requirements and procedures
- Identifying the challenges in calibration and testing
- Automated compliance testing approach
 The Type-C connector
- Introduction to the interface and features
- Modes of operation
4/24/2017 2

The USB 3.1 Gen 2 ecosystem
4/24/2017 3
• The higher speed USB standard has
brought in newer terminology
• It is important to understand these
terms separately and also how they fit
in to the grand scheme of things
• Thorough understanding is required
for implementation and testing
approaches

Defining the terminology
 SuperSpeedPlus – Refers to the architectural layer portions of a system operating on USB 3.1 Gen 2 PHY
 Gen 2 - Gen 2 is an adjective used to refer to the Physical layer associated with a 10 Gbps signaling rate
 Connectors – Standard-A, Standard-B, Micro-A plug, Micro-AB receptacle, Micro-B, Type-C
 SigTest – Refers to the testing tool developed by the USB-IF to measure eye parameters such as Eye
height, width, Tj, Rj, Dj, UI etc. Compliance test results have to be obtained through SigTest irrespective of
the testing hardware used. The latest version is 4.0.23
 Normative and Informative – Normative parameters are those that are necessary to obtain certification.
Informative parameters are intended as guidelines for effective implementation
 Fixtures – Break out boards developed by USB-IF for compliance testing. Available on the USB-IF website
 Long channel and short channel – Long channel tests refer to the measurements performed at the end
of a reference channel as specified in the standard. For TX tests, this channel is embedded by the scope
using s-parameter templates. Short channel tests are performed without embedding.
 CTS – Compliance Test Specification which is different from the base standard. The CTS lists out all the
tests required for compliance certification and the necessary methodology
4/24/2017 4

Terminology continued…
 Type-C connector - is a 24-pin fully reversible-plug USB connector system allowing transport of data and
energy
 USB PD - USB Power Delivery enables the maximum functionality of USB by providing more flexible
power delivery along with data over a single cable
 Active cable - An Electronically Marked Cable with additional electronics to condition the data path signals
 Captive cable - A cable that is terminated on one end with a USB Type-C plug and has a vendor-specific
connect means (hardwired or custom detachable) on the opposite end
 Alternate Mode - Operation defined by a vendor or standards organization that is associated with a SVID
assigned by the USB-IF.
4/24/2017 5

4/24/2017 6
Understanding the Physical layer specifications

Gen 2 Transmitter and Receiver Architecture
4/24/2017 7

Signaling
 The Gen 2 link operates at 10Gbps and employs 128b/132b encoding
scheme
 Each block shall comprise a 4-bit Block Header and a 128-bit payload.
The 4-bit header is set to 0011b for data and 1100b for control blocks
 The PHYs (TX and RX) are required to be AC coupled
 Spread Spectrum Clocking (SSC) is enabled
 Power delivery option supports up to 100W of bus power
 Optimized Power Management states on the bus – idle, sleep and
suspend
 Standard-A and Standard-B type connectors have 2 differential pairs
 Type-C connector is bidirectional and has 4 differential pairs
4/24/2017 8

Compliance Patterns
4/24/2017 9

PLL implementation
4/24/2017 10
Fig.4 : Golden PLL for Gen 2 operations
• The Clock recovery circuits in Gen 2
receivers employ a Golden PLL to achieve
optimized tracking of jitter
• The frequency response of the PLL and
incoming data clock are shown in Fig.4
• The transfer function of the CDR is given as
• The jitter transfer function is given as
• All jitter frequencies within the 3dB cutoff
point of the CDR function are tracked by the
PLL
• The 3dB frequency for a Gen 2 Golden PLL
is specified as 15MHz

Gen 2 Transmitter requirements
 The standard specifies several normative parameters for transmitter
characterization. These include UI, differential pk-pk voltage, TX de-
emphasis, DC differential impedance, AC coupling capacitance etc.
 It also lists several informative parameters like minimum pulse width,
common mode impedance etc. which provide guidance to achieve
improved performance
 It also specifies limits for the transmitted eye mask as shown:
4/24/2017 11

Gen 2 Receiver requirements
 Configuration and initialization of a Gen 2 link involves receiver
equalization training. A spectrally rich TSEQ is used for this purpose
 The standard provides reference CTLE and DFE equalizers but the
actual equalizers are implementation specific
 The normative receiver electrical parameters include UI, RX DC
common mode impedance, LFPS threshold etc.
 The informative receiver electrical parameters include pk-pk ref voltage
after equalization, input capacitance, inherent timing error etc.
 RX must be loopback capable
 The receiver operation is tested by applying sinusoidal jitter at different
frequencies
4/24/2017 12

4/24/2017 13
PHY Compliance testing methodology

Test Fixtures – Complete set of Micro-B fixtures
4/24/2017 14
Device Fixture 1D
7.2” Mock host
5.6” CLB 7.1” CLB 8.1” CLB

Test setup for TX compliance testing
4/24/2017 15
• All transmitter compliance tests are performed at
the Test point TP1 after the reference test channel
• A reference CTLE with DC gain of -5dB and a 1-
bit DFE are used before Eye parameter
measurements as required by the compliance
standard
• For full compliance, these tests have to be
performed on SigTest software to maintain
uniformity in results with different equipment

TX LFPS testing
4/24/2017 16
- DUT transmitted
LFPS will be
captured on
Scope for analysis
- PeRT3 will send
LFPS signal prior
to DUT power up
Upon DUT
power up,
DUT will
detect
LFPS and
transmit its
own LFPS
signals

LFPS testing cont.
 Low frequency periodic signaling (LFPS) is used for side band
communication between the two ports across a link that is in a low
power link state
 Also used when link is under training
 Trigger on start of burst
 Signal level above 100 mV after power-up
 Measure parameters over first 5 bursts
 End of LFPS determined when level drops below 100 mV for 50 ns
 Burst Parameters
 Tburst, trepeat, VTX-PP-LFPS
 tPeriod, Duty Cycle, tRiseFall2080, VCM-DC-LFPS (measured from 100 ns after start to 100 ns before end)
4/24/2017 17

SSC Testing
Scope will demodulate
SSC profile from the
1010 pattern
PeRT3 will transmit
LFPS Ping to request
DUT to rotate to
transmit CP10
- After DUT power and LFPS handshake, DUT will automatically
enter TX compliance mode
- After detecting 1 LFPS ping, DUT will send CP10 (1010 pattern)

Transmitted SSC Profile
 Turn on the DUT and let it pass through to Polling.Compliance substate
 Send a PING.LFPS to the RX port of the device under test to cause the
compliance pattern to transition to CP10
 Capture the transmitted waveform on a high speed oscilloscope over a
minimum of 2,000,000 unit intervals (200 usec) at a sample interval of no
more than 12.5 ps in a single scope capture
 Compute the phase jitter for the captured waveform and apply a 60*33KHz
3 dB cutoff frequency, 40 dB/decade Low Pass Filter to the phase jitter.
 Use the filtered phase jitter to check that the SSC fundamental frequency is
between 30 and 33 KHz. Take the derivative to convert to ppm
 tSSC-FREQ-DEVIATION must vary between one of the following two ranges for each SSC cyle:
• +300/-300 and -3700/-5300 PPM
• -1700/-2300 and -3700/-5300 PPM

Transmitted Equalization test
4/24/2017 20
Figure showing a typical 3-tap equalizer used in Gen 2
Transmitters
Graphical depiction of TXEQ

Contd.
4/24/2017 21
• Gen 2 transmitters employ a 3-tap FIR-based equalizer
• For this test, the DUT needs to be put in a compliance mode and pinged to generate a CP13
pattern
• Transmit the CP13 compliance pattern on the USB port under test and capture the
transmitted waveform on a high speed oscilloscope over a minimum of 2,000,000 unit
intervals
• Repeat for CP14 and CP15 compliance patterns
• Use the SigTest Transmitter Equalization test option to read the saved waveform files for
CP13, CP14, and CP15 and compute the transmitter equalization values from these. All
transmitter equalization values must be within their specified limits

Jitter slew rate testing
4/24/2017 22

Transmitted Eye diagram test
4/24/2017 23
TP2
The Transmit Channel for
Host or Device testing is
simulated in scope software
using S-parameters
Signals are captured at TP2
at the output of the DUT
DUT

Reference channel for different connector types
4/24/2017 24
Connector Type Channel
Std-A Device Under Test >> USB 3.1 Host Fixture 1A >> SCOPE (Embed 6dB Cable + Device PCB)
SSGen2_TxComp12p2dB_Embedding.s4p
Micro-B Device Under Test >> USB 3.1 Device Fixture 1A >> SCOPE (Embed 6dB Cable + Host PCB)
Micro-AB (Host Only) Device Under Test >> USB 3.1 Device Fixture 1A >> SCOPE (Embed 6dB Cable + Device PCB)
Micro-AB (DRD) Device Under Test >> USB 3.1 Device Fixture 1A >> SCOPE (Embed 6dB Cable + Host/Device PCB)
Type-C (Host) Device Under Test >> USB 3.1 Host Fixture 1C >> SCOPE (Embed 6dB Cable + Host/Device PCB)
Type-C (Device) Device Under Test >> USB 3.1 Device Fixture 1C >> SCOPE (Embed 6dB Cable + Host/Device PCB)
Captive (Standard A Plug) Device Under Test >> USB 3.1 Captive Cable Device Fixture Type-A >> SCOPE (Embed Host PCB)
Mock_Host_Cascaded_Model_TypeC_rspl.s8p (TBD – convert to 4p)
Captive (Standard C Plug) Device Under Test >> USB 3.1 Captive Device Fixture Type-C >> SCOPE (Embed Host PCB)
Mock_Host_Cascaded_Model_TypeC_rspl.s8p (TBD – convert to 4p)
All Types No Channel (breakout fixture only)

TX Eye diagram test procedure
4/24/2017 25
• Ping the DUT to put it in to Compliance pattern CP9. Capture the transmitted CP9 waveform over a minimum
of 2M UI with a capture rate no less than 12.5ps
• Repeat this procedure to capture 2M UI of CP10 waveform from the DUT
• Measure the Rj an compare it against the compliance spec.
• Choose the appropriate compliance channel from the table and embed to the measured waveform
• It is important to remember that the TX eye specification is defined after applying the reference equalizer and
jitter transfer function.
• Compute the data eye using CP9 using Rj as input from the CP10 waveform and compare it against
requirements for a 70 mV eye height and a 48.0 ps eye width both at 10-6 BER
• If the DUT is type-C the second differential pair is to be tested by flipping the connector or reconfiguring the
CC line

Signal Through Compliance Channel
Tx Rx

USB 3.1 Gen 2 Reference CTLE
• The Rx equalizer may be required to adapt to different channel losses using the Rx EQ training period
• The reference CTLE for Gen 2 is specified for -5dB DC gain as per the CTS
Different DC gain values are chosen
depending on channel length. For short
channel it is usually 0dB

Reference DFE
4/24/2017 28
 One bit reference DFE is to be used in transmitter compliance testing
 The limits on d1 are 0 to 50mV
 DFE might cause propagation of bit errors if CTLE fails to track an error

LeCroy SDA and Sigtest results
4/24/2017 29

Receiver Testing
4/24/2017 30
 This test verifies that the receiver properly functions in the presence of deterministic and random jitter at
multiple frequencies
 Compliance channels are defined for each connector type with 23dB of insertion loss
 The receiver is tested under loopback condition. The procedure to place a device in to loopback mode by
sending appropriate training sequences is specified in the USB 3.1 standard
 Once the device is in loopback, the BERT sends out a compliance pattern with added jitter through the
reference channels to the receiver
 The receiver loops back the same pattern and any difference to the transmitted sequence is considered a bit
error
 This test requires an extensive calibration process to tune the pattern generator to the amount of jitter to be
injected at different frequencies.
 The calibration process also includes inserting deterministic jitter through lossy compliance boards to close
the received eye to limits specified by the standard. The performance of the receiver is then tested in this
condition

Receiver Compliance Procedure
 Step 1: Calibration/Channel Setup
 Calibrate amplitude, signal conditions and jitter sources at TP1 and TP2
 Step 2: Loopback
 Put Device Under Test in loopback mode
 Step 3: Jitter Tolerance
 Sweep through specified Sj values and measure jitter tolerance based on
BER Transmit Channel
TP2
TP1

Rj and Sj calibration
4/24/2017 32
 Rj and Sj are calibrated at TP1 to limits specified in the standard
 First, the voltage swing and de-emphasis are calibrated at TP1 using a compliance pattern. The target signal
parameters are:
- Voltage swing = 800mV
- TX De-Emphasis = -1.0 +/- .1 dB, -3.1 +/- 1 dB, and -5.0 +/- .1 dB
- Fixed Pre-shoot = 2.2 +/- .1 dB
 Rj is calibrated to within 1.0 +0/-.1 ps RMS with a CP10 pattern without a reference equalizer
 Sj is calibrated to 17.0 ps +0/-10% at 100 MHz with a CP9 sequence. This step is repeated for different
frequencies of Sj from 50MHz to 500kHz at different amplitudes
Figure showing connection for Rj and Sj calibration

Eye height and width calibration
4/24/2017 33
 The purpose of this calibration is to achieve a target Eye height of 70mV +5/-0 mV and target Eye
width of 48 +2/-0 ps at the end of a lossy reference compliance channel defined as per the CTS
 Measure eye height with CP9 at a BER E-6 using the calibrated Sj and Rj values previously
determined using the reference equalizer with DFE and with the CTLE curve fixed to a DC gain of -
5 dB
 There are three compliance load boards of lengths 5.6”, 7.1” and 8.1” available from USB-IF
 The compliance standard mandates that the eye height is measured with each of these compliance
load boards in the reference channel.
 The load board which yields the eye height value closest to 70mV is chosen for the subsequent
steps during calibration and for RX jitter tolerance testing
 The de-emphasis on the pattern generator/BERT is adjusted to achieve the target eye width and
signal amplitude is adjusted to achieve the target eye height. In both cases the reference equalizer
is used

Eye height and width calibration setup
4/24/2017 34
Connector Type Calibration Channel
(Using breakout fixture to
measure at end of channel)
Test Channel
Std-A BERT >> USB 3.1 Compliance
Load Board >> 6 dB Cable >>
USB 3.1 Host Fixture 1A >> USB
3.1 Mock Host 7.2” >> SCOPE
BERT >> USB 3.1 Compliance
USB 3.1 Host Fixture 1A >>
Host Under Test
Micro-B BERT >> USB 3.1 Compliance
USB 3.1 Device Fixture 1A >>
USB 3.1 Mock Device 7.2” >>
SCOPE
Device Under Test
Micro-AB (Host Only) BERT >> USB 3.1 Compliance
SCOPE
Device Under Test
Micro-AB (DRD) BERT >> USB 3.1 Compliance
SCOPE
Device Under Test

RX Jitter tolerance testing
4/24/2017 35
 Connect the DUT as shown in the setup diagram below. Use the De-Emphasis and signal
amplitude found during the eye calibration sequence and Sj of 100MHz
 Place the DUT in loopback using the protocol state machine specified in the standard
 Transmit a “modified” CP9 sequence from the signal source for a total of 2 minutes. The modified
CP9 pattern starts with a SYNC ordered set. Then data blocks are added and scrambled with the
USB10G specific PRBS-23 scrambler polynomial. A single SKP ordered set with 20SKP symbols
(192 bits) must be inserted in the sequence every 40 blocks. At least 65536 data blocks must be
sent before the pattern is repeated
 The test is considered a failure if more than 1 bit error is encountered over 10^12 bits
 The BERT instrument must be capable of removing the SKP sequences from the incoming data
stream
 This test is repeated for different frequencies of Sj

Jitter tolerance test setup
4/24/2017 36
Table showing different Sj frequencies and the amplitudes
Test setup for short channel JTOL testing. All calibrations
have to be repeated for this channel

QPHY USB 3.1 Automated compliance test software
4/24/2017 37
 QPHY-USB3.1-Tx-Rx offers fully automated transmitter and receiver
testing
 Support for both Gen1 (5 Gb/s) and Gen2 (10 Gb/s) DUTs
 Automatically change DUT compliance patterns using the PeRT3 -
QPHY-USB3.1-Tx-Rx can control the PeRT3 communication with
the DUT on the protocol layer by sending a specific number of
Ping.LFPS commands in order to stimulate it to output the required
CP for each test
 QPHY-USB3-Tx-Rx provides full reporting capability including
Pass/Fail indications and screenshots from pertinent test
 Eye Doctor™ II Advanced Signal Integrity Tools enable channel
emulation and CTLE/DFE equalization
 SDAIII-CompleteLinQ enables simultaneous analysis of multiple
points in the USB 3.1 channel

The PERT3 - Phoenix
4/24/2017 38
 PERT3 – Protocol Enabled Receiver Transmitter Tolerance Tester. It is a Bit Error
Rate tester with protocol aware capabilities
 True protocol handshake support in PeRT3 for loopback initialization and TSEQ
training during receiver compliance testing
 Jitter Tolerance Testing for characterization
 Built in 3 tap de-emphasis generator
 User defined test scripting functions for jitter tolerance, equalization optimization
search, and multi-parameter sweep testing
 In-built Rj, Sj, CM and DM sources to provide single box calibration and testing
solution for multiple serial protocols
 PeRT3 Phoenix System also offers true SKP symbol injections and SKP filtering
during BER testing, as well as 128b/132b pattern generation and detection

USB 3.1 - Required Test Equipment for PHY testing
 Oscilloscope
 16 GHz with 80 GS/s
 WaveMaster 816Zi-B or WaveMaster 816Zi-A with WM8Zi-2x80GS
 Software
 QPHY-USB3.1-Tx-Rx, SDAIII, and EyeDrII
 Upgrade option (RK-USB3-USB3.1) for existing QPHY-USB3-Tx-RX customers
 Receiver Tester
 PeRT3 Phoenix Platform,10G option for PeRT3 Phoenix, Receiver Tolerance Test
Suite, USB 3.0 Receiver Tolerance Test Suite and USB 3.1 Receiver Tolerance
Test Suite
 Test Fixtures
 Can be ordered from USB-IF (Custom fixtures for FYI testing)
4/24/2017 39

Type-C connector
 USB Type-C, commonly known as USB-C, is a 24-pin fully reversible plug connector system
allowing transport of data and energy
 A device that implements USB-C may not necessarily support USB 3.1 or USB Power delivery
 Unique cable architecture having same connector on both sides to plug in to either host or
device
 The connector provides four power/ground pairs, two differential pairs for non-SuperSpeed data
(though only one pair is populated in a USB-C cable) and four pairs for SuperSpeed data
 Devices with Type-C ports may be hosts or devices depending on what is detected at the other
end. These types of ports are called Dual-Role-Data (DRD)
 Dual role devices supporting power delivery may swap data and power roles, for example, a
data host might act as a power sink
4/24/2017 41

USB-C connector pin-out
4/24/2017 42
Pin Name Description Pin Name Description
A1 GND Ground return B12 GND Ground return
A2 SSTXp1
SuperSpeed
differential pair #1,
TX, positive
B11 SSRXp1
SuperSpeed
RX, positive
A3 SSTXn1
SuperSpeed
TX, negative
B10 SSRXn1
SuperSpeed
RX, negative
A4 VBUS Bus power B9 VBUS Bus power
A5 CC1
Configuration
channel
B8 SBU2
Sideband use
(SBU)
A6 Dp1
Non-SuperSpeed
differential pair,
position 1, positive
B7 Dn2
Non-SuperSpeed
differential pair,
position 2, negative
A7 Dn1
Non-SuperSpeed
differential pair,
position 1, negative
B6 Dp2
Non-SuperSpeed
differential pair,
position 2, positive
A8 SBU1
Sideband use
(SBU)
B5 CC2
Configuration
channel
A9 VBUS Bus power B4 VBUS Bus power
A10 SSRXn2
SuperSpeed
RX, negative
B3 SSTXn2
SuperSpeed
TX, negative
A11 SSRXp2
SuperSpeed
RX, positive
B2 SSTXp2
SuperSpeed
TX, positive
A12 GND Ground return B1 GND Ground return
USB-C receptacle
USB-C plug

Modes of operation
 Audio Adapter Accessory mode - USB-C plug supports analog headsets through an audio adapter
accessory with a 3.5 mm socket providing four standard analog audio signals (Left, Right, Mic, and GND).
The presence of the audio accessory is signalled through the configuration channel and VCONN
 Alternate mode
- An Alternate Mode dedicates some of the physical wires in a USB-C 3.1 cable for direct device-to-host transmission of
alternate data protocols
- The four high-speed lanes, two side-band pins, and (for dock, detachable device and permanent cable applications
only) two non-SuperSpeed data pins and one configuration pin can be used for alternate mode transmission
- The modes are configured using vendor-defined messages (VDM) through the configuration channel
 The available Alt modes are:
• Display Port Alternate mode
• MHL Alternate mode
• Thunderbird Alternate mode
• HDMI Alternate mode
 Other protocols such as PCIe and Base-T internet are being discussed
4/24/2017 43

DP 1.3 over USB Type-C – A case study
4/24/2017 44

Some USB-C interfaces
4/24/2017 45
Image courtesy of Choetech
Copyright ©2017 CHOETECH TECHNOLOGY
All Rights Reserved
Image courtesy of Satechi
©Satechi 2014 All Rights Reserved
Image courtesy of Apple Inc.
Copyright © 2017 Apple Inc. All rights reserved.

USB - PD
 The GRL-USB-PD software is a compliance package developed by Granite
River Labs which is now compatible with Teledyne LeCroy oscilloscopes
 The GRL-USB-PD-C1 Type-C hardware test controller is used to automate the
test process
 Performs testing as per chapters 5,6 and 7 of the compliance spec
 Supports USB Power Delivery Protocol, Compliance, Decode, and Debug along
with Electrical Measurements
 The Voyager M310C is Teledyne LeCroy’s USB protocol verification system
designed for the latest evolution of universal serial bus, USB Type-C, and
includes support for USB Power Delivery
4/24/2017 46

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