This document provides an outline for a TinyOS tutorial that introduces the TinyOS operating system and development environment. It covers the hardware primer, introduction to TinyOS, installation and configuration, NesC syntax, network communication, sensor data acquisition, debugging techniques, and concludes with an overview of the Agilla mobile agent system. The outline includes 10 sections that will guide students through understanding the TinyOS hardware platforms, programming model, components, interfaces, and building/installing applications.
Webinar: STM32WB - microcontrolador dual-core certificado BLE 5.0Embarcados
STMicroelectronics apresenta a família STM32WB que é o primeiro e único dual-core Cortex-M4 e Cortex-M0 + MCU no mercado certificado Bluetooth Low Energy v5.0 e 802.15.4. Para acompanhar a chegada desses componentes, também estamos lançando o STM32CubeMonRF, uma ferramenta de software para ajudar os desenvolvedores a testar e configurar seu rádio com mais eficiência. Também estamos lançando o P-NUCLEO-WB55, um pacote de desenvolvimento contendo uma placa Nucleo 64 clássica e um dongle USB. Ambos são fornecidos com o aplicativo de demonstração do microcontrolador,onde oferece uma experiência verdadeiramente única, pronta para uso.
Assista o webinar em: https://www.embarcados.com.br/webinars/webinar-stm32wb/
⭐⭐⭐⭐⭐ Monitoring of system memory usage embedded in #FPGAVictor Asanza
Introduction:
Field Programmable Gate Array #FPGA
System on Chip #SoC
#Nios_II_Processor
Hard Processor System #HPS
Advanced RISC Machine #ARM
Logical bridges
Share physical resources
Related Works:
Renovell et Al., testing #RAM modules in #FPGA
Focus on functional tests RAM of the FPGA
Wei et Al., RAM memory monitoring
Embedded System from the #HardProcessor
Wang et Al., Real-time applications
Use memory optimized way during the execution of tasks based on SoC architecture
real-time Electrocardiogram #ECG
FPGA with two 8GB Dual Data Rate Synchronous Dynamic Random Access Memories #DDR3 #SDRAM
Results:
As shown in Fig 12, the SRAM is working in the logical part executing several tasks and it is validated that as time passes the memory consumption increases. In addition, the writing times will depend on the amount of memory to be written and this varies according to the task that is being executed by the user or those that he has programmed in the Nios II.
As for the DD3, it is executing the Linux OS as a basis and additionally, a size proportional to the size of the SRAM is reserved for the respective comparisons, so it is observed that it has a higher consumption and longer response times. It should be considered in this comparison that the DD3 in addition to running the OS, also has the web server implemented which consumption varies according to the clients that are connecting to the webpage where it can be seen the memory monitoring of the embedded system. Also, thanks to the part of the HPS it is possible to monitor the memory of the embedded system without affecting its consumption.
As shown in Fig. 13, the SRAM is not under the same workload since it is only responsible for storing what Nios II needs for the execution of the tasks.
Finally, it was consider that the HPS portion to be very important for a clean monitoring not only of the SRAM but also of any core that is implemented in the FPGA portion, since if this application is implemented on a chip that only has FPGA the application would affect the consumption and performance of it, therefore you could not have completely reliable results.
Intel Processor Trace (or Intel PT) is an processor extension for IA64 and IA32. The extension captures how a program got executed in machine-instruction level. All dynamic events, such as, branches, calls and interrupts, are recorded. This allows perfect reconstruction of previous execution by a trace analyzer.
This slide summarizes which data is generated out from this extension.
Webinar: STM32WB - microcontrolador dual-core certificado BLE 5.0Embarcados
STMicroelectronics apresenta a família STM32WB que é o primeiro e único dual-core Cortex-M4 e Cortex-M0 + MCU no mercado certificado Bluetooth Low Energy v5.0 e 802.15.4. Para acompanhar a chegada desses componentes, também estamos lançando o STM32CubeMonRF, uma ferramenta de software para ajudar os desenvolvedores a testar e configurar seu rádio com mais eficiência. Também estamos lançando o P-NUCLEO-WB55, um pacote de desenvolvimento contendo uma placa Nucleo 64 clássica e um dongle USB. Ambos são fornecidos com o aplicativo de demonstração do microcontrolador,onde oferece uma experiência verdadeiramente única, pronta para uso.
Assista o webinar em: https://www.embarcados.com.br/webinars/webinar-stm32wb/
⭐⭐⭐⭐⭐ Monitoring of system memory usage embedded in #FPGAVictor Asanza
Introduction:
Field Programmable Gate Array #FPGA
System on Chip #SoC
#Nios_II_Processor
Hard Processor System #HPS
Advanced RISC Machine #ARM
Logical bridges
Share physical resources
Related Works:
Renovell et Al., testing #RAM modules in #FPGA
Focus on functional tests RAM of the FPGA
Wei et Al., RAM memory monitoring
Embedded System from the #HardProcessor
Wang et Al., Real-time applications
Use memory optimized way during the execution of tasks based on SoC architecture
real-time Electrocardiogram #ECG
FPGA with two 8GB Dual Data Rate Synchronous Dynamic Random Access Memories #DDR3 #SDRAM
Results:
As shown in Fig 12, the SRAM is working in the logical part executing several tasks and it is validated that as time passes the memory consumption increases. In addition, the writing times will depend on the amount of memory to be written and this varies according to the task that is being executed by the user or those that he has programmed in the Nios II.
As for the DD3, it is executing the Linux OS as a basis and additionally, a size proportional to the size of the SRAM is reserved for the respective comparisons, so it is observed that it has a higher consumption and longer response times. It should be considered in this comparison that the DD3 in addition to running the OS, also has the web server implemented which consumption varies according to the clients that are connecting to the webpage where it can be seen the memory monitoring of the embedded system. Also, thanks to the part of the HPS it is possible to monitor the memory of the embedded system without affecting its consumption.
As shown in Fig. 13, the SRAM is not under the same workload since it is only responsible for storing what Nios II needs for the execution of the tasks.
Finally, it was consider that the HPS portion to be very important for a clean monitoring not only of the SRAM but also of any core that is implemented in the FPGA portion, since if this application is implemented on a chip that only has FPGA the application would affect the consumption and performance of it, therefore you could not have completely reliable results.
Intel Processor Trace (or Intel PT) is an processor extension for IA64 and IA32. The extension captures how a program got executed in machine-instruction level. All dynamic events, such as, branches, calls and interrupts, are recorded. This allows perfect reconstruction of previous execution by a trace analyzer.
This slide summarizes which data is generated out from this extension.
Bridging the gap between hardware and software tracingChristian Babeux
For a numbers of years, silicon vendors have been providing hardware tracing facilities to embedded developers. By using these, developers can resolve performance and latency issues more quickly, resulting in shorter time to market. In this talk, we will cover the hardware based tracing facilities offered by various manufacturers and see how they differ from their software counterparts with respect to their instrumentation capabilities, transport mechanisms, output formats, etc. We will also show how joint hardware and software tracing can be used by developers to gain deeper insights in their applications’ behaviour. Finally, we will outline the on-going work within the Linux Trace Toolkit next generation (LTTng) project to enhance hardware tracing support and tracing data visualization.
Embedded Android System Development - Part II talks about Hardware Abstraction Layer (HAL). HAL is an interfacing layer through which Android service can place a request to device. Uses functions provided by Linux system to service the request from android framework. A C/C++ layer with purely vendor specific implementation. Packaged into modules (.so) file & loaded by Android system at appropriate time
⭐⭐⭐⭐⭐ 2020 TELTEC WEBINAR: Clasificación de señales de Electroencefalografía ...Victor Asanza
IV Jornada de Telecomunicaciones - #TELTEC_2020
Agenda:
✅ Introducción
✅ Clustering of #EEG Occipital Signals using #K_means
⇨ Asanza, V., Ochoa, K., Sacarelo, C., Salazar, C., Loayza, F., Vaca, C., & Peláez, E. (2016, October). Clustering of EEG occipital signals using k-means. In Ecuador Technical Chapters Meeting (ETCM), IEEE (pp. 1-5). IEEE.
⇨ EEG Signal Clustering for Motor and Imaginary Motor Tasks on Hands and Feet
Asanza, V., Pelaez, E., & Loayza, F. (2017, October). EEG signal clustering for motor and imaginary motor tasks on hands and feet. In Ecuador Technical Chapters Meeting (ETCM), 2017 IEEE (pp. 1-5). IEEE.
✅ Field Programmable Gate Arrays (#FPGAs)
✅ Implementation of a Classification System of EEG Signals Based on FPGA
✅ Otros proyectos con FPGA
⇨ C. Cedeño Z., J. Cordova-Garcia, V. Asanza A., R. Ponguillo and L. Muñoz M., "k-NN-Based EMG Recognition for Gestures Communication with Limited Hardware Resources," 2019 IEEE SmartWorld, Ubiquitous Intelligence & Computing, Advanced & Trusted Computing, Scalable Computing & Communications, Cloud & Big Data Computing, Internet of People and Smart City Innovation (SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI), Leicester, United Kingdom, 2019, pp. 812-817.
⇨ 2019: Artificial Neural Network based EMG recognition for gesture communication (InnovateFPGA)
✅ Preguntas
Greybus is the name for a new application layer protocol on top of Unipro that controls the Ara Phone from Google. This protocol turns a phone into a modular device, allowing any part of the system to be hotplugged while the phone is running.
This talk will describe what this protocol is, why it was designed, and give the basics for how it works. It will discuss how this is implemented in the Linux kernel, and how it easily bridges existing hardware like USB, I2C, GPIO and others with little to no changes needed to existing kernel drivers.
Greg KH, Linux Foundation
Overview of the BF609 dual-core Blackfin processor series covering main features including the Pipelined Vision Processor including the hardware and software development tools. By Analog Devices
Xilinx vs Intel (Altera) FPGA performance comparison Roy Messinger
You're welcome to check out this interesting comparison I've conducted between these 2 vendors. Very interesting and surprising results (I did not expect such differences).
Recon: Hopeless relay protection for substation automation Sergey Gordeychik
Recon 2017: By Kirill Nesterov, Alexander Tlyapov
Digital Substation is an essential part of every electrical network. It is also a base ground for modern Smart Grid technologies. More than 4000 of IEC 61850 compatible substations operated in Europe, 20 000+ worldwide, each of the comprising communication and flow of gigawatts of electrical current between large power plants (thermoelectrical, hydroelectrical or even nuclear) and their respective consumers. Such consumers include cities, industrial objects and power plants themselves. During this talk we will focus on security analysis results of key Digital Substation component - Relay Protection Terminals. Protective relays are devices for detection of electrical faults. When such fault is detected relay device designed to trip a circuit breaker. Without them problems like over-current, over-voltage, reverse power flow, over-frequency, and under-frequency can lead to colorful and impressive pictures of giant electric arcs accompanied by bunch of sparks with total blackouts as a result.
Nowadays protective relays became digital devices with network access through which operators can access different services like self-testing, statistics, logs and others. More of it, electrical lines are also combined with fiber-optic lines for communications. Electrical part of such lines need minimal traffic, but protection against surges. So such lines can be leased to different organizations, exposing great target for attacker. All of services inside such networks are available through different industrial protocols like IEC 61850 (MMS, GOOSE), IEC104 and Modbus, a not very industrial protocols HTTP, FTP, SSH and everybody’s favorite proprietary protocols. We will show how to dig very deep inside Relay Protection Terminal and how to abuse numerous weaknesses and vulnerabilities inside.
Bridging the gap between hardware and software tracingChristian Babeux
For a numbers of years, silicon vendors have been providing hardware tracing facilities to embedded developers. By using these, developers can resolve performance and latency issues more quickly, resulting in shorter time to market. In this talk, we will cover the hardware based tracing facilities offered by various manufacturers and see how they differ from their software counterparts with respect to their instrumentation capabilities, transport mechanisms, output formats, etc. We will also show how joint hardware and software tracing can be used by developers to gain deeper insights in their applications’ behaviour. Finally, we will outline the on-going work within the Linux Trace Toolkit next generation (LTTng) project to enhance hardware tracing support and tracing data visualization.
Embedded Android System Development - Part II talks about Hardware Abstraction Layer (HAL). HAL is an interfacing layer through which Android service can place a request to device. Uses functions provided by Linux system to service the request from android framework. A C/C++ layer with purely vendor specific implementation. Packaged into modules (.so) file & loaded by Android system at appropriate time
⭐⭐⭐⭐⭐ 2020 TELTEC WEBINAR: Clasificación de señales de Electroencefalografía ...Victor Asanza
IV Jornada de Telecomunicaciones - #TELTEC_2020
Agenda:
✅ Introducción
✅ Clustering of #EEG Occipital Signals using #K_means
⇨ Asanza, V., Ochoa, K., Sacarelo, C., Salazar, C., Loayza, F., Vaca, C., & Peláez, E. (2016, October). Clustering of EEG occipital signals using k-means. In Ecuador Technical Chapters Meeting (ETCM), IEEE (pp. 1-5). IEEE.
⇨ EEG Signal Clustering for Motor and Imaginary Motor Tasks on Hands and Feet
Asanza, V., Pelaez, E., & Loayza, F. (2017, October). EEG signal clustering for motor and imaginary motor tasks on hands and feet. In Ecuador Technical Chapters Meeting (ETCM), 2017 IEEE (pp. 1-5). IEEE.
✅ Field Programmable Gate Arrays (#FPGAs)
✅ Implementation of a Classification System of EEG Signals Based on FPGA
✅ Otros proyectos con FPGA
⇨ C. Cedeño Z., J. Cordova-Garcia, V. Asanza A., R. Ponguillo and L. Muñoz M., "k-NN-Based EMG Recognition for Gestures Communication with Limited Hardware Resources," 2019 IEEE SmartWorld, Ubiquitous Intelligence & Computing, Advanced & Trusted Computing, Scalable Computing & Communications, Cloud & Big Data Computing, Internet of People and Smart City Innovation (SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI), Leicester, United Kingdom, 2019, pp. 812-817.
⇨ 2019: Artificial Neural Network based EMG recognition for gesture communication (InnovateFPGA)
✅ Preguntas
Greybus is the name for a new application layer protocol on top of Unipro that controls the Ara Phone from Google. This protocol turns a phone into a modular device, allowing any part of the system to be hotplugged while the phone is running.
This talk will describe what this protocol is, why it was designed, and give the basics for how it works. It will discuss how this is implemented in the Linux kernel, and how it easily bridges existing hardware like USB, I2C, GPIO and others with little to no changes needed to existing kernel drivers.
Greg KH, Linux Foundation
Overview of the BF609 dual-core Blackfin processor series covering main features including the Pipelined Vision Processor including the hardware and software development tools. By Analog Devices
Xilinx vs Intel (Altera) FPGA performance comparison Roy Messinger
You're welcome to check out this interesting comparison I've conducted between these 2 vendors. Very interesting and surprising results (I did not expect such differences).
Recon: Hopeless relay protection for substation automation Sergey Gordeychik
Recon 2017: By Kirill Nesterov, Alexander Tlyapov
Digital Substation is an essential part of every electrical network. It is also a base ground for modern Smart Grid technologies. More than 4000 of IEC 61850 compatible substations operated in Europe, 20 000+ worldwide, each of the comprising communication and flow of gigawatts of electrical current between large power plants (thermoelectrical, hydroelectrical or even nuclear) and their respective consumers. Such consumers include cities, industrial objects and power plants themselves. During this talk we will focus on security analysis results of key Digital Substation component - Relay Protection Terminals. Protective relays are devices for detection of electrical faults. When such fault is detected relay device designed to trip a circuit breaker. Without them problems like over-current, over-voltage, reverse power flow, over-frequency, and under-frequency can lead to colorful and impressive pictures of giant electric arcs accompanied by bunch of sparks with total blackouts as a result.
Nowadays protective relays became digital devices with network access through which operators can access different services like self-testing, statistics, logs and others. More of it, electrical lines are also combined with fiber-optic lines for communications. Electrical part of such lines need minimal traffic, but protection against surges. So such lines can be leased to different organizations, exposing great target for attacker. All of services inside such networks are available through different industrial protocols like IEC 61850 (MMS, GOOSE), IEC104 and Modbus, a not very industrial protocols HTTP, FTP, SSH and everybody’s favorite proprietary protocols. We will show how to dig very deep inside Relay Protection Terminal and how to abuse numerous weaknesses and vulnerabilities inside.
Modular, Scalable Learning: How to Drive Product Launch and Customer Training...Bottom-Line Performance
We’re all facing the same challenges: product launch cycles are tighter, content is ever-changing and customers have high expectations for the training they will receive. This session explores how organizations can meet these challenges by adopting modular, scalable training practices to produce meaningful business outcomes and drive down costs. We’ll also share a case study of a Roche Diagnostics learning program that was a winner in the 2015 LTEN awards.
Central sensitization as normal response to injuryArturo Such Sanz
Descripción de la respuesta fisiológica de sensibilización central en respuesta a una activación de la nocicepción y su correlato consciente en forma de dolor.
Criterios de valoración de una lesión sensibilización central patológica o potencialmente patológica, especialmente en dolor lumbar y latigazo cervical. Extrapolación a la mano.
Low-cost microcontrollers are being used more and more often in embedded applications that previously may have used a microprocessor. Microcontrollers often run a real-time operating system (RTOS) rather than a full operating system like Linux. In this webinar we introduce FreeRTOS, a popular RTOS for microcontrollers that has been ported to 35 microcontroller platforms.
uCluster (micro-Cluster) is a toy computer cluster composed of 3 Raspberry Pi boards, 2 NVIDIA Jetson Nano boards and 1 NVIDIA Jetson TX2 board.
The presentation shows how to build the uCluster and focuses on few interesting technologies for further consideration when building a cluster at any scale.
The project is for educational purposes and tinkering with various technologies.
About the author: Priya Autee is software engineer at Intel working on various leading edge IA features and Intel(R) RDT expert. She is focused on prototyping and researching open source APIs like DPDK, Intel(R) RDT etc. to support NFV/compute sensitive requirements on Intel Architecture. She holds Masters in Computer Science from Arizona State University, Arizona.
Summer training embedded system and its scopeArshit Rai
CETPA INFOTECH PVT LTD is one of the IT education and training service provider brands of India that is preferably working in 3 most important domains. It includes IT Training services, software and embedded product development and consulting services.
http://www.cetpainfotech.com
Summer training embedded system and its scopeArshit Rai
CETPA INFOTECH PVT LTD is one of the IT education and training service provider brands of India that is preferably working in 3 most important domains. It includes IT Training services, software and embedded product development and consulting services.
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded SystemsArti Parab Academics
Core of embedded systems: microprocessors and microcontrollers, RISC and CISC controllers, Big endian and Little endian processors, Application specific ICs, Programmable logic devices, COTS, sensors and actuators, communication interface, embedded firmware, other system components.
ETHERNET PACKET PROCESSOR FOR SOC APPLICATIONcscpconf
As the demand for Internet expands significantly in numbers of users, servers, IP addresses,
switches and routers, the IP based network architecture must evolve and change. The design
of domain specific processors that require high performance, low power and high degree of
programmability is the bottleneck in many processor based applications. This paper describes
the design of ethernet packet processor for system-on-chip (SoC) which performs all core
packet processing functions, including segmentation and reassembly, packetization
classification, route and queue management which will speedup switching/routing
performance. Our design has been configured for use with multiple projects ttargeted to a
commercial configurable logic device the system is designed to support 10/100/1000 links with a speed advantage. VHDL has been used to implement and simulated the required functions in FPGA.
Welcome to TechSoup New Member Orientation and Q&A (May 2024).pdfTechSoup
In this webinar you will learn how your organization can access TechSoup's wide variety of product discount and donation programs. From hardware to software, we'll give you a tour of the tools available to help your nonprofit with productivity, collaboration, financial management, donor tracking, security, and more.
The Indian economy is classified into different sectors to simplify the analysis and understanding of economic activities. For Class 10, it's essential to grasp the sectors of the Indian economy, understand their characteristics, and recognize their importance. This guide will provide detailed notes on the Sectors of the Indian Economy Class 10, using specific long-tail keywords to enhance comprehension.
For more information, visit-www.vavaclasses.com
How to Split Bills in the Odoo 17 POS ModuleCeline George
Bills have a main role in point of sale procedure. It will help to track sales, handling payments and giving receipts to customers. Bill splitting also has an important role in POS. For example, If some friends come together for dinner and if they want to divide the bill then it is possible by POS bill splitting. This slide will show how to split bills in odoo 17 POS.
How to Make a Field invisible in Odoo 17Celine George
It is possible to hide or invisible some fields in odoo. Commonly using “invisible” attribute in the field definition to invisible the fields. This slide will show how to make a field invisible in odoo 17.
Read| The latest issue of The Challenger is here! We are thrilled to announce that our school paper has qualified for the NATIONAL SCHOOLS PRESS CONFERENCE (NSPC) 2024. Thank you for your unwavering support and trust. Dive into the stories that made us stand out!
2024.06.01 Introducing a competency framework for languag learning materials ...Sandy Millin
http://sandymillin.wordpress.com/iateflwebinar2024
Published classroom materials form the basis of syllabuses, drive teacher professional development, and have a potentially huge influence on learners, teachers and education systems. All teachers also create their own materials, whether a few sentences on a blackboard, a highly-structured fully-realised online course, or anything in between. Despite this, the knowledge and skills needed to create effective language learning materials are rarely part of teacher training, and are mostly learnt by trial and error.
Knowledge and skills frameworks, generally called competency frameworks, for ELT teachers, trainers and managers have existed for a few years now. However, until I created one for my MA dissertation, there wasn’t one drawing together what we need to know and do to be able to effectively produce language learning materials.
This webinar will introduce you to my framework, highlighting the key competencies I identified from my research. It will also show how anybody involved in language teaching (any language, not just English!), teacher training, managing schools or developing language learning materials can benefit from using the framework.
Ethnobotany and Ethnopharmacology:
Ethnobotany in herbal drug evaluation,
Impact of Ethnobotany in traditional medicine,
New development in herbals,
Bio-prospecting tools for drug discovery,
Role of Ethnopharmacology in drug evaluation,
Reverse Pharmacology.
6. ADC Notes
• The 10-bit ADC channels are ratiometric
– Don’t need battery voltage to calibrate sensor
– May not work over full voltage range!
• If you’re getting weird sensor readings,
CHECK THE BATTERIES!
7. Programming Board (MIB510)
Mote JTAG
MICA2Dot interface
Serial interface
to laptop MICA2 interface
ISPJTAG
Block data
to laptop
5V Power
Cost: $95 Reset
9. TinyOS Tutorial Outline
1. Hardware Primer
2. Introduction to TinyOS
3. Installation and Configuration
4. NesC Syntax
5. Network Communication
6. Sensor Data Acquisition
7. Debugging Techniques
8. Agilla pep talk
10. What is TinyOS?
• An operating system
• An open-source development environment
– A programming language and model (NesC)
– A set of services
• Main Ideology
– HURRY UP AND SLEEP!!
• Sleep as often as possible to save power
– High concurrency, interrupt driven (no polling)
11. Data Memory Model
• STATIC memory allocation!
– No heap (malloc) Stack
– No function pointers
• Global variables
Free
– Available on a per-frame basis 4KB
• Local variables
– Saved on the stack
Global
– Declared within a method
12. Programming Model
• Separation of construction and composition
• Programs are built out of components
• Each component is specified by an interface
– Provides “hooks” for wiring components
together
• Components are statically wired together
based on their interfaces
– Increases runtime efficiency
13. Components
• Components use and provide interfaces,
commands, and events
– Specified by a component’s interface
– The word “interface” has two meanings in TinyOS
• Components implement the events they use
and the commands they provide:
Component Commands Events
Use Can call Must Implement
Provide Must Implement Can signal
14. Types of Components
• There are two types of components:
– Modules: Implement the application behavior
– Configurations: Wires components together
• A component does not care if another
component is a module or configuration
• A component may be composed of other
components
15. TinyOS Thread Model
• Tasks:
– Time flexible
– Longer background processing jobs
– Atomic with respect to other tasks (single threaded)
– Preempted by events
• Events:
– Time critical
– Shorter duration (hand off to task if need be)
– Interrupts task
– Last-in first-out semantics (no priority among events)
• Do not confuse an event from the NesC event
keyword!!
• TinyOS 1.1 supports up to 7 pending tasks, from 1.1.5
on you can add -DTOSH_MAX_TASKS_LOG2=n to
makefile’s PFLAGS line to get 2^n tasks
16. Component Hierarchy
• Components are wired
together by connecting Event TimerC
users with providers handler
– Forms a hierarchy
event command
• Commands:
– Flow downwards
– Control returns to caller Event ClockC
handler
• Events:
– Flow upwards event command
– Control returns to signaler
• Events can call HPLClock
Commands but not vice
versa
17. TinyOS Tutorial Outline
1. Hardware Primer
2. Introduction to TinyOS
3. Installation and Configuration
4. NesC Syntax
5. Network Communication
6. Sensor Data Acquisition
7. Sensor Data Acquisition
8. Debugging Techniques
9. Agilla pep talk
18. TinyOS Installation
• Download TinyOS from:
http://www.tinyos.net/download.html
– Patch it to 1.1.7 (or whatever is the latest)
– Version release notes available here:
http://www.tinyos.net/tinyos-1.x/doc/
• The default install puts TinyOS in
C:tinyoscygwinopttinyos-1.x
– Let this be denoted <tos>
20. Customizing the Environment
• Add aliases to C:tinyoscygwinetcprofile
alias cdjava="cd /opt/tinyos-1.x/tools/java"
alias cdtos="cd /opt/tinyos-1.x"
alias cdapps="cd /opt/tinyos-1.x/apps"
• Create <tos>appsMakelocal
– Type the following inside it:
This must be PFLAGS += -DCC1K_DEF_FREQ=433002000 Change to
unique DEFAULT_LOCAL_GROUP=0x01 your local
MIB510=/dev/ttyS8 serial port
– See http://www.tinyos.net/tinyos-
1.x/doc/tutorial/buildenv.html for more options
21. The make System
• From within the application’s directory:
• make (re)install.<node id> <platform>
– <node id> is an integer between 0 and 255
– <platform> may be mica2, mica2dot, or all
• make clean
• make docs
– Generates documentation in <tos>/doc/nesdoc/mica2
• make pc
– Generates an executable that can be run a pc for
simulation
22. Build Tool Chain
Convert NesC into C
and compile to exec
Modify exec with
platform-specific
options
Set the mote ID
Reprogram the
mote
26. Interface Syntax
• Look in <tos>/tos/interfaces/SendMsg.nc
includes AM; // includes AM.h located in <tos>tostypes
interface SendMsg {
// send a message
command result_t send(uint16_t address, uint8_t length, TOS_MsgPtr msg);
// an event indicating the previous message was sent
event result_t sendDone(TOS_MsgPtr msg, result_t success);
•}
• Multiple components may provide and use
this interface
27. Interface StdControl
• Look in <tos>/tos/interfaces/StdControl.nc
interface StdControl {
// Initialize the component and its subcomponents.
command result_t init();
// Start the component and its subcomponents.
command result_t start();
// Stop the component and pertinent subcomponents
command result_t stop();
}
• Every component should provide this interface
– This is good programming technique, it is not a
language specification
28. Module Syntax: Interface
• Look in <tos>/tos/system/AMStandard.nc
module AMStandard {
provides {
interface StdControl as Control;
interface SendMsg[uint8_t id]; // parameterized by AM ID
command uint16_t activity(); // # of packets sent in past second
…
Component
}
Interface
uses {
event result_t sendDone();
interface StdControl as UARTControl;
…
}
}
implementation {
…// code implementing all provided commands and used events
}
30. Async and Atomic
• Anything executed as a direct result of a
hardware interrupt must be declared async
– E.g., async command result_t cmdName(…)
– See <tos>/tos/system/TimerM.nc for cross-boundary example
• Variables shared across sync and async
boundaries should be protected by atomic{…}
– Can skip if you put norace in front of variable
declaration (Use at your own risk!!)
– There are lots of examples in HPL*.nc components
found under <tos>/tos/platform (e.g., HPLClock.nc)
31. Configuration Syntax: Interface
• Look in <tos>/tos/system/GenericComm.nc
configuration GenericComm {
provides {
interface StdControl as Control;
Component interface SendMsg[uint8_t id]; //parameterized by active message id
Interface interface ReceiveMsg[uint8_t id];
command uint16_t activity();
}
uses { event result_t sendDone();}
}
implementation {
components AMStandard, RadioCRCPacket as RadioPacket, TimerC,
Component
NoLeds as Leds, UARTFramedPacket as UARTPacket,
Selection
HPLPowerManagementM;
… // code wiring the components together
}
32. Configuration Syntax: Wiring
• Still in <tos>/tos/system/GenericComm.nc
configuration GenericComm {
provides {
interface StdControl as Control;
interface SendMsg[uint8_t id]; //parameterized by active message id
command uint16_t activity(); …
}
uses {event result_t sendDone(); …}
}
implementation {
components AMStandard, TimerC, …;
Control = AMStandard.Control;
SendMsg = AMStandard.SendMsg;
activity = AMStandard.activity;
AMStandard.TimerControl -> TimerC.StdControl;
AMStandard.ActivityTimer -> TimerC.Timer[unique("Timer")]; …
}
33. Configuration Wires
• A configuration can bind an interface user to a
provider using -> or <-
– User.interface -> Provider.interface
– Provider.interface <- User.interface
• Bounce responsibilities using =
– User1.interface = User2.interface
– Provider1.interface = Provider2.interface
• The interface may be implicit if there is no
ambiguity
– e.g., User.interface -> Provider ==
User.interface -> Provider.interface
34. Fan-Out and Fan-In
• A user can be mapped to multiple providers (fan-out)
– Open <tos>appsCntToLedsAndRfmCntToLedsAndRfm.nc
configuration CntToLedsAndRfm { }
implementation {
components Main, Counter, IntToLeds, IntToRfm, TimerC;
Main.StdControl -> Counter.StdControl;
Main.StdControl -> IntToLeds.StdControl;
Main.StdControl -> IntToRfm.StdControl;
Main.StdControl -> TimerC.StdControl;
Counter.Timer -> TimerC.Timer[unique("Timer")];
IntToLeds <- Counter.IntOutput;
Counter.IntOutput -> IntToRfm;
}
• A provider can be mapped to multiple users (fan-in)
35. Potential Fan-Out Bug
• Whenever you fan-out/in an interface,
ensure the return value has a combination
function
– Can do:
App.Leds -> LedsC;
App.Leds -> NoLeds;
– CANNOT do:
AppOne.ReceiveMsg -> GenericComm.ReceiveMsg[12];
AppTwo.ReceiveMsg -> GenericComm.ReceiveMsg[12];
36. Top-Level Configuration
• All applications must contain a top-level
configuration that uses Main.StdControl
– Open <tos>/apps/BlinkTask/BlinkTask.nc
configuration BlinkTask { }
implementation {
components Main, BlinkTaskM, SingleTimer, LedsC;
Main.StdControl -> BlinkTaskM.StdControl;
Main.StdControl -> SingleTimer;
BlinkTaskM.Timer -> SingleTimer;
BlinkTaskM.Leds -> LedsC;
}
37. TinyOS Tutorial Outline
1. Hardware Primer
2. Introduction to TinyOS
3. Installation and Configuration
4. NesC Syntax
5. Network Communication
6. Sensor Data Acquisition
7. Debugging Techniques
8. Agilla pep talk
38. Inter-Node Communication
• General idea:
– Sender:
Determine when
Fill message Specify Pass buffer
message buffer
buffer with data Recipients to OS
can be reused
– Receiver:
OS Buffers Signal OS obtains free
incoming message application with buffer to store
in a free buffer new message next message
39. Group IDs and Addresses
• Group IDs create a virtual network
– Group ID is an 8 bit value specified in
<tos>/apps/Makelocal
• The address is a 16-bit value specified by the
make command
– make install.<id> mica2
– Reserved addresses:
• 0x007E - UART (TOS_UART_ADDR)
• 0xFFFF - broadcast (TOS_BCAST_ADDR)
– Local address: TOS_LOCAL_ADDRESS
40. TOS Active Messages
• TOS uses active typedef struct TOS_Msg {
// the following are transmitted
messages as defined in uint16_t addr;
<tos>/system/types/AM.h uint8_t type;
• Message is “active” uint8_t group;
because it contains the uint8_t length;
int8_t data[TOSH_DATA_LENGTH];
destination address, uint16_t crc;
group ID, and type // the following are not transmitted
• TOSH_DATA_LENGTH = uint16_t strength;
29 bytes uint8_t ack;
uint16_t time;
– Can change via
uint8_t sendSecurityMode;
MSG_SIZE=x in Makefile
uint8_t receiveSecurityMode;
– Max 36 } TOS_Msg;
Header (5) Payload (29) CRC
41. Active Messaging (Cont.)
AM Handler AM Handler AM Handler
Application 47 48 49
Tos_Msg[AM=47] signal[48]
signal[47] signal[49]
GenericComm GenericComm
AMStandard AMStandard
Radio Stack, TX Radio Stack, RX
Wireless
42. Message Buffer Ownership
call send(&Msg_Buffer)
TOS AM
Transmitter
Subsystem
signal sendDone(*Msg_Buffer)
signal receive(*Msg_Buffer1)
TOS AM
Receiver
Subsystem
return *Msg_Buffer2
• Transmission: AM gains ownership of the buffer until
sendDone(…) is signaled
• Reception: Application’s event handler gains ownership
of the buffer, but it must return a free buffer for the next
message
43. Sending a message (1 of 3)
• First create a .h file with a struct defining
the message data format, and a unique
active message number
– Open <tos>/apps/Oscilloscope/OscopeMsg.h
struct OscopeResetMsg
struct OscopeMsg
{
{
/* Empty payload! */
uint16_t sourceMoteID;
};
uint16_t lastSampleNumber;
uint16_t channel;
enum {
uint16_t data[BUFFER_SIZE];
AM_OSCOPEMSG = 10,
};
AM_OSCOPERESETMSG = 32
};
44. Sending a Message (2 of 3)
module OscilloscopeM { …
uses interface SendMsg as DataMsg; …
}
implementation{
TOS_Msg msg; …
task void dataTask() {
struct OscopeMsg *pack = (struct OscopeMsg *)msg.data;
… // fill up the message
call DataMsg.send(TOS_BCAST_ADDR, sizeof(struct OscopeMsg),
&msg[currentMsg]);
}
event result_t DataMsg.sendDone(TOS_MsgPtr sent, result_t success) {
return SUCCESS;
}
}
Question: How does TOS know the AM number?
45. Sending a Message (3 of 3)
• The AM number is determined by the
configuration file
– Open <tos>/apps/OscilloscopeRF/Oscilloscope.nc
configuration Oscilloscope { }
implementation {
components Main, OscilloscopeM, GenericComm as Comm, …;
…
OscilloscopeM.DataMsg -> Comm.SendMsg[AM_OSCOPEMSG];
}
47. Sending Data to a Laptop
• A mote on the programming board can send data to the
laptop via the UART port
• There are several applications that bridge between the
wireless network and UART port
– <tos>/apps/TOSBase – forwards only messages with correct
GroupID
– <tos>/apps/TransparentBase – ignores GroupID
– <tos>/apps/GenericBase – legacy support
• LED status:
– Green = good packet received and forwarded to UART
– Yellow = bad packet received (failed CRC)
– Red = transmitted message from UART
48. Displaying Received Data
• Java application: net.tinyos.tools.Listen
– Located in <tos>/tools/java/
– Relies on MOTECOM environment variable
• Export MOTECOM=serial@COMx:57600
header OscopeMsg data payload (Big Endian)
49. Working with the Received Data
• TinyOS comes with a SerialPortForwarder that
forwards UART packets to a local TCP socket
– Allows multiple applications to access the sensor
network
50. Java Applications
• Class net.tinyos.message.MoteIF interfaces
with the SerialForwarder’s TCP port
– Provides net.tinyos.message.Message objects
containing the message data
import net.tinyos.message.*;
This must extend
import net.tinyos.util.*;
net.tinyos.message.Message,
which is generated using
public class MyJavaApp {
/usr/local/bin/mig
int group_id = 1;
public MyJavaApp() {
try {
MoteIF mote = new MoteIF(PrintStreamMessenger.err, group_id);
mote.send(new OscopeMsg());
} catch (Exception e) {}
}
}
51. MIG
• Message Interface Generator
– Generates a Java class representing a TOS message
– Located in /usr/local/bin This is the generator as defined in
/usr/local/lib/ncc/gen*.pm
– Usage:
mig –java-classname=[classname] java [filename.h] [struct name] > outputFile
• Normally, you allow the Makefile to generate the
Message classes
OscopeMsg.java:
$(MIG) -java-classname=$(PACKAGE).OscopeMsg
$(APP)/OscopeMsg.h OscopeMsg -o $@
$(JAVAC) $@
53. TinyOS Tutorial Outline
1. Hardware Primer
2. Introduction to TinyOS
3. Installation and Configuration
4. NesC Syntax
5. Network Communication
6. Sensor Data Acquisition
7. Debugging Techniques
8. Agilla pep talk
54. Obtaining Sensor Data
• Each sensor has a component that provides one or more
ADC interfaces
– MTS300CA:
• components in <tos>tossensorboardsmicasb
• Include in Makefile: SENSORBOARD=micasb
– MTS400/420:
• components in <tos>tossensorboardsmicawb
• Include in Makefile: SENSORBOARD=micawb
includes ADC;
includes sensorboard; // this defines the user names for the ports
interface ADC {
async command result_t getData();
async command result_t getContinuousData(); Split phase
async event result_t dataReady(uint16_t data);
}
55. Sensor Components
module SenseLightToLogM {
• Sensor components provides interface StdControl;
usually provide uses {
StdControl interface StdControl as PhotoControl;
– Be sure to initialize it }
before trying to take }
measurements!! Implementation { …
command result_t StdControl.init() {
• Same goes with return rcombine(call PhotoControl.init(),
GenericComm call Leds.init());
– Initializing it turns on the }
power command result_t StdControl.start() {
return call PhotoControl.start();
• And LedsC }
command result_t StdControl.stop() {
return call PhotoControl.stop();
}…
}
56. TinyOS Tutorial Outline
1. Hardware Primer
2. Introduction to TinyOS
3. Installation and Configuration
4. NesC Syntax
5. Network Communication
6. Sensor Data Acquisition
7. Debugging Techniques
8. Agilla pep talk
57. Debugging Tips
• Join and/or search TOS mailing lists
– http://www.tinyos.net/support.html#lists
– Update TOS (be sure to backup /opt)
• Develop apps in a private directory
– (e.g., <tos>/broken)
• Debug with LEDs
• Use TOSSIM and dbg(DBG_USR1,…)
statements
• Setup another base station in promiscuous
mode on same group and print all messages to
screen
58. Debug with UART
• Include SODebug.h This is only
available through
– Copy from CVS
C:tinyoscygwinopttinyos-1.xcontribxbowtosinterfaces
to
<tos>/tos/interfaces
– Insert print statements into program
SODbg(DBG_USR2, "AccelM: setDone: state %i n", state_accel);
• Use any terminal program to read input
from the serial port
59. Potentially Nasty Bug 1
• What’s wrong with uint8_t globalData;
the code? task void processData() {
– Symptom: data saved call SendData.send(globalData);
}
in globalData is lost
• Reason: Race command result_t Foo.bar(uint8_t data) {
globalData = data;
condition between post processData();
two tasks }
• Solution: Use a
queue, or never rely
on inter-task
communication
60. Potentially Nasty Bug 2
• What’s wrong with command result_t Foo.bar(uint8_t data) {
the code? TOS_Msg msg;
– Symptom: message FooData* foo = (FooData*)msg.data;
foo.data = data;
is corrupt call SendMsg.send(0x01, sizeof(FooData),
• Reason: TOS_Msg &msg);
}
is allocated in the
stack, lost when
function returns
• Solution: Declare
TOS_Msg msg in
component’s frame.
61. Potentially Nasty Bug 3
Component 1: *
• What’s wrong with
command result_t Foo.bar(uint8_t data) {
the code? FooData* foo = (FooData*)msg.data;
– Symptom: some foo.data = data;
messages are lost call SendMsg.send(0x01, sizeof(FooData),
• Reason: Race &msg);
condition between }
two components Component 2: *
trying to share command result_t Goo.bar(uint8_t data) {
network stack (which GooData* goo = (GooData*)msg.data;
is split-phase) goo.data = data;
• Solution: Use a call SendMsg.send(0x02, sizeof(GooData),
&msg);
queue to store }
pending messages
*Assume TOS_Msg msg is declared in
component’s frame.
62. Potentially Nasty Bug 4
• Symptom: Some messages are
consistently corrupt, and TOSBase is
working. Your app always works in
TOSSIM.
• Reason: You specified MSG_SIZE=x
where x > 29 in your application but forgot
to set it in TOSBase’s makefile
63. Potentially Nasty Bug 5
• Your app works in TOSSIM, but never
works on the mote. Compiler indicates
you are using 3946 bytes of RAM.
• Reason: TinyOS reserves some RAM for
the Stack. Your program cannot use more
than 3.9K RAM.
64. Potentially Nasty Bug 6
• Messages can travel from laptop to SN but
not vice versa.
• Reason: SW1 on the mote programming
board is on. This blocks all outgoing data
and is useful when reprogramming.
65. Further Reading
• Go through the on-line tutorial:
http://www.tinyos.net/tinyos-
1.x/doc/tutorial/index.html
• Search the help archive:
http://www.tinyos.net/search.html
• Post a question:
http://www.tinyos.net/support.html#lists
• NesC language reference manual:
http://www.tinyos.net/tinyos-1.x/doc/nesc/ref.pdf
66. TinyOS Tutorial Outline
1. Hardware Primer
2. Introduction to TinyOS
3. Installation and Configuration
4. NesC Syntax
5. Network Communication
6. Sensor Data Acquisition
7. Debugging Techniques
8. Agilla pep talk
67. What is Agilla?
• A middleware for Wireless Sensor Networks
• Allows programming to develop in a high-level
linear programming language
– No worrying about events, tasks, interfaces,
configuration, modules, etc.
• Utilizes mobile agents and a shared memory
architecture
– Each mobile agent is a virtual machine
– Linda-like tuple spaces decoupling
• Location-based addressing
68. Using Agilla
• It’s easy:
– Install Agilla on every mote (including the
base station mote)
– Deploy the network
– Run Agilla’s Java application and start
injecting agents into the network
• Agents spread throughout network using
high-level move and clone instructions
69. Agilla’s Agent Injector
• This is the
Agilla code to
blink the green
LED
• The full ISA is
available at:
http://www.cse.wustl.edu/
~liang/research/sn/agilla/
71. Benefits of Using Agilla
• High-level programming language
• Greater flexibility
• Better network utilization
• For more info, see:
– http://www.cse.wustl.edu/~liang/research/sn/agilla/