Akshit Jain is seeking a full-time opportunity in RTL/IC/Hardware Design, ASIC, SoC or Verification with over 2 years of relevant experience. He has a Master's degree in Electrical Engineering from the University of Bridgeport and a Bachelor's degree from Manipal Institute of Technology. His technical skills include languages like Java, Python, C, C++ and hardware design tools. He has internship experience with companies like Elidah Med, Freescale Semiconductor and Defence Research and Development Organization. His academic projects include SRAM design, Android controlled robot and low power VLSI design.

1. Akshit Jain
520 Atlantic Street, Bridgeport, CT 06604
+1 203-685-2557| https://www.linkedin.com/in/akshitsplash | akjain@my.bridgeport.edu
 A Graduate student with a Masters degree in Electrical Engineering and specialization in VLSI Design and 2+ years of
relevant experience seeking a full-time opportunity in RTL/IC/Hardware Design, ASIC, SoC or Verification domain.
EDUCATION:
 University of Bridgeport, Bridgeport, CT
Masters in Electrical Engineering, August 2016 GPA: 3.875/4.0
 Manipal Institute of Technology, Manipal, India
B.E. in Electronics and Communication Engineering (Graduated: May 2014) GPA: 3.6/4.0
TECHNICAL SKILLS:
Languages – Java, Python, C, C++, C#, VHDL, System Verilog, Embedded C, SQL, HTML, CSS, Java Script, Android Programming
Software - MATLAB, PSpice, Cadence, Mentor Graphics, CadSoft EAGLE, Synopsys, Xilinx ISE, Keil uVision, Proteus 8, Quartus II
Knowledge- FSM, FPGA, DFT, ASIC, VLSI, SoC, RTL, RISC & CISC, FIFO & LIFO, UVM, OVM, ATPG, MBIST, LBIST, PRPG, MISR, LVS, PAL,
PLC, Testing, Memories, Scan Chain, Hardware Design, Debugging, Netlist Extraction, Synthesis, Fabrication, Lithography process.
RESEARCH AND PUBLICATION:
 Masters’ Thesis and IEEE paper under submission on “Design and Implementation of Dynamically Configured Multi-Port
Cache Memory using new DMP technique”
 ASEE NE 2016 Poster presentation on “Implementation and Comparison of High-Performance and Dynamically Configured
Multi-Port Cache Memory”
 Presented a poster on "Performance Analysis of Power Gating designs in Low Power VLSI Circuits” at Manipal University.
WORK EXPERIENCE: (2+ years)
Elidah Med. LLC, Monroe, Connecticut
Electrical Engineering Intern (January 2016- September 2016)
 Worked on the design and development of an Electrical Muscle Stimulation device to treat female stress urinary incontinence.
 PCB Design of Rechargeable Signal Generator to generate a specific EMS Signal to the electrodes.
 Preparing BOM, contacting Battery Suppliers, Design of Android Application to control the device, Signal Testing, Debugging.
Department of Electrical Engineering, University of Bridgeport
Graduate Teaching Assistant (August 2015 – December 2015)
 Conducted Tutorial classes on Mentor Graphics, Cadence and PSpice software for Graduate Students.
 Assisted Professor in conducting Analog Electronics Lab through Fall 2016 semester.
 Grading Assignments, conducting exams and preparing slides for Digital VLSI and Analog VLSI Class.
Freescale Semiconductor, Noida, India Design Intern (JANUARY 2014 to JUNE 2014)
 Worked as part of SoC Architecture and Front-end Integration team (Automotive Industry)
 Redesigned a protection module and its interface, aiming in new dynamic design and reduction of on chip memory to half.
Optimization achieved at RTL design level with reduction in area by 5% and trade-off in Power Consumption increased by 15%.
Defence Research and Development Organization, Hyderabad, India Technical Internship (MAY 2013 to JULY 2013)
 D.R.D.O. is India's premier defense and missile facility. Worked on the project Single Axis Control through Dc Servo Motor with
Feedback Devices and the use of CNC machines to develop various parts used in a Missile Control Systems.
ACADEMIC PROJECTS:
 Remote 1-month Internship at a startup named SimSim building PCB Design Projects for Smart-locks mechanism.
 Developed, simulated and created the Schematics and Layout for a working 64X64 SRAM circuit using Mentor Graphics tools.
 VHDL Implementation of Dynamic Dual Port SRAM using controllers and a 64X64 SRAM using Altera QUARTUS II.
 Senior Design Project: Android Controlled Spy Robot using Bluetooth technology and Android application to control the robot.
 Built a complete University Management System using C Sharp language and SQL Database programming.
 Low Power VLSI Project- Analysis of Power Consumption for different circuit structures of CMOS Full Adders using PSpice.
 Built a Distance Measurement System using IR Sensor and 8051 Microcontroller and demonstrated it successfully.
 Built LCD Graphic Controller, Complex Vending Machine, 16-bit ALU with Carry Look ahead architecture using VHDL and
Xilinx.
 MATLAB project: Automatic Piano player
 Mentored and assisted under-graduate students in building a Micro-Assembly Robotic Arm using BotBoarduino (ATMEGA 328).
ACTIVITIES & LEADERSHIP EXPERIENCE:
 Vice President- Business Development in AIESEC Manipal University, August 2011 to December 2012
 “Triple Effect” Blood Donation Campaign and Project in Damietta, Egypt, December 2012- January 2013
PROFESSIONAL AFFILIATION: - Institute of Electrical and Electronics Engineers (IEEE), Student Member, 2011-Present