This document contains the resume of Anu Rai. It summarizes her contact information, career objective, educational qualifications, technical expertise in programming languages and areas of interest. It also describes her academic achievements and details of a project on designing a 32-bit and 64-bit arithmetic logic unit. Finally, it lists her relevant work experience in circuit design and power distribution and extracurricular activities.

1. ANU RAI
Mobile: +919703541338
anu_rai@outlook.com
https://in.linkedin.com/in/raianu
Location:-HYDERABAD
CAREER OBJECTIVE:-
To be a part of challenging team that would explore my potential and provide me with the opportunity to
Enhance and utilize my professional skills and contribute the same to the organization, while being highly
competent and innovative.
EDUCATION:-
Bachelor of Engineering in Electronics and Telecommunication Engineering
(Chhattisgarh Swami Vivekananda Technical University, Percentage- 77.77% ( CGPA 8.55 )
RUNGTA ENGINEERING COLLEGE,Raipur (Chattisgarh) August 2011- July 2015
AISSCE (CBSE Board, Percentage- 75.4%) May 2011
AISSE (CBSE Board, Percentage- 73.4%) May 2009
ACADEMIC ACHIEVEMENTS:-
 Completed Self-Paced Udacity Class – Programming in Python
 Secured 2nd position in academics in 8th semester
 Secured 1st position in academics in 5th semester
 Certification from pluralsight in ITIL.
TECHNICAL EXPERTISE:-
Programming Languages
 C
 PYTHON
Additional Qualification
 VERY HIGH SPEEED INTEGRATED CIRCUIT HARDWARE DESCRIPTION LANGUAGE
(VHDL)
 VERILOG
AREAS OF INTEREST:-
 Microprocessor 8085,8086
 Telecommunication and switching network

2. PROJECT DETAILS:-
Title of the project: 32 Bit Arithmetic Logic Unit and 64 Bit Arithmetic Logic Unit
Abstract:A 32 and 64 bit ALU which is a digital circuit that performs arithmetic and logical operation. The
arithmetical operation that has been done by ALU is simple Addition, Subtraction and Multiplication. The
logical operations that has been done by ALU is simple ANDING, ORING, NOTING, NANDING, NORING,
XORING, XNORING. The design is implemented using FPGA Spartan 3E.A Field Programmable Gate
Array (FPGA) is an integrated circuit designed to be configured by the customer or designer after
manufacturing- hence it is named as “field-programmable”.
RELEVANTEXPERIENCE:-
Micropro,Kolkata,India (July-August2014)
 Designing of digital circuits with Very Large Scale Integration Circuit Designing with software as
XILLINX 13.2version and operating system being windows XP.
 Both combinational and sequential circuits are designed on VHDL as well as on VERILOG.
Chhattisgarh State power Distribution Company limited,Chhattisgarh, India (June-July2013)
 Area covered in this is how to distribute and transmit the electric power.
EXTRA CURRICULAR ACTIVITIES:-
Participated in workshop titled ‘Embedded Systems’ conducted by IndEyes InfoTech Pvt. Ltd., AT
Raipur. [13th- 14th March, 2014]
Participated in ‘Techno Medical Intervention in India’s Socio- Economic Milieu’ conducted by
Electronics & Telecommunication Engineering Deptt. Of Disha Institute of Managament and
Technology, and sponsored by Deptt. Of Science & Technology, Govt. of India, New Delhi.
[8th March, 2014]
Member of “SOCIAL GROUP” of my college which is for poor children who were not getting proper
education.
DATE:- ANU RAI