Cache memory is located between the processor and main memory. It is smaller and faster than main memory. There are two types of cache memory policies - write-back and write-through. Mapping is a technique that maps CPU-generated memory addresses to cache lines. There are three types of mapping - direct, associative, and set associative. Direct mapping maps each main memory block to a single cache line using the formula: cache line number = main memory block number % number of cache lines. This can cause conflict misses.

1. Memory Mapping
Ms. Snehalata Agasti
Department CSE

2. Cache
• Cache memory is present in between main memory and processor.
• Smaller in size and faster.
• Two types of cache memory is used.
• Cache memory is updated using either write-Back or write-Through
policies.
processor Cache
memory
Main
memory

3. Mapping
• Mapping is a technique which maps CPU generated address into
cache lines.
• Main memory is partitioned into number of blocks.
• Cache mapping helps to bring the content of main memory into cache
memory.
Cache memory
Main memory

4. Some important points
• Number of cache block=size of cache memory / size of each block
• Size of cache memory = Number of cache block x size of each block
• If main memory size is given M then number of bits required to
represent the address lines = log2
M
• If block size is given B then number of bits required to represent block
offset = log2
B
• If number of cache blocks =C then number of bits required to
represent cache offset= log2
C

5. Types of mapping
• Three different types of mapping technique.
-Direct mapping
-Associative mapping
-Set associative mapping
• In direct mapping , each block of main memory is mapped to single
cache lines. As main memory size is large and cache memory size is
small, to a single cache line number of main memory block is
mapped. So along with compulsory miss ,conflict miss occurred.

6. Direct mapping
• Main memory block is mapped to cache memory block using the
technique
• cache memory block number=
Main memory block number % number of block in cache
• main memory address is divided into 3 parts
✓Tag
✓cache offset
✓Word offset
Tag Cache offset Word offset

7. Explanation of Cache lines mapping
• Let number of cache blocks =4
• Total number of main memory block=8
• Then to each cache line 2-number of blocks will be mapped
• In direct mapping , we are using the formula L= J mod M, where
L=Cache lines J= Main memory block number and M= number of
blocks in cache.
0,4
1,5
2,6
3,7
0
1
3
2
0
1
2
3
4
5
6
• Main memory address 0,4 is mapped to cache
line 0, as 0%4 =0 and 4%4=0.
• Block number 1 and 5 is mapped to cache line-1.
• similarly 3and 6 blocks are mapped to cache line-
2 and block number 3 and 7 is mapped to cache
line-3.
• Initially cache blocks are free. So compulsory miss
occurred and conflict miss occurred due to

8. Direct Mapping Problem
• Let Block size is given 16B, size of cache is given 64KB, and number of bits
that represent memory address in main memory is 32-bits then find
number of bits required for tag, Block offset, word offset.
• Solution:
Block size =16 =24
Number of bits required for block offset= log2
16 = log224=4*1=4
Size of cache memory=64KB= 26 x 210B = 216B
Number of cache lines = size of cache/block size = 64KB/ 16=4KB
No of bits required for cache offset= log2
4K = log2212= 12*1 = 12
Number of bits given for main memory addressing : 32bits
Tag= 32 -12- 4= 16 bits
Tag=16 Cache offset=12 Block offset=4
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