Join this video course on Udemy. Click the below link
https://www.udemy.com/mastering-rtos-hands-on-with-freertos-arduino-and-stm32fx/?couponCode=SLIDESHARE
>> The Complete FreeRTOS Course with Programming and Debugging <<
"The Biggest objective of this course is to demystifying RTOS practically using FreeRTOS and STM32 MCUs"
STEP-by-STEP guide to port/run FreeRTOS using development setup which includes,
1) Eclipse + STM32F4xx + FreeRTOS + SEGGER SystemView
2) FreeRTOS+Simulator (For windows)
Demystifying the complete Architecture (ARM Cortex M) related code of FreeRTOS which will massively help you to put this kernel on any target hardware of your choice.
Join this video course on Udemy. Click the below link
https://www.udemy.com/mastering-rtos-hands-on-with-freertos-arduino-and-stm32fx/?couponCode=SLIDESHARE
>> The Complete FreeRTOS Course with Programming and Debugging <<
"The Biggest objective of this course is to demystifying RTOS practically using FreeRTOS and STM32 MCUs"
STEP-by-STEP guide to port/run FreeRTOS using development setup which includes,
1) Eclipse + STM32F4xx + FreeRTOS + SEGGER SystemView
2) FreeRTOS+Simulator (For windows)
Demystifying the complete Architecture (ARM Cortex M) related code of FreeRTOS which will massively help you to put this kernel on any target hardware of your choice.
Join this video course on Udemy. Click the below link
https://www.udemy.com/mastering-rtos-hands-on-with-freertos-arduino-and-stm32fx/?couponCode=SLIDESHARE
>> The Complete FreeRTOS Course with Programming and Debugging <<
"The Biggest objective of this course is to demystifying RTOS practically using FreeRTOS and STM32 MCUs"
STEP-by-STEP guide to port/run FreeRTOS using development setup which includes,
1) Eclipse + STM32F4xx + FreeRTOS + SEGGER SystemView
2) FreeRTOS+Simulator (For windows)
Demystifying the complete Architecture (ARM Cortex M) related code of FreeRTOS which will massively help you to put this kernel on any target hardware of your choice.
Join this video course on udemy . Click here :
https://www.udemy.com/course/mastering-microcontroller-with-peripheral-driver-development/?couponCode=SLIDESHARE
In this course, the code is developed such a way that, It can be ported to any MCU you have at your hand.
If you need any help in porting these codes to different MCUs you can always reach out to me!
The course is strictly not bound to any 1 type of MCU. So, if you already have any Development board which runs with ARM-Cortex M3/M4 processor,
then I recommend you to continue using it.
But if you don’t have any Development board, then check out the below Development boards.
Join this video course on udemy . Click here :
https://www.udemy.com/microcontroller-programming-stm32-timers-pwm-can-bus-protocol/?couponCode=SLIDESHARE
learn STM32 TIMERS, CAN,RTC, PWM,LOW POWER embedded systems and program them using STM32 Device HAL APIs STEP by STEP
>>Welcome to the course which teaches you advanced Micro-controller programming. In this course you are going to learn and master TIMERS, PWM, CAN, RTC, LOW POWER MODES of STM32F4x Micro-controller with step by step guidance. Highly recommended if you are seeking a career in the domain of Embedded software. <<
In this course, you will understand behind the scene working of peripherals with supportive code exercises. I have included various real-time exercises which help you to master every peripheral covered in this course and this course thoroughly covers both theory and practical aspects of TIMERS, PWM, CAN, RTC, LOW POWER MODES of STM32F4x Micro-controller.
This presentation is made as a part of our udemy course on STM32 MCUs and peripherals. The ppt covers STM32 Reset and Clock Control unit of the STM32 , different types of clock sources such as HSE (High Speed External crystal), HSI (Internal High Speed RC ), PLL concepts,HSI calibration , HCLK,PLCKx and others.
To enroll for our video courses on Microcontroller Programming, RTOS programming, Embedded linux, Bootloader development
visit here : www.fastbitlab.com
youtube : https://www.youtube.com/channel/UCa1REBV9hyrzGp2mjJCagBg
Join this video course on Udemy. Click the below link
https://www.udemy.com/mastering-rtos-hands-on-with-freertos-arduino-and-stm32fx/?couponCode=SLIDESHARE
>> The Complete FreeRTOS Course with Programming and Debugging <<
"The Biggest objective of this course is to demystifying RTOS practically using FreeRTOS and STM32 MCUs"
STEP-by-STEP guide to port/run FreeRTOS using development setup which includes,
1) Eclipse + STM32F4xx + FreeRTOS + SEGGER SystemView
2) FreeRTOS+Simulator (For windows)
Demystifying the complete Architecture (ARM Cortex M) related code of FreeRTOS which will massively help you to put this kernel on any target hardware of your choice.
Join this video course on Udemy. Click the below link
https://www.udemy.com/mastering-rtos-hands-on-with-freertos-arduino-and-stm32fx/?couponCode=SLIDESHARE
>> The Complete FreeRTOS Course with Programming and Debugging <<
"The Biggest objective of this course is to demystifying RTOS practically using FreeRTOS and STM32 MCUs"
STEP-by-STEP guide to port/run FreeRTOS using development setup which includes,
1) Eclipse + STM32F4xx + FreeRTOS + SEGGER SystemView
2) FreeRTOS+Simulator (For windows)
Demystifying the complete Architecture (ARM Cortex M) related code of FreeRTOS which will massively help you to put this kernel on any target hardware of your choice.
Join this video course on udemy . Click here :
https://www.udemy.com/course/mastering-microcontroller-with-peripheral-driver-development/?couponCode=SLIDESHARE
In this course, the code is developed such a way that, It can be ported to any MCU you have at your hand.
If you need any help in porting these codes to different MCUs you can always reach out to me!
The course is strictly not bound to any 1 type of MCU. So, if you already have any Development board which runs with ARM-Cortex M3/M4 processor,
then I recommend you to continue using it.
But if you don’t have any Development board, then check out the below Development boards.
Join this video course on udemy . Click here :
https://www.udemy.com/microcontroller-programming-stm32-timers-pwm-can-bus-protocol/?couponCode=SLIDESHARE
learn STM32 TIMERS, CAN,RTC, PWM,LOW POWER embedded systems and program them using STM32 Device HAL APIs STEP by STEP
>>Welcome to the course which teaches you advanced Micro-controller programming. In this course you are going to learn and master TIMERS, PWM, CAN, RTC, LOW POWER MODES of STM32F4x Micro-controller with step by step guidance. Highly recommended if you are seeking a career in the domain of Embedded software. <<
In this course, you will understand behind the scene working of peripherals with supportive code exercises. I have included various real-time exercises which help you to master every peripheral covered in this course and this course thoroughly covers both theory and practical aspects of TIMERS, PWM, CAN, RTC, LOW POWER MODES of STM32F4x Micro-controller.
This presentation is made as a part of our udemy course on STM32 MCUs and peripherals. The ppt covers STM32 Reset and Clock Control unit of the STM32 , different types of clock sources such as HSE (High Speed External crystal), HSI (Internal High Speed RC ), PLL concepts,HSI calibration , HCLK,PLCKx and others.
To enroll for our video courses on Microcontroller Programming, RTOS programming, Embedded linux, Bootloader development
visit here : www.fastbitlab.com
youtube : https://www.youtube.com/channel/UCa1REBV9hyrzGp2mjJCagBg
This slide provides a basic understanding of hypervisor support in ARM v8 and above processors. And these slides (intent to) give some guidelines to automotive engineers to compare and choose right solution!
HKG15-505: Power Management interactions with OP-TEE and Trusted FirmwareLinaro
HKG15-505: Power Management interactions with OP-TEE and Trusted Firmware
---------------------------------------------------
Speaker: Jorge Ramirez-Ortiz
Date: February 13, 2015
---------------------------------------------------
★ Session Summary ★
[Note: this is a joint Security/Power Management session) Understand what use cases related to Power Management have to interact with Trusted Firmware via Secure calls. Walk through some key use cases like CPU Suspend and explain how PM Linux drivers interacts with Trusted Firmware / PSCI
--------------------------------------------------
★ Resources ★
Pathable: https://hkg15.pathable.com/meetings/250855
Video: https://www.youtube.com/watch?v=hQ2ITjHZY4s
Etherpad: http://pad.linaro.org/p/hkg15-505
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2015 - #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
FreeRTOS basics (Real time Operating System)Naren Chandra
A presentation that covers all the basics needed to understand and start working with FreeRTOS . FreeRTOS is comparable with more than 20 controller families and 30 plus supporting tools and IDEs.
FreeRTOS is a market-leading real-time operating system (RTOS) for microcontrollers and small microprocessors. Distributed freely under the MIT open source license, FreeRTOS includes a kernel and a growing set of libraries suitable for use across all industry sectors. FreeRTOS is built with an emphasis on reliability and ease of use.
Tiny, power-saving kernel
Scalable size, with usable program memory footprint as low as 9KB. Some architectures include a tick-less power saving mode
Support for 40+ architectures
One code base for 40+ MCU architectures and 15+ toolchains, including the latest RISC-V and ARMv8-M (Arm Cortex-M33) microcontrollers
Modular libraries
A growing number of add-on libraries used across all industries sectors, including secure local or cloud connectivity
IoT Reference Integrations
Take advantage of tested examples that include all the libraries essential to securely connect to the cloud
Intel® QuickAssist Technology Introduction, Applications, and Lab, Including ...Michelle Holley
Abstract: Intel® QuickAssist Technology improves performance and efficiency across the data center and other computing platforms by handling the compute-intensive operations of bulk cryptography, public key cryptography, and data compression. In this course, we will give an overview of the technology along with the summary of resources to get started with integrating Intel® QAT into your platform solutions. We will also demonstrate using Intel® QAT with applications such as OpenSSL, NGINX, and HAProxy, with a hands-on lab.
Speaker Bios:
Joel Auernheimer, a Platform Application Engineer at Intel, has been focused on enabling customers to integrate Intel® QuickAssist Technology in their platform solutions. Joel is a native of Phoenix, Arizona and enjoys hiking, basketball, soccer, singing, and spending time with friends and family.
Joel Schuetze has been with Intel since 1996. For the last 9+ years he has worked as Platform Application Engineer supporting customers with Intel QuickAssist Technology.
Join this video course on Udemy. Click the below link
https://www.udemy.com/embedded-system-programming-on-arm-cortex-m3m4/?couponCode=SLIDESHARE
This presentation course covers full architectural and internal details of one of the most famous processor ARM Cortex M3 and M4. Processor core, NVIC, Register set, Bus interfaces, AHB,APB,SYS BUS,Interrupts,memory fully explained.
Kernel Recipes 2017 - Understanding the Linux kernel via ftrace - Steven RostedtAnne Nicolas
Ftrace is the official tracer of the Linux kernel. It has been apart of Linux since 2.6.31, and has grown tremendously ever since. Ftrace’s name comes from its most powerful feature: function tracing. But the ftrace infrastructure is much more than that. It also encompasses the trace events that are used by perf, as well as kprobes that can dynamically add trace events that the user defines.
This talk will focus on learning how the kernel works by using the ftrace infrastructure. It will show how to see what happens within the kernel during a system call; learn how interrupts work; see how ones processes are being scheduled, and more. A quick introduction to some tools like trace-cmd and KernelShark will also be demonstrated.
Steven Rostedt, VMware
The Linux Block Layer - Built for Fast StorageKernel TLV
The arrival of flash storage introduced a radical change in performance profiles of direct attached devices. At the time, it was obvious that Linux I/O stack needed to be redesigned in order to support devices capable of millions of IOPs, and with extremely low latency.
In this talk we revisit the changes the Linux block layer in the
last decade or so, that made it what it is today - a performant, scalable, robust and NUMA-aware subsystem. In addition, we cover the new NVMe over Fabrics support in Linux.
Sagi Grimberg
Sagi is Principal Architect and co-founder at LightBits Labs.
The Robots industry is promising major operational benefits, although no one is quite sure where robots and the Industrial Internet of Things (IIoT) will take manufacturing. IoT represents a closing of the gap between production and IT and is seen as the next big step for automation.
Lets see some algorithms and safety concepts behind this topic.
This slide provides a basic understanding of hypervisor support in ARM v8 and above processors. And these slides (intent to) give some guidelines to automotive engineers to compare and choose right solution!
HKG15-505: Power Management interactions with OP-TEE and Trusted FirmwareLinaro
HKG15-505: Power Management interactions with OP-TEE and Trusted Firmware
---------------------------------------------------
Speaker: Jorge Ramirez-Ortiz
Date: February 13, 2015
---------------------------------------------------
★ Session Summary ★
[Note: this is a joint Security/Power Management session) Understand what use cases related to Power Management have to interact with Trusted Firmware via Secure calls. Walk through some key use cases like CPU Suspend and explain how PM Linux drivers interacts with Trusted Firmware / PSCI
--------------------------------------------------
★ Resources ★
Pathable: https://hkg15.pathable.com/meetings/250855
Video: https://www.youtube.com/watch?v=hQ2ITjHZY4s
Etherpad: http://pad.linaro.org/p/hkg15-505
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2015 - #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
FreeRTOS basics (Real time Operating System)Naren Chandra
A presentation that covers all the basics needed to understand and start working with FreeRTOS . FreeRTOS is comparable with more than 20 controller families and 30 plus supporting tools and IDEs.
FreeRTOS is a market-leading real-time operating system (RTOS) for microcontrollers and small microprocessors. Distributed freely under the MIT open source license, FreeRTOS includes a kernel and a growing set of libraries suitable for use across all industry sectors. FreeRTOS is built with an emphasis on reliability and ease of use.
Tiny, power-saving kernel
Scalable size, with usable program memory footprint as low as 9KB. Some architectures include a tick-less power saving mode
Support for 40+ architectures
One code base for 40+ MCU architectures and 15+ toolchains, including the latest RISC-V and ARMv8-M (Arm Cortex-M33) microcontrollers
Modular libraries
A growing number of add-on libraries used across all industries sectors, including secure local or cloud connectivity
IoT Reference Integrations
Take advantage of tested examples that include all the libraries essential to securely connect to the cloud
Intel® QuickAssist Technology Introduction, Applications, and Lab, Including ...Michelle Holley
Abstract: Intel® QuickAssist Technology improves performance and efficiency across the data center and other computing platforms by handling the compute-intensive operations of bulk cryptography, public key cryptography, and data compression. In this course, we will give an overview of the technology along with the summary of resources to get started with integrating Intel® QAT into your platform solutions. We will also demonstrate using Intel® QAT with applications such as OpenSSL, NGINX, and HAProxy, with a hands-on lab.
Speaker Bios:
Joel Auernheimer, a Platform Application Engineer at Intel, has been focused on enabling customers to integrate Intel® QuickAssist Technology in their platform solutions. Joel is a native of Phoenix, Arizona and enjoys hiking, basketball, soccer, singing, and spending time with friends and family.
Joel Schuetze has been with Intel since 1996. For the last 9+ years he has worked as Platform Application Engineer supporting customers with Intel QuickAssist Technology.
Join this video course on Udemy. Click the below link
https://www.udemy.com/embedded-system-programming-on-arm-cortex-m3m4/?couponCode=SLIDESHARE
This presentation course covers full architectural and internal details of one of the most famous processor ARM Cortex M3 and M4. Processor core, NVIC, Register set, Bus interfaces, AHB,APB,SYS BUS,Interrupts,memory fully explained.
Kernel Recipes 2017 - Understanding the Linux kernel via ftrace - Steven RostedtAnne Nicolas
Ftrace is the official tracer of the Linux kernel. It has been apart of Linux since 2.6.31, and has grown tremendously ever since. Ftrace’s name comes from its most powerful feature: function tracing. But the ftrace infrastructure is much more than that. It also encompasses the trace events that are used by perf, as well as kprobes that can dynamically add trace events that the user defines.
This talk will focus on learning how the kernel works by using the ftrace infrastructure. It will show how to see what happens within the kernel during a system call; learn how interrupts work; see how ones processes are being scheduled, and more. A quick introduction to some tools like trace-cmd and KernelShark will also be demonstrated.
Steven Rostedt, VMware
The Linux Block Layer - Built for Fast StorageKernel TLV
The arrival of flash storage introduced a radical change in performance profiles of direct attached devices. At the time, it was obvious that Linux I/O stack needed to be redesigned in order to support devices capable of millions of IOPs, and with extremely low latency.
In this talk we revisit the changes the Linux block layer in the
last decade or so, that made it what it is today - a performant, scalable, robust and NUMA-aware subsystem. In addition, we cover the new NVMe over Fabrics support in Linux.
Sagi Grimberg
Sagi is Principal Architect and co-founder at LightBits Labs.
The Robots industry is promising major operational benefits, although no one is quite sure where robots and the Industrial Internet of Things (IIoT) will take manufacturing. IoT represents a closing of the gap between production and IT and is seen as the next big step for automation.
Lets see some algorithms and safety concepts behind this topic.
Building Continuous Application with Structured Streaming and Real-Time Data ...Databricks
One of the biggest challenges in data science is to build a continuous data application which delivers results rapidly and reliably. Spark Streaming offers a powerful solution for real-time data processing. However, the challenge remains in how to connect them with various continuous and real-time data sources, guaranteeing the responsiveness and reliability of data applications.
In this talk, Nan and Arijit will summarize their experiences learned from serving the real-time Spark-based data analytic solutions on Azure HDInsight. Their solution seamlessly integrates Spark and Azure EventHubs which is a hyper-scale telemetry ingestion service enabling users to ingress massive amounts of telemetry into the cloud and read the data from multiple applications using publish-subscribe semantics.
They’ll will cover three topics: bridging the gap of data communication model in Spark and data source, accommodating Spark to rate control and message addressing of data source, and the co-design of fault tolerance Mechanisms. This talk will share the insights on how to build continuous data applications with Spark and boost more availabilities of connectors for Spark and different real-time data sources.
Container orchestration from theory to practiceDocker, Inc.
"Join Laura Frank and Stephen Day as they explain and examine technical concepts behind container orchestration systems, like distributed consensus, object models, and node topology. These concepts build the foundation of every modern orchestration system, and each technical explanation will be illustrated using SwarmKit and Kubernetes as a real-world example. Gain a deeper understanding of how orchestration systems work in practice and walk away with more insights into your production applications."
Async library is an asynchronous programming facility for Scala that offers a direct API for working with Futures.
It was added in Scala version 2.10 and is implemented using macros. Its main constructs, async and await, are inspired by similar constructs introduced in C# 5.0.
OSMC 2017 | Monitoring MySQL with Prometheus and Grafana by Julien PivottoNETWAYS
Databases monitoring is not a new topic, so what can we still improve? With Prometheus, you can collect a lot of data at a high frequency, and decide later which ones are useful. Grafana, with Percona graphs, offers a very efficient dashboard solution. We will see how to glue everything and get the best way to monitor your databases using open source tools only.
Porting a Streaming Pipeline from Scala to RustEvan Chan
How we at Conviva ported a streaming data pipeline in months from Scala to Rust. What are the important human and technical factors in our port, and what did we learn?
One of the most common performance issues in serverless architectures is elevated latencies from external services, such as DynamoDB, ElasticSearch or Stripe.
In this webinar, we will show you how to quickly identify and debug these problems, and some best practices for dealing with poor performing 3rd party services.
The .NET Garbage Collector (GC) is really cool. It helps providing our applications with virtually unlimited memory, so we can focus on writing code instead of manually freeing up memory. But how does .NET manage that memory? What are hidden allocations? Are strings evil? It still matters to understand when and where memory is allocated. In this talk, we’ll go over the base concepts of .NET memory management and explore how .NET helps us and how we can help .NET – making our apps better. Expect profiling, Intermediate Language (IL), ClrMD and more!
Stream Processing with CompletableFuture and Flow in Java 9Trayan Iliev
Stream based data / event / message processing becomes preferred way of achieving interoperability and real-time communication in distributed SOA / microservice / database architectures.
Beside lambdas, Java 8 introduced two new APIs explicitly dealing with stream data processing:
- Stream - which is PULL-based and easily parallelizable;
- CompletableFuture / CompletionStage - which allow composition of PUSH-based, non-blocking, asynchronous data processing pipelines.
Java 9 will provide further support for stream-based data-processing by extending the CompletableFuture with additional functionality – support for delays and timeouts, better support for subclassing, and new utility methods.
More, Java 9 provides new java.util.concurrent.Flow API implementing Reactive Streams specification that enables reactive programming and interoperability with libraries like Reactor, RxJava, RabbitMQ, Vert.x, Ratpack, and Akka.
The presentation will discuss the novelties in Java 8 and Java 9 supporting stream data processing, describing the APIs, models and practical details of asynchronous pipeline implementation, error handling, multithreaded execution, asyncronous REST service implementation, interoperability with existing libraries.
There are provided demo examples (code on GitHub) using Completable Future and Flow with:
- JAX-RS 2.1 AsyncResponse, and more importantly unit-testing the async REST service method implementations;
- CDI 2.0 asynchronous observers (fireAsync / @ObservesAsync);
Observability: Beyond the Three Pillars with SpringVMware Tanzu
In this presentation, we’ll explore the basics of the three pillars and what Spring has to offer to implement them for logging (SLF4J), metrics (Micrometer), and distributed tracing (Spring Cloud Sleuth, Zipkin/Brave, OpenTelemetry).
I’ll also talk about how to take your system to the next level, and what else you can find in Spring and related technologies to look under the hood of your running system (Spring Boot Actuator, Logbook, Eureka, Spring Boot Admin, Swagger, Spring HATEOAS) and what our future plans are.
Similar to PART-3 : Mastering RTOS FreeRTOS and STM32Fx with Debugging (20)
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!SOFTTECHHUB
As the digital landscape continually evolves, operating systems play a critical role in shaping user experiences and productivity. The launch of Nitrux Linux 3.5.0 marks a significant milestone, offering a robust alternative to traditional systems such as Windows 11. This article delves into the essence of Nitrux Linux 3.5.0, exploring its unique features, advantages, and how it stands as a compelling choice for both casual users and tech enthusiasts.
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024Albert Hoitingh
In this session I delve into the encryption technology used in Microsoft 365 and Microsoft Purview. Including the concepts of Customer Key and Double Key Encryption.
Sudheer Mechineni, Head of Application Frameworks, Standard Chartered Bank
Discover how Standard Chartered Bank harnessed the power of Neo4j to transform complex data access challenges into a dynamic, scalable graph database solution. This keynote will cover their journey from initial adoption to deploying a fully automated, enterprise-grade causal cluster, highlighting key strategies for modelling organisational changes and ensuring robust disaster recovery. Learn how these innovations have not only enhanced Standard Chartered Bank’s data infrastructure but also positioned them as pioneers in the banking sector’s adoption of graph technology.
Generative AI Deep Dive: Advancing from Proof of Concept to ProductionAggregage
Join Maher Hanafi, VP of Engineering at Betterworks, in this new session where he'll share a practical framework to transform Gen AI prototypes into impactful products! He'll delve into the complexities of data collection and management, model selection and optimization, and ensuring security, scalability, and responsible use.
GraphSummit Singapore | The Future of Agility: Supercharging Digital Transfor...Neo4j
Leonard Jayamohan, Partner & Generative AI Lead, Deloitte
This keynote will reveal how Deloitte leverages Neo4j’s graph power for groundbreaking digital twin solutions, achieving a staggering 100x performance boost. Discover the essential role knowledge graphs play in successful generative AI implementations. Plus, get an exclusive look at an innovative Neo4j + Generative AI solution Deloitte is developing in-house.
Pushing the limits of ePRTC: 100ns holdover for 100 daysAdtran
At WSTS 2024, Alon Stern explored the topic of parametric holdover and explained how recent research findings can be implemented in real-world PNT networks to achieve 100 nanoseconds of accuracy for up to 100 days.
In his public lecture, Christian Timmerer provides insights into the fascinating history of video streaming, starting from its humble beginnings before YouTube to the groundbreaking technologies that now dominate platforms like Netflix and ORF ON. Timmerer also presents provocative contributions of his own that have significantly influenced the industry. He concludes by looking at future challenges and invites the audience to join in a discussion.
GridMate - End to end testing is a critical piece to ensure quality and avoid...ThomasParaiso2
End to end testing is a critical piece to ensure quality and avoid regressions. In this session, we share our journey building an E2E testing pipeline for GridMate components (LWC and Aura) using Cypress, JSForce, FakerJS…
Climate Impact of Software Testing at Nordic Testing DaysKari Kakkonen
My slides at Nordic Testing Days 6.6.2024
Climate impact / sustainability of software testing discussed on the talk. ICT and testing must carry their part of global responsibility to help with the climat warming. We can minimize the carbon footprint but we can also have a carbon handprint, a positive impact on the climate. Quality characteristics can be added with sustainability, and then measured continuously. Test environments can be used less, and in smaller scale and on demand. Test techniques can be used in optimizing or minimizing number of tests. Test automation can be used to speed up testing.
Communications Mining Series - Zero to Hero - Session 1DianaGray10
This session provides introduction to UiPath Communication Mining, importance and platform overview. You will acquire a good understand of the phases in Communication Mining as we go over the platform with you. Topics covered:
• Communication Mining Overview
• Why is it important?
• How can it help today’s business and the benefits
• Phases in Communication Mining
• Demo on Platform overview
• Q/A
The Art of the Pitch: WordPress Relationships and SalesLaura Byrne
Clients don’t know what they don’t know. What web solutions are right for them? How does WordPress come into the picture? How do you make sure you understand scope and timeline? What do you do if sometime changes?
All these questions and more will be explored as we talk about matching clients’ needs with what your agency offers without pulling teeth or pulling your hair out. Practical tips, and strategies for successful relationship building that leads to closing the deal.
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.
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Rapid and secure feature delivery is a goal across every application team and every branch of the DoD. The Navy’s DevSecOps platform, Party Barge, has achieved:
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- Maintenance of superior security standards and inherent policy enforcement with Authorization to Operate (ATO)
Development teams can ship efficiently and ensure applications are cyber ready for Navy Authorizing Officials (AOs). In this webinar, Sigma Defense and Anchore will give attendees a look behind the scenes and demo secure pipeline automation and security artifacts that speed up application ATO and time to production.
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- How to build efficient development pipeline roles and component templates
- How to deliver security artifacts that matter for ATO’s (SBOMs, vulnerability reports, and policy evidence)
- How to streamline operations with automated policy checks on container images
zkStudyClub - Reef: Fast Succinct Non-Interactive Zero-Knowledge Regex ProofsAlex Pruden
This paper presents Reef, a system for generating publicly verifiable succinct non-interactive zero-knowledge proofs that a committed document matches or does not match a regular expression. We describe applications such as proving the strength of passwords, the provenance of email despite redactions, the validity of oblivious DNS queries, and the existence of mutations in DNA. Reef supports the Perl Compatible Regular Expression syntax, including wildcards, alternation, ranges, capture groups, Kleene star, negations, and lookarounds. Reef introduces a new type of automata, Skipping Alternating Finite Automata (SAFA), that skips irrelevant parts of a document when producing proofs without undermining soundness, and instantiates SAFA with a lookup argument. Our experimental evaluation confirms that Reef can generate proofs for documents with 32M characters; the proofs are small and cheap to verify (under a second).
Paper: https://eprint.iacr.org/2023/1886
zkStudyClub - Reef: Fast Succinct Non-Interactive Zero-Knowledge Regex Proofs
PART-3 : Mastering RTOS FreeRTOS and STM32Fx with Debugging
1. Mastering RTOS: Hands on FreeRTOS
and STM32Fx with Debugging
Learn Running/Porting FreeRTOS Real Time Operating System on
STM32F4x and ARM cortex M based Mircocontrollers
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6. Queue
Task A Task B
15
Queue
Task A Task B
Whena Queueis createdit does not containanythingso it is empty
TaskA writes a valuein to thequeue. Thevalueis sentto the front Sincethequeuewas
previouslyempty,the valueis nowboththefirst andthelast valuein thequeue:
7. 12 15
Queue
Task A Task B
12 15
Queue
Task A Task B
TaskA sends another value. Thequeuenowcontains thepreviouslywrittenvalueandthis newly
addedvalue.The previous value remains at the front of the queue while the new one is now at its
back.Threespaces are stillavailable
TaskB reads a valuein thequeue.It willreceivethevalue whichis in thefront of thequeue
8. 12
Queue
Task A Task B
Task B has removedan item.Theseconditemis movedto be theoneinthefrontof thequeue.
Thisis the valuetask 2 will readnext timeit tries to reada value. Fourspaces are nowavailable:
9. Main Uses of Queues in RTOS
1. Synchronization between Tasks or Interrupts
2. Inter-task communication
10. Queues in Synchronization and inter-Task
communication
Blocked while
accessing the
empty Queue
I needsomedatatoconsume
But waitingforTASKA to producesome
datain thequeue
Task A Task B
Data Producer
Empty
Queue
Data Consumer
11. Queues in Synchronization and inter-Task
communication
I m
unblocked
Looks like
Data
available in
the queue
Task A Task B
Queue
Data Produced
Unblocks Task B
Data Producer Data Consumer
25. Exercise
Design a FreeRTOS application which implements the below commands
LED_ON,
LED_OFF,
LED_TOGGLE_START
LED_TOGGLE_STOP
LED_STATUS_READ
RTC_DATETIME_READ
The command should be sent to the board via UART from the user.
26. Command Format
struct APP_CMD
{
uint8_t COMMAND_NUM;
uint8_t COMMAND_ARGS[10];
};
/* Lets use this data
structure to store
command number and
its associated
arguments. */
30. Hardware Vs Software Timers
Hardware timers Software timers
Handled by the TIMER peripheral of the MCU Handled by FreeRTOS kernel Code
No FreeRTOS APIs . You have to create your
own Function to manage the timer
peripherals
FreeRTOS APIs are availabe
Micros/nano seconds resolutions are
possible
Resolution Depends on the
RTOS_TICK_RATE_HZ
34. A semaphore is a kernel object or you can say kernel
service, that one or more threads of execution can
acquire or release for the purpose of synchronization or
mutual exclusion.
40. Task-A
producer
Task-B
Consumer
t1 Task A runs first and it is waiting for data from
Device driver
t2 Task B runs that means Task A is pre-empted
t3 Task A runs again and finds the device driver
not yet given any data.
t4 no data is available so it again doesn't take any action
Task A and TaskB are not synchronizedfor the
productionand consumptionof data
41. Task-A
producer
Task-B
Consumer
t1 Task A runs first and it is waiting for data from
Device driver
t2 Task B runs that means Task A is pre-empted
t3 Task A runs again and finds the device driver
not yet given any data.
t4 no data is available so it again doesn't take any action
42. Kernel Objects which can be used for
Synchronization
Events (or Event Flags)
Semaphores ( Counting and binary )
Queues and MessageQueues
Pipes
Mailboxes
Signals (UNIXlike signals)
Mutex
FreeRTOS Supports
Semaphores, Queues and
Mutex
44. Concluding points
Synchronization is nothing but aligning number of Tasks to achieve a desired behaviour.
Where as mutual exclusion is avoiding a task to execute the critical section which is
already owned by another task for execution.
Typically Semaphores are used to implement the synchronization between tasks and
between tasks and interrupts.
Mutex are the best choice to implement the mutual exclusion. That is protecting access of
a shared item.
Semaphores also can be used to implement the mutual exclusion but it will introduce
some serious design issues which we will see later.
45. Lets see how we can use semaphores
for Synchronization
47. Creating a Semaphore
SCB
Value
(Binary or a Count)
Task-1 Task-2 Task-3
Task-Waiting-List
ThisvalueDetermines howmany
semaphoretokens are available.
Keys or tokens
Semaphore id or
name
49. Creating a Semaphore
A single semaphore can be acquired a finite number of times
by the tasks depending upon the how you first initializae the
semaphore.
51. Semaphore
Semaphores are kernel objects, or you can say
kernel services which you can use to achieve the
synchronization and mutual exclusion in your
project.
55. Binary semaphore use cases
1. Synchronization
That is synchronization between tasks or synchronization
between interrupts and tasks.
2. Mutual Exclusion
Binary semaphore can also be used for Mutual Exclusion, that is to
guard the critical section
57. Counting semaphore use cases
1. CountingEvents
In this usage scenario an event handler will 'give' a semaphore each time an event occurs
– causing the semaphores count value to be increment on each give. A handler task will
'take' a semaphore each time it processes an event – causing the semaphores count
value to be decremented on each take.
2. ResourceManagement
In this usage scenario the count value indicates the number of resources available. To
obtain control of a resource a, task must first obtain a semaphore – decrementing the
semaphores count value. When the count value reaches zero there are no free
resources. When a task finishes with the resource it 'gives' the semaphore back –
incrementing the semaphores count value.
58. Counting semaphore use cases
Resource Management
In this usage scenario the count value indicates the number of
resources available. To obtain control of a resource a task must first
obtain a semaphore by decrementing the semaphores count value.
When the count value reaches zero there are no free resources. When
a task finishes with the resource it 'gives' the semaphore back thus
incrementing the semaphores count value.
59. void interrupt_handler(void)
{
do_important_work(); /* this is very short code */
sema_give(&sem); /* Give means release the key */
} /* exit from the interrupt */
void task_function(void)
{
/* if taking a key is un-successful then this task will be blocked until key is available */
while ( sem_get(&sem ) ) // GET means, trying to take the key
{
// it will come here, only if taking a key is successful .
/* Do time consuming work of the ISR */
}
}
62. Lets first see how binary semaphore can be
used for synchronization between 2 tasks.
The main use of binary semaphore or counting semaphore is synchronization. The
synchronization can be between tasks or between a task and an interrupt.
63. Binary sema to Synchronize between
Tasks
Task-1
Data
Producer
Task-2
Data
Consumer
Sema_key
Increments the key
Whendatais produced
Unblocks Task-B
If it was blockeddueto
Non-availabilityof key
64. voidtask1_running(void)
{
if( TRUE== produce_some_data())
{
/* This is a signallingforthetask2 towakeup if it is blockeddueto nonavailabilityof key*/
sema_give(&sema_key); // ‘GIVE’ operationwill incrementthesemaphorevalueby 1
}
}
voidtask2_running(void)
{
/* if sema_key is unavailable thentask2will be blocked.*/
/*if sema_key is available,thentask2will takeit and sema_key becomes unavailableagain
*/
while(sema_take(&sema_key) )
{
//Taskwillcomehereonlywhenthe sem_take operationis successful.
/* lets consumethe data*/
/*sincethe sem_keyvalueis zeroat this point,thenext timewhentask-2tries to
take,it willbe blocked. */
}
}
65. /* declaring a semaphore object */
Semaphore sem_key;
int main()
{
/* Create Task1 */
/* Create Task-2 */
/* Create a binarysemaphore*/
Sem_key = create_bin_sema();
/* schedule both the tasks */
}
66. Exercise
Create 2 tasks 1) Manager task 2) Employee task
With manager task being the higher priority .
When manager task runs it should create a “Ticket id” and post it to the
queue and signal the employee task to process the “Ticket id”.
When employee task runs it should read from the queue and process the
“Ticket id” posted by the manager task.
Use binary semaphore to synchronize between manger and employee task.
68. Synchronizationbetween Interrupt& Task
The Binary semaphore is very handy and well
suited to achieve the synchronization between
an interrupt handler execution and the task
handler execution.
69. void interrupt_handler(void)
{
do_important_work(); /* this is very short code */
xSemaphoreGiveFromISR(&sem); /* Give means release the key */
} /* exit from the interrupt */
/* I am helper task for the interrupt ! I do time consuming work on behalf of interrupt handler*/
void helper_task(void)
{
/* if taking a key is un-successful then this task will be blocked until key is available */
while (xSemaphoreTake(&sem ) ) // GET means, trying to take the key
{
// it will come here, only if taking a key is successful .
/* Do time consuming work of the ISR */
}
}
70. A NA
A NA
Thesemaphoreis not
available
xSemaphoreTake()
Task
Thetaskis blockedwaiting
forthesemaphore
xSemaphoreTake()
Task
Interrupt!!!
xSemaphoreGiveFromISR()
An Interrupt occurs..that
‘gives’thesemaphore
Synchronization between an Interrupt and a Task
using Binary semaphore
1
Task is in blockedstate initially
2 Interrupt occurs
Thesemaphore is
available
71. A NA
A NA
Interrupt!!!
xSemaphoreGiveFromISR()
xSemaphoreTake()
Task
… whichunblocks thetask
( thesemaphoreis nowavailable)
xSemaphoreTake()
Task
Thetasknowsuccessfully‘takes’the
semaphore,so it is unavailableonce
more
3 Task Unblocked & tries to take the semaphore.
4 Task tookthe semaphore
72.
73.
74. Binary sema to Synchronize between
interrupt and task.
1.An interrupt occurred, when the task was in blocked state
2.The ISR executed and gave the semaphore ,due to that the task was
unblocked.
3.The Task executed and took the semaphore.
4.The task performed the intended work and tried to take the semaphore once
again
5.Entered the Blocked state again ,if the semaphore was not immediately
available.
76. A NA
A NA
Thesemaphoreis not
available
xSemaphoreTake()
Task
Thetaskis blockedwaiting
forthesemaphore
xSemaphoreTake()
Task
Interrupt!!!
xSemaphoreGiveFromISR()
An Interrupt occurs..that
‘gives’thesemaphore
Synchronization between an Interrupt and a Task
using Binary semaphore
78. A NA
A NA
Thesemaphoreis not
available
xSemaphoreTake()
Task
Thetaskis blockedwaiting
forthesemaphore
xSemaphoreTake()
Task
Interrupt!!!
xSemaphoreGiveFromISR()
An Interrupt occurs..that
‘gives’thesemaphore
Binary semaphore can latch at most 1 event
80. A NA
A NA
Interrupt!!!
xSemaphoreGiveFromISR()
Task
Thetaskis still processingthefirst
interrupt event
xSemaphoreTake()
Task
Whenprocessingof theoriginaleventcompletes thetaskcalls xSemaphoreTake()again.Because
anotherinterrupthas alreadyoccurredthesemaphoreis alreadyavailableso thetask takes the
semaphorewithout everenteringtheBlockedstate
Anotherinterrupt occurs whilethetaskis stillprocessing
thefirst event.TheISR ‘Gives’thesemaphoreagain,
effectivelylatching theeventso theevent is not lost
81. Concluding Points on Latching Events
1. When the interrupts/events happen relatively slow, the binary
semaphore can latch at most only one event
2. If multiple interrupts/events trigger back to back, then the
binary semaphore will not able to latch all the events. So some
events will be lost .
3. How to solve the above issue ? Welcome to the world of
“Counting Semaphore”
86. Concluding points on Counting semaphore
You can use counting semaphore to count the events and process
them serially one by one using another task.
The counting semaphore can also be used for resource
management .That is to regulate access to multiple identical
resources
87. Exercise
Create 2 tasks.
1) Hander task
2) Periodic task
Periodic task priority must be higher than the handler task.
Use counting semaphore to process latched events(by handler
task) sent by fast triggering interrupts.
Use the counting semaphore to latch events from the interrupts
89. Access to a resource that is shared either between tasks or between tasks and
interrupts needs to be serialized using a some techniques to ensure data
consistency.
Usually a common code block which deals with global array , variable or
memory address, has the possibility to get corrupted , when many tasks or
interrupts are racing around it
Mutual Exclusion using Binary Semaphore
90. #define UART_DR *((unsigned long * ) (0x40000000) )
/* This is a common function which write to UART DR */
int UART_Write( uint32_t len , uint8_t *buffer)
{
for (uint32_ti=0;i < len ; i++)
{
/* if Data Register is empty write it */
while(! is_DR_empty() );
UART_DR = buffer[i];
}
}
This is Thread-Unsafe code
91. #define UART_DR *((unsigned long * ) (0x40000000) )
/* This is a common function which write to UART DR */
int UART_Write( uint32_t len , uint8_t *buffer)
{
for (uint32_ti=0;i < len ; i++)
{
/* if Data Register is empty write it */
while(! is_DR_empty() );
UART_DR = buffer[i];
}
}
This is Thread-Unsafe code
This codeis absolutelyfine in non-multitaskingscenario( onlyone taskexistsper
application).But in multi-taskingscenario, this functionis thread unsafe.That means,
there is a possibility of race conditionsincethe critical section codeis notprotected.
93. Mutual Exclusion by Binary semaphore
#define UART_DR *((unsigned long * ) (0x40000000) )
/* This is a common function which write to UART DR */
int UART_Write( uint32_t len , uint8_t *buffer)
{
for (uint32_t i=0;i < len ; i++)
{
/* if Data Register is empty write it */
while(! is_DR_empty() );
UART_DR = buffer[i];
}
}
94. 2 ways we can Implement the mutual
exclusion in FreeRTOS
1. Using Binary semaphore APIs
2. Using Mutex APIs
96. #define UART_DR *((unsigned long * ) (0x40000000) )
/* This is a common function which write to UART DR */
int UART_Write( uint32_t len , uint8_t *buffer)
{
for (uint32_t i=0;i < len ; i++)
{
sema_take_key(bin_sema );
/* if Data Register is empty write it */
while(! is_DR_empty() );
UART_DR = buffer[i]; //Critical section
sema_give_key( bin_sema );
}
}
97. Task-A
Task-BA NA
Guarded
Resource
This resource is
Guarded by binary semaphore
Binary semaphore
Used to guard the resource
Twotaskseachwant to access theresource,but a taskis not
permittedtoaccesstheresourceunlessit is thetokenholder
Task-A
Task-BA NA
Guarded
Resource
This resource is
Guarded by binary semaphore
Binary semaphore
Used to guard the resource
TaskA attempts totakethesemaphore,becausesemaphoreis availableTask
A successfully becomethesemaphoreholderso it is permittedtoaccess the
resource
xSemaphoreTake()
98. Task-A
Task-BA NA
Guarded
Resource
This resource is
Guarded by binary semaphore
Binary semaphore
Used to guard the resource
TaskB executes andattempts totakethesamesemaphore.TaskA stillhas the semaphore,
so theattempt fails andTaskB is not permittedto accesstheguardedresource!
Task-A
Task-BA NA
Guarded
Resource
This resource is
Guarded by binary semaphore
Binary semaphore
Used to guard the resource
TaskB opts toentertheblockedstateto wait forthesemaphore,allowing TaskA to run
again. TaskA finisheswiththeresourceso ‘gives’thesemaphoreback .
xSemaphoreTake()
xSemaphoreGive()
xSemaphoreTake()
99. Task-A
Task-BA NA
Guarded
Resource
This resource is
Guarded by binary semaphore
Binary semaphore
Used to guard the resource
TaskA givingthe semaphoreback causes TaskB to exittheblockedstate( thesemaphoreis nowavailable ). Task
B cannowsuccessfullyobtainthesemaphore,and havingdoneso is permittedto accesstheresource.
Task-A
Task-BA NA
Guarded
Resource
This resource is
Guarded by binary semaphore
Binary semaphore
Used to guard the resource
WhenTaskB finishes theresourceit toogives thesemaphoreback. Thesemaphoreis
nowonceagainavailable tobothtasks.
xSemaphoreTake()
xSemaphoreGive()
102. FreeRTOS Mutex Services
Mutex is derived from the phrase Mutual Exclusion !
Mutex is also kind of binary semaphore that include a priority inheritance
mechanism which minimizes the effect of Priority inversion .
Binary semaphores are the better choice for implementing synchronisation
(between tasks or between tasks and an interrupt), mutexes are the better
choice for implementing simple mutual exclusion
103. Advantages of Mutex Over Binary
semaphore.
Priority Inheritance
Mutexes and binary semaphores are very similar – the only major difference is
mutexes automatically provide a basic ‘priorityinheritance’ mechanism.
Priority inheritance is a technique by which mutex minimizes the negative effects
of priority inversion . Mutex can not able to fix the priority inversion problem
completely but it surely lessens its impact.
104. Advantages of Mutex Over Binary
semaphore.
Priority Inheritance
Most of the RTOS including FreeRTOS mutex implementation implements priority
inheritance feature.
Since mutex has all these features to avoid priority inversion, the memory
consumed by mutex serivce may be higher than the binary semaphore..
105. t1
LowPriority task[LP]
MediumPriority task[MP]
HighPriority task[HP]
TheHP taskattempts to takethe Mutexbut
can't becauseit is stillbeingheldby theLP task.
TheHP task enters theblockedstateto wait for
thesemaphoreto becomeavailable.
TheLP taskreturningthe mutexcauses theHP taskto exit
theblockedstateas themutexholder.WhentheHP task
has finishedwiththe mutexit gives it back.TheMP task
only executes when theHP taskreturns totheblocked
stateso theMP taskneverholds up theHP task.
The LP tasktakes a Mutexbefore
being preempted by theHP task.
TheLP taskis preventingtheHP taskfromexecutingso inherits thepriorityof the
HP task. TheLP taskcannotnowbe preemptedby theMP task.TheLP task
cannot nowbe preempted by theMP task, so theamountof timethat priority
inversionexists is minimized. WhentheLP taskgives the mutexback it returns its
original priority.!
Time
1
2
3
4
107. Mutex Disadvantage
If your system is very simple having small number of manageable
tasks or if you are working in memory constrained environment
then its better to avoid using mutex by opting out from the
compilation . Because mutex will surely eat up more CODE space
than binary semaphore.
110. Ways to protect the Critical Section
1. Binary semaphore
2. Mutex
3. Crude way ( disabling interrupts of the
system, either globally, or up to a specific
interrupt priority level)
111. Advantages of Mutex Over Binary
semaphore.
Mutex automatically provides a basic ‘priorityinheritance’ mechanism.
Priorityinheritance is a technique by which mutex minimizes the negative
effects of priority inversion . Mutex can not able to fix the priority inversion
problem completely but it surely lessens its impact.
113. GoodTask
ArrogantTask
Alright ! Lets have an
agreement ! No one
accesses UART_DR
without acquiring the
mutex .
No ! I don’t
agree to this
agreement
UART_DR
(shareddata)
120. Priority register in Cortex M3/M4
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
8-bit interrupt priorityregister
In CortexM basedProcessor everyinterruptandSystemexceptionhas 8 bitinterruptpriority
registerto configure its Priority
So , ideallythereare 2^8 ( 256) interruptpriority levelsfrom 0x00 to 0xff .
Where0x00 is the highestpriorityand 0xff is the lowestpriority
121. Priority Register
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Implemented Not implemented
Microcontroller Vendor XXX Microcontroller Vendor YYY
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Implemented Not implemented
8 Levels of Priority level 16 Levels of Priority level
Write has no effect Write has no effect
0x00,0x20,0x40,0x60,
0x80,0xA0,0xC0, 0xE0
0x00,0x10,0x20,0x30,0x40,0x50,
0x60,0x70,0x80,0x90,0xa0,0xb0,0xc0,0xd0,0xe0,0xf0
AT91SAM3X8ESTM32F4xxTM4C123G
122. Example 1 : Setting Priority
Let’s say you want to configure a priority of an interrupt number 8(IRQ8) to be 5.
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Implemented Not implemented
AT91SAM3X8E
Interrupt priority Register corresponding to IRQ8
So, Now you want to write value 5 into this
register.. How do you write ?
123. Example 1 : Setting Priority
Let’s say you want to configure a priority of an interrupt number 8(IRQ8) to be 5.
AT91SAM3X8E
Interrupt priority Register corresponding to IRQ8
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Implemented Not implemented
0 0 0 0 0 1 0 1
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Implemented Not implemented
0 1 0 1 0 0 0 0
Priority_register = priority_value << ( 8 - __NVIC_PRIO_BITS)
Priority_register = priority_value
126. FreeRTOS Stack and heap
RAM
Low High
Heap (configTOTAL_HEAP_SIZE)
Task -1
TCB
Stack
TCB1
STACK-1
Task -2
TCB
Stack
TCB-2
STACK-2
SCB
Semaphore
SCB
Queue
QCB
Item list
QCB
ITEMLIST
This RAM space is used for
Global data, arrays, static variables,
etc
Dynamically Created kernel objects
xTaskCreate() xTaskCreate() xSemaphoreCreateBinary()xQueueCreate()
127. FreeRTOS Heap management Scheme
FreeRTOS APIs and
Applications
heap_1.c heap_2.c heap_3.c heap_4.c heap_5.c
pvPortMalloc() pvPortMalloc()
vPortFree()
pvPortMalloc()
vPortFree()
pvPortMalloc()
vPortFree()
pvPortMalloc()
vPortFree()
Application uses any one of these Schemes according to its requirements
Your_own
_mem.c
pvPortMalloc()
vPortFree()
128. heap_1.c
• Simplest Implementation among all other heap
management implementations
• In this implementation you can only allocate Heap
memory but you can not free it
• Can be used if your application never deletes a
task, queue, semaphore, mutex, etc. (which
actually covers the majority of applications in
which FreeRTOS gets used).
• This implementation is always deterministic
(always takes the same amount of time to execute)
and cannot result in memory fragmentation.
129. heap_2.c
• Heap_2.c is implemented using “Best Fit” algorithm
• This scheme allows freeing of memory unlike heap_1.c
• Combining adjacent free blocks into a single large
blocks is not possible using this scheme
• This scheme is used when the application repeatedly
deletes tasks, queues, semaphores, mutexes, etc . With
the possibility of memory fragmentation.
• Should not be used if the memory being allocated and
freed is of a random size
• It is not deterministic , but this scheme is much more
efficient than most standard C library malloc
implementations.
130. heap_3.c
• Heap_3.c just implements a wrapper around your standard
library memory allocation functions such as malloc and free
• The wrapper simply makes the malloc() and free() functions
thread safe.
• This implementation requires the linker to setup a heap, and
the compiler library to provide malloc() and free()
implementations.
• Not deterministic
• Not optimized for Embedded Systems, so consumes more
Code space.
• the configTOTAL_HEAP_SIZE setting in FreeRTOSConfig.h has
no effect when heap_3 is used
131. heap_4.c
• This scheme uses a first fit algorithm and, unlike scheme 2,
it does combine adjacent free memory blocks into a single
large block
• Can be used even when the application repeatedly deletes
tasks, queues, semaphores, mutexes, etc
• Even when the memory being allocated and freed in
random size, it is less likely to result in a heap space that is
badly fragmented in to smaller useless blocks.
• Much more efficient than most standard C library malloc
implementations.
• heap_4.c is particularly useful for applications that want to
use the portable layer memory allocation schemes directly
in the application code (rather than just indirectly by calling
API functions that themselves call pvPortMalloc() and
vPortFree()).
132. heap_5.c
• This scheme uses the same first fit and memory
coalescence algorithms as heap_4, and allows the heap to
span multiple non adjacent (non-contiguous) memory
regions.