This document analyzes the total harmonic distortion (THD) of 7, 9, and 11 level cascaded H-bridge multilevel inverters using multicarrier pulse width modulation. The analysis found that THD in the output voltage decreases and output voltage increases with more levels. Simulations in MATLAB/Simulink showed that an 11-level inverter had the lowest THD at 11.1%, while a 7-level inverter had the highest THD at 24.64%. More levels therefore better reduced the harmonic distortion.
This paper presents investigation and performance analysis of novel down sampling based clamping SV PWM technique for diode and cascaded Multi-level Invereter fed to Induction motor drive. A novel down sampling based clamping SVPWM has developed by adding triangular off set to sinusoidal fundamental waveform is modified by down sampling the reference wave by order of 10 so this technique is called clamping space vector pulse width modulation techniques such as PD, POD and APOD. so as to shift the lower order harmonics to higher order side. This novel carrier is compared with the offset injected space vector reference waveform to generate the required PWM pulses to the inverter. To analyze the performance of the proposed PWM technique it is implemented on seven level diode and cascaded Multi-level Inverter using Matlab/Simulink software tool for output line, phase voltage, currents, speed, torque and Total harmonic distortion analysis.
Optimized Hybrid Phase Disposition PWM Control Method for Multilevel InverterIDES Editor
This paper presents a new variation of hybrid
phase disposition pulse width modulation technique suitable
for cascaded multilevel inverter. A hybrid PDPWM is
developed based on low frequency PWM and high
frequency Sinusoidal PWM. An optimized sequential
switching scheme introduced in this proposed method to
equalize electro static and electro magnetic stress among the
power devices. It is confirmed that the proposed technique
offers significantly lower switching losses and switching
transitions. Furthermore, the proposed hybrid PDPWM
offers better harmonic performance compared to its
conventional PWM counterpart. Simulation results are
included in this paper in order to confirm the effectiveness
of the proposed technique.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
An Enhanced Flying Capacitor Multilevel Inverter fed Induction Motor DriveIDES Editor
This paper focused on the development of
capacitor voltage balancing methods in a flying capacitor
multilevel inverter (FCMLI) fed induction motor drive.
For improving the performance of flying capacitor
multilevel inverter, a switching pattern selection scheme
is implemented. The proposed method has been designed
a nine -level flying capacitor multilevel inverter by using
sinusoidal pulse width modulation technique. The selected
pattern has been exposed to give superior performance in
load voltage, total harmonics distortion and capacitor
voltage fluctuation. The performance of proposed
strategies is confirmed through simulation investigations.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
This paper presents investigation and performance analysis of novel down sampling based clamping SV PWM technique for diode and cascaded Multi-level Invereter fed to Induction motor drive. A novel down sampling based clamping SVPWM has developed by adding triangular off set to sinusoidal fundamental waveform is modified by down sampling the reference wave by order of 10 so this technique is called clamping space vector pulse width modulation techniques such as PD, POD and APOD. so as to shift the lower order harmonics to higher order side. This novel carrier is compared with the offset injected space vector reference waveform to generate the required PWM pulses to the inverter. To analyze the performance of the proposed PWM technique it is implemented on seven level diode and cascaded Multi-level Inverter using Matlab/Simulink software tool for output line, phase voltage, currents, speed, torque and Total harmonic distortion analysis.
Optimized Hybrid Phase Disposition PWM Control Method for Multilevel InverterIDES Editor
This paper presents a new variation of hybrid
phase disposition pulse width modulation technique suitable
for cascaded multilevel inverter. A hybrid PDPWM is
developed based on low frequency PWM and high
frequency Sinusoidal PWM. An optimized sequential
switching scheme introduced in this proposed method to
equalize electro static and electro magnetic stress among the
power devices. It is confirmed that the proposed technique
offers significantly lower switching losses and switching
transitions. Furthermore, the proposed hybrid PDPWM
offers better harmonic performance compared to its
conventional PWM counterpart. Simulation results are
included in this paper in order to confirm the effectiveness
of the proposed technique.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
An Enhanced Flying Capacitor Multilevel Inverter fed Induction Motor DriveIDES Editor
This paper focused on the development of
capacitor voltage balancing methods in a flying capacitor
multilevel inverter (FCMLI) fed induction motor drive.
For improving the performance of flying capacitor
multilevel inverter, a switching pattern selection scheme
is implemented. The proposed method has been designed
a nine -level flying capacitor multilevel inverter by using
sinusoidal pulse width modulation technique. The selected
pattern has been exposed to give superior performance in
load voltage, total harmonics distortion and capacitor
voltage fluctuation. The performance of proposed
strategies is confirmed through simulation investigations.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
This paper proposed a new sparce matrix converter with Z-source network to provide unity voltage transfer ratio. It is an ac-to-ac converter with diode-IGBT bidirectional switches. The limitations of existing matrix converter like higher current THD and less voltage transfer ratio issues are overcome by this proposed matrix converter by inserting a Z-source. Due to this Z-source current harmonics are totally removed. The simulation is performed for different frequencies. The simulation results are presented to verify the THD and voltage transfer ratio and compared with the existing virtual AC/DC/AC matrix converter. The experimental output voltage amplitude can be varied with the variable frequencies.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
A 80Ms/sec 10bit PIPELINED ADC Using 1.5Bit Stages And Built-in Digital Error...VLSICS Design
Use of pipelined ADCs is becoming increasingly popular both as stand alone parts and as embedded functional units in SOC design. They have acceptable resolution and high speed of operation and can be placed in relatively small area. The design is implemented in 0.18uM CMOS process. The design includes a folded cascode op-amp with a unity gain frequency of 200MHz at 88 deg. Phase margin and a dc gain of 75dB. The circuit employs a built in sample and hold circuit and a three phase non-overlapping clock.
The power electronics device which converts DC power to AC power at required output voltage and frequency level is known as inverter. Multilevel inverter is to synthesize a near sinusoidal voltage from several levels of dc voltages. In order to maintain the different voltage levels at appropriate intervals, the conduction time intervals of MOSFETS have been maintained by controlling the pulse width of gating pulses. In this paper single phase to three phase power conversion using PWM technique. The simulation is carried out in MATLAB/Simulink environment which demonstrate the feasibility of proposed scheme.
Zuken - Improve pcb quality and cost with concurrent power integrity analysis...Zuken
This presentation will look at the increasing challenges with power distribution systems on modern high-speed PCBs.
This presentation will consider:
a)The problem:
-
IC input impedance behavior
-
Resonance behavior of PDS.
- Role of decoupling capacitors
b)
EDA methodology for concurrent power integrity simulation throughout PCB design process.
This paper proposed a new sparce matrix converter with Z-source network to provide unity voltage transfer ratio. It is an ac-to-ac converter with diode-IGBT bidirectional switches. The limitations of existing matrix converter like higher current THD and less voltage transfer ratio issues are overcome by this proposed matrix converter by inserting a Z-source. Due to this Z-source current harmonics are totally removed. The simulation is performed for different frequencies. The simulation results are presented to verify the THD and voltage transfer ratio and compared with the existing virtual AC/DC/AC matrix converter. The experimental output voltage amplitude can be varied with the variable frequencies.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
A 80Ms/sec 10bit PIPELINED ADC Using 1.5Bit Stages And Built-in Digital Error...VLSICS Design
Use of pipelined ADCs is becoming increasingly popular both as stand alone parts and as embedded functional units in SOC design. They have acceptable resolution and high speed of operation and can be placed in relatively small area. The design is implemented in 0.18uM CMOS process. The design includes a folded cascode op-amp with a unity gain frequency of 200MHz at 88 deg. Phase margin and a dc gain of 75dB. The circuit employs a built in sample and hold circuit and a three phase non-overlapping clock.
The power electronics device which converts DC power to AC power at required output voltage and frequency level is known as inverter. Multilevel inverter is to synthesize a near sinusoidal voltage from several levels of dc voltages. In order to maintain the different voltage levels at appropriate intervals, the conduction time intervals of MOSFETS have been maintained by controlling the pulse width of gating pulses. In this paper single phase to three phase power conversion using PWM technique. The simulation is carried out in MATLAB/Simulink environment which demonstrate the feasibility of proposed scheme.
Zuken - Improve pcb quality and cost with concurrent power integrity analysis...Zuken
This presentation will look at the increasing challenges with power distribution systems on modern high-speed PCBs.
This presentation will consider:
a)The problem:
-
IC input impedance behavior
-
Resonance behavior of PDS.
- Role of decoupling capacitors
b)
EDA methodology for concurrent power integrity simulation throughout PCB design process.
Fotos de estátuas da Europa, pelos jornalistas Branco Di Fátima e Maria Silvério, para o blog Alfandegário -www.dzai.com.br/alfandegario/blog/alfandegario
Multi Carrier based Multilevel Inverter with Minimal Harmonic DistortionIJPEDS-IAES
This paper presents performance features of Asymmetric Cascaded
Multilevel inverter. Multilevel inverters are commonly modulated by using
multicarrier pulse width modulation (MCPWM) techniques such as phaseshifted
multicarrier modulation and level-shifted multicarrier modulation.
Amongst these, level-shifted multicarrier modulation technique produces the
best harmonic performance. This work studies about multilevel inverter with
unequal DC sources using level shifting MCPWM technique. The
Performances indices like Total Harmonic Distortion (THD), number of
switches and DC Sources are considered. A procedure to achieve an
appropriate level shifting is also presented is this paper.
This paper deals with the design of cascaded 11 level H- bridge inverter. It includes a comparison between the 11 level H-bridge and T-bridge multilevel inverter. The cascaded inverter of higher level is a very effective and practical solution for reduction of total harmonic distortion (THD).These cascaded multilevel inverter can be used for higher voltage applications with more stability. As the level is increased the output waveform becomes more sinusoidal in nature. The inverter is designed using multicarrier sinusoidal pulse width modulation technique for generating triggering pulses for the semiconductor switches used in the device. Through this paper it will be proved that a cascaded multilevel H-bridge topology has higher efficiency than a T-bridge inverter, as whichever source input voltage is provided since input is equal to the output voltage. In T-bridge inverter, the output obtained is half of the applied input, so efficiency is just half as compared to H-bridge. The output waveform is distorted and has higher THD. The simulation is performed using MATLAB /Simulink 2013 software.
International Journal of Computational Engineering Research(IJCER)ijceronline
International Journal of Computational Engineering Research(IJCER) is an intentional online Journal in English monthly publishing journal. This Journal publish original research work that contributes significantly to further the scientific knowledge in engineering and Technology.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
Performance Evaluation of Nine Level Modified CHB Multilevel Inverter for Var...IJMER
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
three level diode clamp inverter. that converts any type of DC ( rectified, PV cell, battery etc.) to AC supply. we made by mosfet and ardiuno . in this ppt we present the Simulink model of a three-level inverter and the hardware presentation of the inverter.
COMPREHENSIVE ANALYSIS AND SIMULATION OF MULTILEVEL POWER CONVERTERS TO CURTA...ecij
Present day industrial applications require higher power apparatus for power conversion. At medium voltage grid, to connect only one power semiconductor switch directly is a not practically successful concept. To overcome this multilevel power converter structure has been introduced and studied as an alternative in high power and medium voltage applications. Renewable energy sources like photovoltaic, wind, fuel cells can be conveniently interfaced to a multilevel converter system for high power applications. In this study it is discussed in detail for different levels of the multilevel converters using pulse width
modulation technique (PWM) the harmonics contents decreases gradually. The simulated results are presented and compared thereafter. Total harmonic distortion decreases as the number of levels increased are tabulated accordingly. All the simulation results are carried out under MATLAB/Simulink environment.
COMPREHENSIVE ANALYSIS AND SIMULATION OF MULTILEVEL POWER CONVERTERS TO CURTA...ecij
Present day industrial applications require higher power apparatus for power conversion. At medium
voltage grid, to connect only one power semiconductor switch directly is a not practically successful
concept. To overcome this multilevel power converter structure has been introduced and studied as an
alternative in high power and medium voltage applications. Renewable energy sources like photovoltaic,
wind, fuel cells can be conveniently interfaced to a multilevel converter system for high power applications.
In this study it is discussed in detail for different levels of the multilevel converters using pulse width
modulation technique (PWM) the harmonics contents decreases gradually. The simulated results are
presented and compared thereafter. Total harmonic distortion decreases as the number of levels increased
are tabulated accordingly. All the simulation results are carried out under MATLAB/Simulink environment.
Multilevel inverters have become more popular over the years in electric high power application
with the promise of less disturbances and the possibility to function at lower switching frequencies than
ordinary two-level inverters. This paper presents information about several multilevel inverter topologies,
such as the Neutral-Point Clamped Inverter and the Cascaded Multi cell Inverter. These multilevel
inverters will also be compared with two-level inverters in simulations to investigate the advantages of
using multilevel inverters. Modulation strategies, component comparison and solutions to the multilevel
voltage source balancing problem will also be presented in this work.
Keywords — multilevel, Neutral-clamped, PWM.
Investigation of THD for Cascaded Multi-Level Inverter Using Multicarrier Mod...IJERA Editor
A novelty kind of Multilevel converters are used in high voltage and high power application of industry field, can able to produce near sinusoidal voltage/currents with only operating at fundamental frequency switching. This paper presents a initial level of 5-level up to its giant level 13-level cascaded multilevel converter. In now a days multilevel inverters has become very popular for motor drive applications of industry. Multicarrier pulse width modulation techniques is an effective solution for increases the number of levels of the output wave form and thereby dramatically reduced the harmonics and total harmonic distortion(THD). The output waveform has 5,7,9,11 and 13 levels. In this paper three multicarrier pulse width modulation techniques such as phase shifted, level shifted and the wave level shifted Multi-carrier modulation PWM techniques are discussed. These methods are modeled for all level CMC by using the MATLAB/SIMULINK and the THD of the these methods are compared.
Asymmetrical Cascaded Multi Level Inverter using Control Freedom Pulse width ...IAES-IJPEDS
In this paper, the suggested topologies are gained by cascading a full bridge inverter with dissimilar DC sources. This topology has several new patterns adopting the fixed switching frequency, multicarrier control freedom degree with mixture conceptions are established and simulated for the preferred three-phase cascaded multilevel inverter. In outstanding switching arrangement terminations, there are convinced degrees of freedom to produce the nine level AC output voltages with terminated switching positions for producing altered output voltages. These investigations focus on asymmetrical cascaded multilevel inverter engaging with carrier overlapping pulse width modulation (PWM) topologies. These topologies offer less amount of harmonics present in the output voltage and superior root mean square (RMS) values of the output voltages associated with the traditional sinusoidal pulse width modulation. This research studies carries with it MATLAB/SIMULINK based simulation and experimental results obtained using appropriated prototype to prove the validity of the proposed concept.
Abstract: The output voltage of an inverter has in general non-sinusoidal shape. The required AC output quantity – frequency and voltage – is created by a sequence of segments properly cut out from the input variable quantity, which is a DC-voltage. The required output quantities, AC voltage amplitude and frequency, are created either from rectangular pulses or by the pulse-width- modulation (PWM). Power source with a non-sinusoidal voltage applied to a electric equipment brings some undesirable effects. For example, it can cause additional losses in the windings and ferromagnetic circuits of transformers. In AC motors the additional losses are higher and operating characteristics of motors are worse. In photovoltaic power sources, the use of inverters must be carefully considered, because a wide range of harmonics can be generated. This would greatly decline the quality of produced and transmitted electric energy. Demand for high-voltage, high power converters capable of producing of producing high-quality waveform while utilizing low voltage devices and reduced switching frequency has led to the multilevel inverter development with regard to semiconductor power switch voltage limit. In this paper an overview is presented of different Multilevel inverter techniques to reduce the total harmonic distortion of output voltage in a inverter.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Performance Analysis of Higher Order Cascaded H-Bridge Multilevel Invertersijtsrd
Cascade H-Bridge Multilevel Inverters are very popular and have many applications in electric utilities and for industrial drives. When these inverters are used for industrial drives directly, the Total Harmonic Distortion (THD) in the output voltage of inverters is very significant as the performance of drive depends very much on the quality of voltage applied to drive. A Multilevel Inverter in high power ratings improves the performance of the system by reducing Harmonics. This paper presents the simulation of single phase nine level and eleven level inverters. Detailed analysis of these inverters has been carried out and compared with different loads. PWM control strategy is applied to the switches at appropriate conducting angles with suitable delays. These different level inverters are realized by cascade H-Bridge in MATLAB/SIMULINK. The inverters with a large number of steps can generate high quality voltage waveforms. The THD depends on the switching angles for different units of Multilevel Inverters. Ms. Komal Shende | Dr. HariKumar Naidu | Prof. Vaishali Pawade"Performance Analysis of Higher Order Cascaded H-Bridge Multilevel Inverters" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-4 , June 2018, URL: http://www.ijtsrd.com/papers/ijtsrd14456.pdf http://www.ijtsrd.com/engineering/electrical-engineering/14456/performance-analysis-of-higher-order-cascaded-h-bridge-multilevel-inverters/ms-komal-shende
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RMD24 | Debunking the non-endemic revenue myth Marvin Vacquier Droop | First ...BBPMedia1
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Retail media wordt gezien als het nieuwe advertising-medium en ook mediabureaus richten massaal retail media-afdelingen op. Merken die niet in de betreffende winkel liggen staan ook nog niet in de rij om op de retail media netwerken te adverteren. Marvin belicht de uitdagingen die er zijn om echt aansluiting te vinden op die markt van non-endemic advertising.
The world of search engine optimization (SEO) is buzzing with discussions after Google confirmed that around 2,500 leaked internal documents related to its Search feature are indeed authentic. The revelation has sparked significant concerns within the SEO community. The leaked documents were initially reported by SEO experts Rand Fishkin and Mike King, igniting widespread analysis and discourse. For More Info:- https://news.arihantwebtech.com/search-disrupted-googles-leaked-documents-rock-the-seo-world/
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Js3217191723
1. M.S.Sivagamasundari, Dr.P.Melba Mary / International Journal of Engineering Research and
Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 2, March -April 2013, pp.1719-1723
Analysis Of Total Harmonic Distortion Using Multicarrier Pulse
Width Modulation
M.S.Sivagamasundari*, Dr.P.Melba Mary**
*(Assistant Professor , Department of EEE,V V College of Engineering,Tisaiyanvilai)
**(Principal , Department of EEE,V V College of Engineering,Tisaiyanvilai)
ABSTRACT
Cascaded H-Bridge Multilevel harmonics further, carrier-based PWM methods are
Inverters have become an effective and practical suggested in the literature [4].
solution for reducing harmonics, switching losses In this paper 7, 9 and 11 levels of cascaded h-
and allows for higher output voltage and have bridge multilevel inverters total harmonic distortion
many applications in electric utility and for is analyzed using multicarrier pulse width
industrial drives. In this paper 7, 9 and 11 levels modulation technique. These levels are employed
of cascaded h-bridge multilevel inverters total to generate ac output voltage producing different
harmonic distortion is analyzed using magnitudes of THD indices for comparison
multicarrier pulse width modulation technique. purpose. In the analysis it is found that the THD in
These levels are employed to generate ac output voltage decrease and output voltage increase
output voltage producing different magnitudes with increase in number of levels. The THD has
of THD indices for comparison purpose. In been analyzed by the MATLAB/Simulink.
the analysis it is found that the THD in output
voltage decrease and output voltage increase with 2 CASCADED H-BRIDGE
increase in number of levels. The THD has been MULTILEVEL INVERTER
analyzed by the MATLAB/Simulink. A cascaded multilevel inverter is made
up of from series connected single full bridge
Keywords: Multilevel inverter, Cascaded H- inverter, each with their own isolated dc bus.
Bridge multilevel inverter, Multicarrier pulse width This multilevel inverter can generate almost
modulation, Total harmonic distortion. sinusoidal waveform voltage from several
separate dc sources, which may be obtained from
1 INTRODUCTION solar cells, fuel cells ,batteries, ultra capacitors,
A multilevel inverter is a power electronic etc. this type of converter does not need any
converter that synthesizes a desired output voltage transformer or clamping diodes or flying
from several levels of dc voltages as inputs. With an capacitors.[5]
increasing number of dc voltage sources, the
converter output voltage waveform approaches a Each level can generate three different
nearly sinusoidal waveform while using a voltage outputs +Vdc, 0 and –Vdc by connecting
fundamental frequency-switching scheme. The the dc sources to the ac output side by different
primary advantage of multilevel inverter is their combinations of the four switches. The output
small output voltage, results in higher output quality, voltage of an M-level inverter is the sum of all
lower harmonic component, better electromagnetic the individual inverter outputs. Each of the H-
compatibility, and lower switching losses. [1] [2]. bridge’s active devices switches only at the
High magnitude sinusoidal voltage with fundamental frequency, and each H-bridge unit
extremely low distortion at fundamental frequency generates a quasi-square waveform by phase-
can be produced at output with the help of shifting its positive and negative phase legs
multilevel inverters by connecting sufficient switching t i m i n g s . Further, each switching
number of dc levels at input side. There are mainly device always conducts for 180˚ (or half cycle)
three types of multilevel inverters; these are a) regardless of the pulse width of the quasi-square
diode- clamped, b) flying capacitor and c) cascade wave so that this switching method results in
multilevel inverter (CMLI).Among these three, equalizing the current stress in each active device
CMLI has a modular structure and requires least .[6]
number of components as compared to other two
topologies, and as a result, it is widely used for This topology of inverter is suitable for
many applications in electrical engineering as high voltage and high power applications
HVDC, SVC, stabilizers, and high power motor because of its ability of synthesize waveforms
drives.[2][3] The output waveforms of multilevel with better harmonic spectrum and low
inverters are in a stepped form, therefore they have switching frequency. Considering the simplicity
reduced harmonics compared to a square wave of the circuit and advantages, Cascaded H-bridge
inverter. To reduce the topology is chosen for this work and harmonic
1719 | P a g e
2. M.S.Sivagamasundari, Dr.P.Melba Mary / International Journal of Engineering Research and
Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 2, March -April 2013, pp.1719-1723
distortion is reduced due to more output levels.[9] distortion is a minimum. Generally these
,
An example phase voltage waveform for an eleven angles are chosen so that predominant lower
level cascaded H-bridge inverter with 5 SDCSs th th th
frequency harmonics, 5 ,7 ,9 and
and 5 full bridges is shown in Figure.2. The th
phase voltage van = va1 + va2 +va3 + va4 + va5. 11 are eliminated . [10]
For a stepped waveform such as the one depicted in
Figure 2 with s steps, the Fourier Transform for 3 MULTICARRIER PWM TECHNIQUE
this waveform follows [7,8]. The Multicarrier PWM uses several
triangular carrier signals and only one modulating
sinusoidal signal as reference wave. If an 'n' level
inverter is employed , 'n-1' carriers will be needed.
At every instant each carrier is compared with the
modulating signal. Each comparison gives one if the
modulating signal is greater than the triangular
carrier , zero otherwise. The results are added to
give the voltage level, which is required at the
output terminal of the inverter.[10].
Frequency modulation ratio is defined as the
ratio of carrier frequency and modulating frequency.
mf = fc / fm ............................... (5)
Amplitude modulation ratio is defined as the ratio
of amplitude of modulating signal and amplitude of
carrier signal.
Fig.1.Single-phase structure of a m m = Am/ 1 …………….(6)
n− Ac
level cascaded H bridge multilevel inverter a
Using this technique THD value can be reduced
with reduction in output voltage.
4 PROPOSED TOPOLOGY
The Proposed Cascaded Multilevel
Inverter topology involves different levels. The
circuit needs independent dc source. In case of
seven level inverter , it consists of conventional
three-level bridges, whose AC terminals are
simply connected in series to synthesize a
three level square wave output voltage
waveform.
In case of nine level inverter , it consists
of conventional four-level bridges, whose AC
terminals are simply connected in series to
synthesize a four level square wave output
voltage waveform.
In case of eleven level inverter , it consists
of conventional five-level bridges, whose AC
terminals are simply connected in series to
synthesize a five level square wave output
voltage waveform.
5 SIMULATION RESULTS
Fig.2.Output voltage waveform of a m-level This paper presents comparison of output
cascaded H bridge multilevel inverter voltages at various levels and harmonic
elimination for 7-level, 9- level and 11-level
The conducting angles, θ1, θ2, ..., θs, can be inverters of the proposed topology Fig.3,4,5 and 6
.
chosen such that the voltage total harmonic shows the Simulink model for proposed Inverter
1720 | P a g e
3. M.S.Sivagamasundari, Dr.P.Melba Mary / International Journal of Engineering Research and
Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 2, March -April 2013, pp.1719-1723
topology. The generated output pulses from the
pulse generator are shown in the Fig. 7. and Fig.8.,
Fig.6. Subcircuit
Fig.3.Simulation circuit of the proposed method
Fig.4. Subcircuit
Fig.7. Pulse Generator with Multi CarrierPWM
Fig.8.Gate pulses
Fig.5. Subcircuit
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4. M.S.Sivagamasundari, Dr.P.Melba Mary / International Journal of Engineering Research and
Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 2, March -April 2013, pp.1719-1723
Fig.9. Output Voltage Waveform of seven level
inverter
Fig.12.Harmonic spectrum
Fig.10. Harmonic Spectrum
Fig.13. Output Voltage Waveform of eleven level
inverter
Fig.11. Output Voltage Waveform of nine level
inverter
Fig.14. Harmonic Spectrum
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5. M.S.Sivagamasundari, Dr.P.Melba Mary / International Journal of Engineering Research and
Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 2, March -April 2013, pp.1719-1723
Applications, vol. 32, no. 5, pp. 1130-1138,
Table .1. THD at various levels September/October 1996.
[4] X. Y uan and I. Barbi, “Fundamentals of a
New Diode Clamping multilevel
Number of Switches Inverter”, IEEE Transaction sPower
Electron., V 15, No.4, 2000, pp. 711-718.
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[5] K.Surya Suresh , M.Vishnu Prasad,”PV
Inverter 7- level 9- level 11-level Cell Based Five Level Inverter
Type Using Multicarrier PWM “International
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Research,V ol.1, Issue.2, pp-545-551.
Cascaded 12 16 20
[6] PhilipT.Krein ,Robert S.Balog and Xin
H Bridge
Geng,”High-Frequency Link Inverter
for fuel cells Based on Multiple
% THD 24.64 20.75 11.1
Carrier PWM”, IEEE
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Transactions on Power Electronics,
V 19, N0.5, Sep 2004.
ol
[7] D.Mohan and Sreejith B.Kurub
In case of seven level inverter requires 12 “Performance Ana lysis of Multi
switches to get the seven level output voltage and Level Shunt Active Filter based on
the output voltage is shown in fig.9.The SDM” in CiiT International
corresponding FFT analysis is also shown in fig.10. Journal of Di gital Signal Pro cessing
In case of nine level inverter requires 16 pp42 – 46
switches to get the nine level output voltage and [8] B.P .Mcgrath and D.G Holmes “Multi
the output voltage is shown in fig.11.The carrier PWM strategies for multilevel
corresponding FFT analysis is also shown in fig.12. inverter” IEEE Transaction on Industrial
In case of eleven level inverter requires 20 Electronics, V olume 49, Issue 4, Aug
switches to get the eleven level output voltage and 2002, pp 858-867
the output voltage is shown in fig.13.The [9] L. M. Tolbert, F. Z. Peng, and T. G. Habetler
corresponding FFT analysis is also shown in fig.14. “Multilevel Converters for LargeElectric
For proposed topology the harmonic spectrum of Drives,”IEEE Transactions on Industry
the simulation system are compared and Applications, vol. 35, no. 1, Jan/Feb.
presented in the Table 1 at various levels. 1999,pp.36-44.
[10] L. M. Tolbert, F. Z. Peng, T. G. Habetler,
6 CONCLUSION “Multilevel Inverters for Electric
In the Present work , the THD of different Vehicle Applica tions,” IEEE Workshop on
levels of Cascaded H-Bridge Multilevel Inverter Power Electronics in Transportation,
has been analyzed using MATLAB/Simulink. It has Oct 22-23, 1998,Dearborn, Michigan,
been found that the total harmonic distortion is low pp.1424-1431.
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Inverter. Z.Peng,”Multilevel Invert ers: A
Survey ofT opologies, Controls, and
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