The document explains memory types in computers, focusing on RAM (volatile) and ROM (non-volatile), and further details the CPU cache as a faster memory solution for data access. It discusses various memory technologies, including EPROM, flash EEPROM, and DRAM, highlighting their characteristics, usage, and limitations. Additionally, it mentions the necessity of refreshing DRAM and its storage capacities.

1. MAHE KARIM
CSE,DIU
www.about.me/mahekarim

2. WHAT IS MEMORY ?
• A memory chip is a small computer device used to store
information, data or a program that is run on a computer or
other electronic device
• There are several different types of memory chips, although
some are more commonly used than others.

3. TYPES OF MEMORY
• Normally Two (02) Types of Memory
RAM – Random Access Memory / Volatile Memory & Writeable
ROM – Read Only Memory / Non-Volatile Memory & Read Only

4. VOLTAILE AND WRITEABLE MEMORY

5. MEMORY STEP – WHERE WHO WORK

6. CACHE MEMORY
• A CPU cache is a cache used by the
central processing unit (CPU) of a
computer to reduce the average
time to access data from the
main memory. The cache is a
smaller, faster memory which
stores copies of the data from
frequently used main memory
locations.

7. EPROM
• EPROM : Erasable Programmable Read-
Only Memory.
• Reprogramming requires up to 20
minutes of high-intensity UV light
exposure.
Flash EEPROM : Electrically Erasable
Programmable ROM.
• Also called EAROM (Electrically
Alterable ROM) and NOVRAM (NOn-
Volatile RAM).
• Writing is much slower than a
normal RAM.
•
• Used to store setup information,
e.g. video card, on computer
systems.
• Can be used to replace EPROM for
BIOS memory.

8. DRAM
• DRAM:
• SRAMs are limited in size (up to about 128K X 8).
• DRAMs are available in much larger sizes, e.g., 64M X 1.
•
• DRAMs MUST be refreshed (rewritten) every 2 to 4 ms
• Since they store their value on an integrated capacitor that loses charge over time.
•
• This refresh is performed by a special circuit in the DRAM which refreshes the entire memory
using 256 reads.
• Refresh also occurs on a normal read, write or during a special refresh cycle.
• More on this later.
•
• The large storage capacity of DRAMs make it impractical to add the required number of address pins.
• Instead, the address pins are multiplexed .

9. DRAM’S – TMS4464 DIAGRAM

10. THANK YOU