SlideShare a Scribd company logo
1 of 41
Download to read offline
4
• Combinational circuits consists of logic gates
whose outputs depends on the present inputs
• They have no memory element .
• It consists of input variables , logic gates &
output variables .
Introduction
Half adder is a combinational logic circuit which add two 1-bit data (A,B) and
produces the outputs as sum (s) and carry (C) It is the basic building block for
addition of two single bit numbers. This circuit has two outputs carry and sum.
Definition
Block Diagram Truth table
Expression:
Sum, S= A⊕B
Carry, C= AB
Circuit Diagram
Working
• When A= 0, B=0 then S=0 C=0
• When A= 0, B=1 then S=1 C=0
• When A= 1, B=0 then S=1 C=0
• When A= 1, B=1 then S=0 C=1
Full adder is developed to overcome the drawback of Half Adder circuit. It is a
combinational circuit which adds three 1-bit data (A, B, Cin) to produce the
output as sum(s) and carry(Co).
Definition
Block Diagram Truth table
Expression:
Sum, S= (A ⊕ B) ⊕ Cin
Carry, Co= A.B + Cin (A ⊕ B)
Circuit Diagram
Working
• When A= 0, B=0, C=0 then S=0 Co=0
• When A= 0, B=0, C=1 then S=1 Co=0
• When A= 0, B=1, C=0 then S=1 Co=0
• When A= 0, B=1, C=1 then S=0 Co=1
• When A= 1, B=0, C=0 then S=1 Co=0
• When A= 1, B=0, C=1 then S=0 Co=1
• When A= 1, B=1, C=0 then S=0 Co=1
• When A= 1, B=1, C=1 then S=1 Co=1
Sum, S= (A ⊕ B) ⊕ Cin
Carry, Co= A.B + Cin (A ⊕ B)
IT IS A COBINATIONAL CIRCUIT WHICH SUBTRACTS THE INPUT DATA AND PRODUCE THE
OUTPUT AS DIFFERENCE AND BORROW
Half-subtractor is a combinational circuit which is used to subtract two 1-bit
data (A, B) to give the output as Difference (Diff) and a Borrow (Br)
Definition
Block Diagram Truth table
Expression:
Difference Diff= A⊕B
Borrow Br= 𝑨B
Circuit Diagram
Working
• When A= 0, B=0 then Diff=0 Br=0
• When A= 0, B=1 then Diff=1 Br=1
• When A= 1, B=0 then Diff=1 Br=0
• When A= 1, B=1 then Diff=0 Br=0
Full subtractor is a combinational circuit which subtracts three 1-bit data (A, B,
C) to produce the output as Difference (Diff) and Borrow (Br).
Definition
Block Diagram
Truth table
Expression:
Circuit Diagram
Working
• When A= 0, B=0, C=0 then Diff=0 Br=0
• When A= 0, B=0, C=1 then Diff=1 Br=1
• When A= 0, B=1, C=0 then Diff=1 Br=1
• When A= 0, B=1, C=1 then Diff=0 Br=1
• When A= 1, B=0, C=0 then Diff=1 Br=0
• When A= 1, B=0, C=1 then Diff=0 Br=0
• When A= 1, B=1, C=0 then Diff=0 Br=0
• When A= 1, B=1, C=1 then Diff=1 Br=1
Full Subtractor using NAND gate
Magnitude Comparator
A magnitude digital Comparator is a combinational circuit that compares two
digital or binary numbers in order to find out whether one binary number is
equal, less than or greater than the other binary number.
We logically design a circuit for which we will have two inputs one for A and
other for B and have three output terminals, one for A > B condition, one for
A = B condition and one for A < B condition.
1-Bit Magnitude Comparator
• A comparator used to compare two bits is called a single bit comparator. It
consists of two inputs each for two single bit numbers and three outputs
to generate less than, equal to and greater than between two binary
numbers.
• A Comparator is a combinational circuit which compares two inputs (A , B)
and gives the output as either A<B or A=B or A>B
• The truth table for a 1-bit comparator is given below:
From the above truth table logical expressions for each output can be expressed as
follows:
A>B: AB'
A<B: A'B
A=B: A'B' + AB
A 2-bit comparator is a combinational circuit that compares two 2-bit numbers(A &
B) and produce the output as either A<B or A=B or A>B.
The figure shows the block diagram of a two-bit comparator which has four inputs
and three outputs
Definition
Block Diagram
The first number A is designated as A = A1A0 and the second number is designated
as B = B1B0.
This comparator produces three outputs as A>B, Or A = B Or A<B.
Truth table
Expression:
Circuit Diagram
Encoder is a combinational circuit that converts the data from understandable
format to coded format.
Definition
Block Diagram
• A binary encoder has 2n input lines
and n output lines, hence it encodes
the information from 2n inputs into
an n-bit code.
• Any 1 input line will be activated at
time
• Based on the number of inputs
encoders are classified as 4:2, 8:3,
16:4, decimal to BCD encoder.
This type of encoder usually consists of 10 input lines (D0 to D9) and 4 output
lines (Y3 , y2, y1, y0).
Each input line corresponds to the each decimal digit and 4 outputs correspond
to the BCD code.
This encoder accepts the decoded decimal data as an input and encodes it to the
BCD output which is available on the output lines
Definition
Block Diagram
Circuit Diagram
Truth table
Expression:
Y3 = D8 + D9
Y2 = D4 + D5 + D6 + D7
Y1 = D2 + D3 + D6 + D7
Y0 = D1 + D3 + D5 + D7 + D9
The Priority Encoder solves the problem that only one input should be high at a
time by allocating a priority level to each input. The priority encoders output
corresponds to the currently active input which has the highest priority. So when
an input with a higher priority is present, all other inputs with a lower priority
will be ignored.
Definition
Truth table
Here D9 has the highest priority. For example if D7 & D5 are high at a time, then this
encoder will produce the output for D as 0111 because D has more priority than D
Decoder is a combinational logic circuit that converts coded input to
understandable outputs provided both of these are different from one another.
The name decoder means translating of coded information from one format into
another
Definition
Block Diagram
• A binary decoder is a multi-input, multi-
output combinational circuit that converts a
binary code of n input lines into a one out of
2n output code.
• These are used when there is need to
activate exactly one of 2n output based on
an n-bit input value.
• Based on the number of inputs & outputs
decoders are classified as 2:4, 3:8, 4:16,
BCD to decimal decoder.
• No of outputs = (𝟐)𝑵𝒐 𝒐𝒇 𝒊𝒏𝒑𝒖𝒕𝒔
It is a combinational circuit which converts the data from binary format to
decoded format. It has 2 inputs (A, B) and 4 outputs (Y3, Y2, Y1, Y0). Any one of
the output will be high at a time based on the input combination
Definition
Block Diagram
Inputs outputs
A B Y3 Y2 Y1 Y0
0 0 0 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 1 0 0 0
Truth table
Working
When A = 0 and B = 1, the output Y1 will be active and when A = 1 and B = 0, then
the output Y2 will be active. When both the inputs are high, then the output Y3
will be high. If the enable bit is zero then all the outputs will be set to zero. This
relationship between the inputs and outputs are illustrated in the truth table
Expression: Circuit Diagram
In a 3-to-8 decoder, three inputs are decoded into eight outputs. It has three
inputs as A, B, and C and eight output from Y0 through Y7. Based on the
combinations of the three inputs, only one of the eight outputs is selected.
Definition
Block Diagram Truth table
Working
The working of 3:8 decoder is as shown in the truth table. The decoded output
depends on the input combinations A, B and C. Suppose if A = B=1 and C= 0, then
the output Y6 is 1 and all other outputs are zero.
Expression: Circuit Diagram
The BCD-to-decimal decoder is a combinational circuit that converts each BCD
code to its decimal equivalent. The decoded output depends on the input
combinations A, B, C and D.
Definition
Truth table
Working
The working of BCD to decimal decoder is as shown in the truth table. The
decoded output depends on the input combinations A, B, C and D.
Suppose if A =0, B=1, C= 0, D=1 then the output D5 is 1 and all other outputs are
zero. The working of 3:8 decoder is as shown in the truth table.
BCD inputs Decimal Outputs
A B C D D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 1 0 0 0 0 0 0 0 0 1 0
0 0 1 0 0 0 0 0 0 0 0 1 0 0
0 0 1 1 0 0 0 0 0 0 1 0 0 0
0 1 0 0 0 0 0 0 0 1 0 0 0 0
0 1 0 1 0 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 0 1 0 0 0 0 0 0
0 1 1 1 0 0 1 0 0 0 0 0 0 0
1 0 0 0 0 1 0 0 0 0 0 0 0 0
1 0 0 1 1 0 0 0 0 0 0 0 0 0
Block Diagram
Expression: Circuit Diagram
Definition
A BCD to 7 segment decoder is a combinational circuit which is used to convert
a binary or BCD (Binary Coded Decimal) number to the corresponding decimal
number (7-segment display) .
Block Diagram
Circuit Diagram Truth table
Definition
A 4-to-1 multiplexer consists four data input lines as D0 to D3, two select lines
as S0 and S1 and a single output line Y. The select lines S1 and S2 select one of
the four input lines to connect the output line. The particular input combination
on select lines selects one of input (D0 through D3) to the output
Block Diagram Truth Table
From the above truth table, we can write the output expressions as
Circuit:
Definition
A 1-to-4 De multiplexer is a combinational circuit that sends the data (D) from
input to any one of 4 outputs (Y0 Y1 Y2 Y3) depending upon the 2 select lines (S1
S0). The figure shows the block diagram of a 1-to-4 Demultiplexer
Block Diagram
From the above truth table, we can write the output expressions as
Truth Table
Circuit:
I semester Unit 4 combinational circuits.pptx

More Related Content

Similar to I semester Unit 4 combinational circuits.pptx

Combinational and sequential logic
Combinational and sequential logicCombinational and sequential logic
Combinational and sequential logicDeepak John
 
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic CircuitsFYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic CircuitsArti Parab Academics
 
Chapter 5: Cominational Logic with MSI and LSI
Chapter 5: Cominational Logic with MSI and LSIChapter 5: Cominational Logic with MSI and LSI
Chapter 5: Cominational Logic with MSI and LSIEr. Nawaraj Bhandari
 
15CS32 ADE Module 3
15CS32 ADE Module 315CS32 ADE Module 3
15CS32 ADE Module 3RLJIT
 
logical circuits substractors
logical circuits substractors logical circuits substractors
logical circuits substractors Fâhém Ähmêd
 
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptx
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptxDLD Lecture No 18 Analysis and Design of Combinational Circuit.pptx
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptxSaveraAyub2
 
Combinational circuits r011
Combinational circuits   r011Combinational circuits   r011
Combinational circuits r011arunachalamr16
 
Digital Comprator
Digital CompratorDigital Comprator
Digital Compratorsuraj829
 
B sc cs i bo-de u-iii combitional logic circuit
B sc cs i bo-de u-iii combitional logic circuitB sc cs i bo-de u-iii combitional logic circuit
B sc cs i bo-de u-iii combitional logic circuitRai University
 
SESSION 2.ppt
SESSION 2.pptSESSION 2.ppt
SESSION 2.pptSaranya S
 
FYBSC IT Digital Electronics Unit III Chapter I Combinational Logic Circuits
FYBSC IT Digital Electronics Unit III Chapter I Combinational Logic CircuitsFYBSC IT Digital Electronics Unit III Chapter I Combinational Logic Circuits
FYBSC IT Digital Electronics Unit III Chapter I Combinational Logic CircuitsArti Parab Academics
 
Digital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECE
Digital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECEDigital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECE
Digital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECESeshaVidhyaS
 
E4 unit 2 combitional circuits.pptx
E4 unit 2 combitional circuits.pptxE4 unit 2 combitional circuits.pptx
E4 unit 2 combitional circuits.pptxDeekshithSkandaM
 
Unit 3 combinational circuits
Unit 3  combinational circuitsUnit 3  combinational circuits
Unit 3 combinational circuitsAmrutaMehata
 
Comparators_and_Code_Convertersv.pptx.ppt
Comparators_and_Code_Convertersv.pptx.pptComparators_and_Code_Convertersv.pptx.ppt
Comparators_and_Code_Convertersv.pptx.pptHardikGupta400524
 

Similar to I semester Unit 4 combinational circuits.pptx (20)

Combinational and sequential logic
Combinational and sequential logicCombinational and sequential logic
Combinational and sequential logic
 
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic CircuitsFYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
 
DLD Chapter-4.pdf
DLD Chapter-4.pdfDLD Chapter-4.pdf
DLD Chapter-4.pdf
 
Chapter 5: Cominational Logic with MSI and LSI
Chapter 5: Cominational Logic with MSI and LSIChapter 5: Cominational Logic with MSI and LSI
Chapter 5: Cominational Logic with MSI and LSI
 
combinational-circuit (1).ppt
combinational-circuit (1).pptcombinational-circuit (1).ppt
combinational-circuit (1).ppt
 
15CS32 ADE Module 3
15CS32 ADE Module 315CS32 ADE Module 3
15CS32 ADE Module 3
 
Lecturer mid.ppt
Lecturer mid.pptLecturer mid.ppt
Lecturer mid.ppt
 
logical circuits substractors
logical circuits substractors logical circuits substractors
logical circuits substractors
 
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptx
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptxDLD Lecture No 18 Analysis and Design of Combinational Circuit.pptx
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptx
 
Chapter 4: Combinational Logic
Chapter 4: Combinational LogicChapter 4: Combinational Logic
Chapter 4: Combinational Logic
 
Combinational circuits r011
Combinational circuits   r011Combinational circuits   r011
Combinational circuits r011
 
Digital Comprator
Digital CompratorDigital Comprator
Digital Comprator
 
Unit 2 DE Notes.pptx
Unit 2 DE Notes.pptxUnit 2 DE Notes.pptx
Unit 2 DE Notes.pptx
 
B sc cs i bo-de u-iii combitional logic circuit
B sc cs i bo-de u-iii combitional logic circuitB sc cs i bo-de u-iii combitional logic circuit
B sc cs i bo-de u-iii combitional logic circuit
 
SESSION 2.ppt
SESSION 2.pptSESSION 2.ppt
SESSION 2.ppt
 
FYBSC IT Digital Electronics Unit III Chapter I Combinational Logic Circuits
FYBSC IT Digital Electronics Unit III Chapter I Combinational Logic CircuitsFYBSC IT Digital Electronics Unit III Chapter I Combinational Logic Circuits
FYBSC IT Digital Electronics Unit III Chapter I Combinational Logic Circuits
 
Digital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECE
Digital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECEDigital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECE
Digital Electronics (EC8392) UNIT-II -PPT-S.SESHA VIDHYA/ ASP/ECE
 
E4 unit 2 combitional circuits.pptx
E4 unit 2 combitional circuits.pptxE4 unit 2 combitional circuits.pptx
E4 unit 2 combitional circuits.pptx
 
Unit 3 combinational circuits
Unit 3  combinational circuitsUnit 3  combinational circuits
Unit 3 combinational circuits
 
Comparators_and_Code_Convertersv.pptx.ppt
Comparators_and_Code_Convertersv.pptx.pptComparators_and_Code_Convertersv.pptx.ppt
Comparators_and_Code_Convertersv.pptx.ppt
 

More from Mayank Pandey

Biosignal: ECG, EEG and EMG
Biosignal: ECG, EEG and EMGBiosignal: ECG, EEG and EMG
Biosignal: ECG, EEG and EMGMayank Pandey
 
Register and counter
Register and counter Register and counter
Register and counter Mayank Pandey
 
Latest trends in optoelectronics device and communication
Latest trends in optoelectronics device and communicationLatest trends in optoelectronics device and communication
Latest trends in optoelectronics device and communicationMayank Pandey
 
Liquid crystals(lc’s)
Liquid crystals(lc’s)Liquid crystals(lc’s)
Liquid crystals(lc’s)Mayank Pandey
 
Dielectric Material and properties
Dielectric Material and propertiesDielectric Material and properties
Dielectric Material and propertiesMayank Pandey
 

More from Mayank Pandey (7)

Biosignal: ECG, EEG and EMG
Biosignal: ECG, EEG and EMGBiosignal: ECG, EEG and EMG
Biosignal: ECG, EEG and EMG
 
Alternating Current
Alternating CurrentAlternating Current
Alternating Current
 
Voltage Amplifier
Voltage AmplifierVoltage Amplifier
Voltage Amplifier
 
Register and counter
Register and counter Register and counter
Register and counter
 
Latest trends in optoelectronics device and communication
Latest trends in optoelectronics device and communicationLatest trends in optoelectronics device and communication
Latest trends in optoelectronics device and communication
 
Liquid crystals(lc’s)
Liquid crystals(lc’s)Liquid crystals(lc’s)
Liquid crystals(lc’s)
 
Dielectric Material and properties
Dielectric Material and propertiesDielectric Material and properties
Dielectric Material and properties
 

Recently uploaded

Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...
Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...
Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...Krashi Coaching
 
Introduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher EducationIntroduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher Educationpboyjonauth
 
Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111Sapana Sha
 
Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)eniolaolutunde
 
A Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformA Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformChameera Dedduwage
 
Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991
Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991
Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991RKavithamani
 
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptxPOINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptxSayali Powar
 
Organic Name Reactions for the students and aspirants of Chemistry12th.pptx
Organic Name Reactions  for the students and aspirants of Chemistry12th.pptxOrganic Name Reactions  for the students and aspirants of Chemistry12th.pptx
Organic Name Reactions for the students and aspirants of Chemistry12th.pptxVS Mahajan Coaching Centre
 
Accessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactAccessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactdawncurless
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxiammrhaywood
 
Employee wellbeing at the workplace.pptx
Employee wellbeing at the workplace.pptxEmployee wellbeing at the workplace.pptx
Employee wellbeing at the workplace.pptxNirmalaLoungPoorunde1
 
_Math 4-Q4 Week 5.pptx Steps in Collecting Data
_Math 4-Q4 Week 5.pptx Steps in Collecting Data_Math 4-Q4 Week 5.pptx Steps in Collecting Data
_Math 4-Q4 Week 5.pptx Steps in Collecting DataJhengPantaleon
 
URLs and Routing in the Odoo 17 Website App
URLs and Routing in the Odoo 17 Website AppURLs and Routing in the Odoo 17 Website App
URLs and Routing in the Odoo 17 Website AppCeline George
 
Incoming and Outgoing Shipments in 1 STEP Using Odoo 17
Incoming and Outgoing Shipments in 1 STEP Using Odoo 17Incoming and Outgoing Shipments in 1 STEP Using Odoo 17
Incoming and Outgoing Shipments in 1 STEP Using Odoo 17Celine George
 
MENTAL STATUS EXAMINATION format.docx
MENTAL     STATUS EXAMINATION format.docxMENTAL     STATUS EXAMINATION format.docx
MENTAL STATUS EXAMINATION format.docxPoojaSen20
 
CARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptxCARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptxGaneshChakor2
 
Sanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdfSanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdfsanyamsingh5019
 
Mastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory InspectionMastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory InspectionSafetyChain Software
 
PSYCHIATRIC History collection FORMAT.pptx
PSYCHIATRIC   History collection FORMAT.pptxPSYCHIATRIC   History collection FORMAT.pptx
PSYCHIATRIC History collection FORMAT.pptxPoojaSen20
 
Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3JemimahLaneBuaron
 

Recently uploaded (20)

Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...
Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...
Kisan Call Centre - To harness potential of ICT in Agriculture by answer farm...
 
Introduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher EducationIntroduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher Education
 
Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111
 
Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)
 
A Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformA Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy Reform
 
Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991
Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991
Industrial Policy - 1948, 1956, 1973, 1977, 1980, 1991
 
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptxPOINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
POINT- BIOCHEMISTRY SEM 2 ENZYMES UNIT 5.pptx
 
Organic Name Reactions for the students and aspirants of Chemistry12th.pptx
Organic Name Reactions  for the students and aspirants of Chemistry12th.pptxOrganic Name Reactions  for the students and aspirants of Chemistry12th.pptx
Organic Name Reactions for the students and aspirants of Chemistry12th.pptx
 
Accessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactAccessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impact
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
 
Employee wellbeing at the workplace.pptx
Employee wellbeing at the workplace.pptxEmployee wellbeing at the workplace.pptx
Employee wellbeing at the workplace.pptx
 
_Math 4-Q4 Week 5.pptx Steps in Collecting Data
_Math 4-Q4 Week 5.pptx Steps in Collecting Data_Math 4-Q4 Week 5.pptx Steps in Collecting Data
_Math 4-Q4 Week 5.pptx Steps in Collecting Data
 
URLs and Routing in the Odoo 17 Website App
URLs and Routing in the Odoo 17 Website AppURLs and Routing in the Odoo 17 Website App
URLs and Routing in the Odoo 17 Website App
 
Incoming and Outgoing Shipments in 1 STEP Using Odoo 17
Incoming and Outgoing Shipments in 1 STEP Using Odoo 17Incoming and Outgoing Shipments in 1 STEP Using Odoo 17
Incoming and Outgoing Shipments in 1 STEP Using Odoo 17
 
MENTAL STATUS EXAMINATION format.docx
MENTAL     STATUS EXAMINATION format.docxMENTAL     STATUS EXAMINATION format.docx
MENTAL STATUS EXAMINATION format.docx
 
CARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptxCARE OF CHILD IN INCUBATOR..........pptx
CARE OF CHILD IN INCUBATOR..........pptx
 
Sanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdfSanyam Choudhary Chemistry practical.pdf
Sanyam Choudhary Chemistry practical.pdf
 
Mastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory InspectionMastering the Unannounced Regulatory Inspection
Mastering the Unannounced Regulatory Inspection
 
PSYCHIATRIC History collection FORMAT.pptx
PSYCHIATRIC   History collection FORMAT.pptxPSYCHIATRIC   History collection FORMAT.pptx
PSYCHIATRIC History collection FORMAT.pptx
 
Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3
 

I semester Unit 4 combinational circuits.pptx

  • 1.
  • 2.
  • 3.
  • 4. 4 • Combinational circuits consists of logic gates whose outputs depends on the present inputs • They have no memory element . • It consists of input variables , logic gates & output variables . Introduction
  • 5.
  • 6. Half adder is a combinational logic circuit which add two 1-bit data (A,B) and produces the outputs as sum (s) and carry (C) It is the basic building block for addition of two single bit numbers. This circuit has two outputs carry and sum. Definition Block Diagram Truth table Expression: Sum, S= A⊕B Carry, C= AB
  • 7. Circuit Diagram Working • When A= 0, B=0 then S=0 C=0 • When A= 0, B=1 then S=1 C=0 • When A= 1, B=0 then S=1 C=0 • When A= 1, B=1 then S=0 C=1
  • 8. Full adder is developed to overcome the drawback of Half Adder circuit. It is a combinational circuit which adds three 1-bit data (A, B, Cin) to produce the output as sum(s) and carry(Co). Definition Block Diagram Truth table Expression: Sum, S= (A ⊕ B) ⊕ Cin Carry, Co= A.B + Cin (A ⊕ B)
  • 9. Circuit Diagram Working • When A= 0, B=0, C=0 then S=0 Co=0 • When A= 0, B=0, C=1 then S=1 Co=0 • When A= 0, B=1, C=0 then S=1 Co=0 • When A= 0, B=1, C=1 then S=0 Co=1 • When A= 1, B=0, C=0 then S=1 Co=0 • When A= 1, B=0, C=1 then S=0 Co=1 • When A= 1, B=1, C=0 then S=0 Co=1 • When A= 1, B=1, C=1 then S=1 Co=1 Sum, S= (A ⊕ B) ⊕ Cin Carry, Co= A.B + Cin (A ⊕ B)
  • 10. IT IS A COBINATIONAL CIRCUIT WHICH SUBTRACTS THE INPUT DATA AND PRODUCE THE OUTPUT AS DIFFERENCE AND BORROW
  • 11. Half-subtractor is a combinational circuit which is used to subtract two 1-bit data (A, B) to give the output as Difference (Diff) and a Borrow (Br) Definition Block Diagram Truth table Expression: Difference Diff= A⊕B Borrow Br= 𝑨B
  • 12. Circuit Diagram Working • When A= 0, B=0 then Diff=0 Br=0 • When A= 0, B=1 then Diff=1 Br=1 • When A= 1, B=0 then Diff=1 Br=0 • When A= 1, B=1 then Diff=0 Br=0
  • 13. Full subtractor is a combinational circuit which subtracts three 1-bit data (A, B, C) to produce the output as Difference (Diff) and Borrow (Br). Definition Block Diagram Truth table Expression:
  • 14. Circuit Diagram Working • When A= 0, B=0, C=0 then Diff=0 Br=0 • When A= 0, B=0, C=1 then Diff=1 Br=1 • When A= 0, B=1, C=0 then Diff=1 Br=1 • When A= 0, B=1, C=1 then Diff=0 Br=1 • When A= 1, B=0, C=0 then Diff=1 Br=0 • When A= 1, B=0, C=1 then Diff=0 Br=0 • When A= 1, B=1, C=0 then Diff=0 Br=0 • When A= 1, B=1, C=1 then Diff=1 Br=1
  • 16.
  • 17. Magnitude Comparator A magnitude digital Comparator is a combinational circuit that compares two digital or binary numbers in order to find out whether one binary number is equal, less than or greater than the other binary number. We logically design a circuit for which we will have two inputs one for A and other for B and have three output terminals, one for A > B condition, one for A = B condition and one for A < B condition.
  • 18. 1-Bit Magnitude Comparator • A comparator used to compare two bits is called a single bit comparator. It consists of two inputs each for two single bit numbers and three outputs to generate less than, equal to and greater than between two binary numbers. • A Comparator is a combinational circuit which compares two inputs (A , B) and gives the output as either A<B or A=B or A>B • The truth table for a 1-bit comparator is given below: From the above truth table logical expressions for each output can be expressed as follows: A>B: AB' A<B: A'B A=B: A'B' + AB
  • 19. A 2-bit comparator is a combinational circuit that compares two 2-bit numbers(A & B) and produce the output as either A<B or A=B or A>B. The figure shows the block diagram of a two-bit comparator which has four inputs and three outputs Definition Block Diagram The first number A is designated as A = A1A0 and the second number is designated as B = B1B0. This comparator produces three outputs as A>B, Or A = B Or A<B.
  • 20.
  • 23. Encoder is a combinational circuit that converts the data from understandable format to coded format. Definition Block Diagram • A binary encoder has 2n input lines and n output lines, hence it encodes the information from 2n inputs into an n-bit code. • Any 1 input line will be activated at time • Based on the number of inputs encoders are classified as 4:2, 8:3, 16:4, decimal to BCD encoder.
  • 24. This type of encoder usually consists of 10 input lines (D0 to D9) and 4 output lines (Y3 , y2, y1, y0). Each input line corresponds to the each decimal digit and 4 outputs correspond to the BCD code. This encoder accepts the decoded decimal data as an input and encodes it to the BCD output which is available on the output lines Definition Block Diagram
  • 25. Circuit Diagram Truth table Expression: Y3 = D8 + D9 Y2 = D4 + D5 + D6 + D7 Y1 = D2 + D3 + D6 + D7 Y0 = D1 + D3 + D5 + D7 + D9
  • 26. The Priority Encoder solves the problem that only one input should be high at a time by allocating a priority level to each input. The priority encoders output corresponds to the currently active input which has the highest priority. So when an input with a higher priority is present, all other inputs with a lower priority will be ignored. Definition Truth table Here D9 has the highest priority. For example if D7 & D5 are high at a time, then this encoder will produce the output for D as 0111 because D has more priority than D
  • 27. Decoder is a combinational logic circuit that converts coded input to understandable outputs provided both of these are different from one another. The name decoder means translating of coded information from one format into another Definition Block Diagram • A binary decoder is a multi-input, multi- output combinational circuit that converts a binary code of n input lines into a one out of 2n output code. • These are used when there is need to activate exactly one of 2n output based on an n-bit input value. • Based on the number of inputs & outputs decoders are classified as 2:4, 3:8, 4:16, BCD to decimal decoder. • No of outputs = (𝟐)𝑵𝒐 𝒐𝒇 𝒊𝒏𝒑𝒖𝒕𝒔
  • 28. It is a combinational circuit which converts the data from binary format to decoded format. It has 2 inputs (A, B) and 4 outputs (Y3, Y2, Y1, Y0). Any one of the output will be high at a time based on the input combination Definition Block Diagram Inputs outputs A B Y3 Y2 Y1 Y0 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1 0 0 0 Truth table Working When A = 0 and B = 1, the output Y1 will be active and when A = 1 and B = 0, then the output Y2 will be active. When both the inputs are high, then the output Y3 will be high. If the enable bit is zero then all the outputs will be set to zero. This relationship between the inputs and outputs are illustrated in the truth table
  • 30. In a 3-to-8 decoder, three inputs are decoded into eight outputs. It has three inputs as A, B, and C and eight output from Y0 through Y7. Based on the combinations of the three inputs, only one of the eight outputs is selected. Definition Block Diagram Truth table Working The working of 3:8 decoder is as shown in the truth table. The decoded output depends on the input combinations A, B and C. Suppose if A = B=1 and C= 0, then the output Y6 is 1 and all other outputs are zero.
  • 32. The BCD-to-decimal decoder is a combinational circuit that converts each BCD code to its decimal equivalent. The decoded output depends on the input combinations A, B, C and D. Definition Truth table Working The working of BCD to decimal decoder is as shown in the truth table. The decoded output depends on the input combinations A, B, C and D. Suppose if A =0, B=1, C= 0, D=1 then the output D5 is 1 and all other outputs are zero. The working of 3:8 decoder is as shown in the truth table. BCD inputs Decimal Outputs A B C D D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 1 1 1 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 Block Diagram
  • 34. Definition A BCD to 7 segment decoder is a combinational circuit which is used to convert a binary or BCD (Binary Coded Decimal) number to the corresponding decimal number (7-segment display) . Block Diagram
  • 36. Definition A 4-to-1 multiplexer consists four data input lines as D0 to D3, two select lines as S0 and S1 and a single output line Y. The select lines S1 and S2 select one of the four input lines to connect the output line. The particular input combination on select lines selects one of input (D0 through D3) to the output Block Diagram Truth Table From the above truth table, we can write the output expressions as
  • 38. Definition A 1-to-4 De multiplexer is a combinational circuit that sends the data (D) from input to any one of 4 outputs (Y0 Y1 Y2 Y3) depending upon the 2 select lines (S1 S0). The figure shows the block diagram of a 1-to-4 Demultiplexer Block Diagram
  • 39. From the above truth table, we can write the output expressions as Truth Table