The document summarizes AMD's next-generation 7nm Ryzen 4000 APU "Renoir". Key points include:
- It features "Zen 2" CPU cores with up to 8 cores and 16 threads, and an integrated 7nm "Vega" GPU with up to 8 compute units.
- Performance is improved with up to 25% higher single-thread and 200% higher multi-thread CPU performance compared to previous generations. The GPU provides up to 27% higher performance.
- Power efficiency is increased with up to 20% lower power consumption while delivering higher performance.
- It offers improved memory bandwidth with support for DDR4-3200 and LPDDR4x-42
In a series of announcements that left more than 1,200 gamers gathered in Cologne alternately breathless, giddy with laughter, and shouting their enthusiasm, Jensen Huang introduced the GeForce RTX series of gaming processors, representing the biggest leap in performance in NVIDIA’s history.
Shared Memory Centric Computing with CXL & OMIAllan Cantle
Discusses how CXL can be better utilized as a separate Fabric Cache domain to a processors own Local Cache Domain. This is done by leveraging a Shared Memory Centric architectures that utilize both the Open Memory Interface OMI, and Compute eXpress Link, CXL, for the memory ports.
Facebook presented, "Chiplets in Data Centers," at the ODSA Workshop. The charter of the ODSA (Open Domain Specification Architecture) Workgroup is to define an open specification that enables building of Domain Specific Accelerator silicon using best-of-breed components from the industry made available as chiplet dies that can be integrated together as Lego blocks on an organic substrate packaging layer. The resulting multi-chip module (MCM) silicon can be produced at significantly lower development and manufacturing costs, and will deliver much needed performance per watt and performance per dollar efficiencies in networking, security, machine learning and other applications. The ODSA Workgroup also intends to deliver implementations of the specification as board-level prototypes, RTL code and libraries.
If AMD Adopted OMI in their EPYC ArchitectureAllan Cantle
AMD's EPYC Architecture has paved the way forward towards Heterogeneous Data Centric Computing, but it is still limited by it's parallel DDR interfaces. This presentation shows the potential for the EPYC architecture if it adopted the Open Memory Interface, OMI, for it's Near Memory interface.
During the CXL Forum at OCP Global Summit 23, Rick Kutcipal and Sreeni Bagalkote of Broadcom presented their PCIe/CXL Roadmap and announced their Atlas 4 CXL switch.
Double Data Rate Synchronous Dynamic Random-Access Memory, officially abbreviated as DDR SDRAM, is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) class of memory integrated circuits used in computers. DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by DDR2 SDRAM, DDR3 SDRAM, and DDR4 SDRAM, and soon will be superseded by DDR5 SDRAM. None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work in DDR1-equipped motherboards, and vice versa.
Compared to single data rate (SDR) SDRAM, the DDR SDRAM interface makes higher transfer rates possible by more strict control of the timing of the electrical data and clock signals. Implementations often have to use schemes such as phase-locked loops and self-calibration to reach the required timing accuracy.[4][5] The interface uses double pumping (transferring data on both the rising and falling edges of the clock signal) to double data bus bandwidth without a corresponding increase in clock frequency. One advantage of keeping the clock frequency down is that it reduces the signal integrity requirements on the circuit board connecting the memory to the controller. The name "double data rate" refers to the fact that a DDR SDRAM with a certain clock frequency achieves nearly twice the bandwidth of a SDR SDRAM running at the same clock frequency, due to this double pumping.
In a series of announcements that left more than 1,200 gamers gathered in Cologne alternately breathless, giddy with laughter, and shouting their enthusiasm, Jensen Huang introduced the GeForce RTX series of gaming processors, representing the biggest leap in performance in NVIDIA’s history.
Shared Memory Centric Computing with CXL & OMIAllan Cantle
Discusses how CXL can be better utilized as a separate Fabric Cache domain to a processors own Local Cache Domain. This is done by leveraging a Shared Memory Centric architectures that utilize both the Open Memory Interface OMI, and Compute eXpress Link, CXL, for the memory ports.
Facebook presented, "Chiplets in Data Centers," at the ODSA Workshop. The charter of the ODSA (Open Domain Specification Architecture) Workgroup is to define an open specification that enables building of Domain Specific Accelerator silicon using best-of-breed components from the industry made available as chiplet dies that can be integrated together as Lego blocks on an organic substrate packaging layer. The resulting multi-chip module (MCM) silicon can be produced at significantly lower development and manufacturing costs, and will deliver much needed performance per watt and performance per dollar efficiencies in networking, security, machine learning and other applications. The ODSA Workgroup also intends to deliver implementations of the specification as board-level prototypes, RTL code and libraries.
If AMD Adopted OMI in their EPYC ArchitectureAllan Cantle
AMD's EPYC Architecture has paved the way forward towards Heterogeneous Data Centric Computing, but it is still limited by it's parallel DDR interfaces. This presentation shows the potential for the EPYC architecture if it adopted the Open Memory Interface, OMI, for it's Near Memory interface.
During the CXL Forum at OCP Global Summit 23, Rick Kutcipal and Sreeni Bagalkote of Broadcom presented their PCIe/CXL Roadmap and announced their Atlas 4 CXL switch.
Double Data Rate Synchronous Dynamic Random-Access Memory, officially abbreviated as DDR SDRAM, is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) class of memory integrated circuits used in computers. DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by DDR2 SDRAM, DDR3 SDRAM, and DDR4 SDRAM, and soon will be superseded by DDR5 SDRAM. None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work in DDR1-equipped motherboards, and vice versa.
Compared to single data rate (SDR) SDRAM, the DDR SDRAM interface makes higher transfer rates possible by more strict control of the timing of the electrical data and clock signals. Implementations often have to use schemes such as phase-locked loops and self-calibration to reach the required timing accuracy.[4][5] The interface uses double pumping (transferring data on both the rising and falling edges of the clock signal) to double data bus bandwidth without a corresponding increase in clock frequency. One advantage of keeping the clock frequency down is that it reduces the signal integrity requirements on the circuit board connecting the memory to the controller. The name "double data rate" refers to the fact that a DDR SDRAM with a certain clock frequency achieves nearly twice the bandwidth of a SDR SDRAM running at the same clock frequency, due to this double pumping.
IEI is een van de grootste leveranciers van producten voor industriële computersystemen. IEI levert honderden verschillende boards, systemen en onderdelen voor uiteenlopende applicaties in de industriële automatisering, defensie, medisch, infotainment en mobiel gebruik. Vooruitstrevende oplossingen bezorgen u als klant een kortere ontwerpcyclus zodat u de voorsprong op de concurrent kunt behouden en zelfs vergroten.
Webinar: NVIDIA JETSON – A Inteligência Artificial na palma de sua mãoEmbarcados
Objetivo do Webinar: Venha saber como a plataforma NVIDIA Jetson e suas ferramentas habilitam você a desenvolver e implantar robôs, drones, aplicativos de IVA e outras máquinas autônomas com tecnologia AI que pensam por conta própria.
Apoio: Arrow e NVIDIA.
Convidado: Marcel Saraiva
Gerente de Contas Enterprise da NVIDIA, executivo com 20 anos de expereincia no mercado de TI, teve na sua carreia passagens pela SGI (Silicon Graphics), Intel e Scansource. Engenheiro eletrico formado pela FEI, com pós-graduação em Marketing pela FAAP e MBA em Gestão Empresarial pela FGV.
Link para o Webinar: https://www.embarcados.com.br/webinars/nvidia-jetson-a-inteligencia-artificial-na-palma-de-sua-mao/
Jetson AGX Xavier and the New Era of Autonomous MachinesDustin Franklin
Deep-dive on NVIDIA Jetson AGX Xavier, designed to help you deploy advanced AI onboard robots, drones, and other autonomous machines. View the webinar here: https://bit.ly/2BWVWv1
NVIDIA GPUs Power HPC & AI Workloads in Cloud with Univainside-BigData.com
In this deck from the Univa Breakfast Briefing at ISC 2018, Duncan Poole from NVIDIA describes how the company is accelerating HPC in the Cloud.
Learn more: https://www.nvidia.com/en-us/data-center/dgx-systems/
and
http://univa.com
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Today’s groundbreaking scientific discoveries are taking place in HPC data centers. Using containers, researchers and scientists gain the flexibility to run HPC application containers on NVIDIA Volta-powered systems including Quadro-powered workstations, NVIDIA DGX Systems, and HPC clusters.
Race to Reality: The Next Billion-People Market OpportunityAMD
On September 3rd, 2016 at IFA Berlin, Mark Papermaster, Chief Technology Officer AMD provided unique insights into the new era of Virtual Reality: "Race to Reality - The Next Billion-People Market Opportunity”.
GPU compute has leveraged discrete GPUs for a fairly limited set of academic and supercomputing system workloads until recently. With the increase in performance of integrated GPU inside an Accelerated Processing Unit (APU), introduction of Heterogeneous System Architecture (HSA) devices, and proliferation of programming tools, we are seeing GPU compute make its way into mainstream applications. In this presentation we cover GPU compute and HSA, focusing on the application of GPU compute in the Medical and Print Imaging segments. Examples of performance data are reviewed and the case is made for how GPU compute can deliver tangible benefits.
GraphRAG is All You need? LLM & Knowledge GraphGuy Korland
Guy Korland, CEO and Co-founder of FalkorDB, will review two articles on the integration of language models with knowledge graphs.
1. Unifying Large Language Models and Knowledge Graphs: A Roadmap.
https://arxiv.org/abs/2306.08302
2. Microsoft Research's GraphRAG paper and a review paper on various uses of knowledge graphs:
https://www.microsoft.com/en-us/research/blog/graphrag-unlocking-llm-discovery-on-narrative-private-data/
LF Energy Webinar: Electrical Grid Modelling and Simulation Through PowSyBl -...DanBrown980551
Do you want to learn how to model and simulate an electrical network from scratch in under an hour?
Then welcome to this PowSyBl workshop, hosted by Rte, the French Transmission System Operator (TSO)!
During the webinar, you will discover the PowSyBl ecosystem as well as handle and study an electrical network through an interactive Python notebook.
PowSyBl is an open source project hosted by LF Energy, which offers a comprehensive set of features for electrical grid modelling and simulation. Among other advanced features, PowSyBl provides:
- A fully editable and extendable library for grid component modelling;
- Visualization tools to display your network;
- Grid simulation tools, such as power flows, security analyses (with or without remedial actions) and sensitivity analyses;
The framework is mostly written in Java, with a Python binding so that Python developers can access PowSyBl functionalities as well.
What you will learn during the webinar:
- For beginners: discover PowSyBl's functionalities through a quick general presentation and the notebook, without needing any expert coding skills;
- For advanced developers: master the skills to efficiently apply PowSyBl functionalities to your real-world scenarios.
State of ICS and IoT Cyber Threat Landscape Report 2024 previewPrayukth K V
The IoT and OT threat landscape report has been prepared by the Threat Research Team at Sectrio using data from Sectrio, cyber threat intelligence farming facilities spread across over 85 cities around the world. In addition, Sectrio also runs AI-based advanced threat and payload engagement facilities that serve as sinks to attract and engage sophisticated threat actors, and newer malware including new variants and latent threats that are at an earlier stage of development.
The latest edition of the OT/ICS and IoT security Threat Landscape Report 2024 also covers:
State of global ICS asset and network exposure
Sectoral targets and attacks as well as the cost of ransom
Global APT activity, AI usage, actor and tactic profiles, and implications
Rise in volumes of AI-powered cyberattacks
Major cyber events in 2024
Malware and malicious payload trends
Cyberattack types and targets
Vulnerability exploit attempts on CVEs
Attacks on counties – USA
Expansion of bot farms – how, where, and why
In-depth analysis of the cyber threat landscape across North America, South America, Europe, APAC, and the Middle East
Why are attacks on smart factories rising?
Cyber risk predictions
Axis of attacks – Europe
Systemic attacks in the Middle East
Download the full report from here:
https://sectrio.com/resources/ot-threat-landscape-reports/sectrio-releases-ot-ics-and-iot-security-threat-landscape-report-2024/
DevOps and Testing slides at DASA ConnectKari Kakkonen
My and Rik Marselis slides at 30.5.2024 DASA Connect conference. We discuss about what is testing, then what is agile testing and finally what is Testing in DevOps. Finally we had lovely workshop with the participants trying to find out different ways to think about quality and testing in different parts of the DevOps infinity loop.
Software Delivery At the Speed of AI: Inflectra Invests In AI-Powered QualityInflectra
In this insightful webinar, Inflectra explores how artificial intelligence (AI) is transforming software development and testing. Discover how AI-powered tools are revolutionizing every stage of the software development lifecycle (SDLC), from design and prototyping to testing, deployment, and monitoring.
Learn about:
• The Future of Testing: How AI is shifting testing towards verification, analysis, and higher-level skills, while reducing repetitive tasks.
• Test Automation: How AI-powered test case generation, optimization, and self-healing tests are making testing more efficient and effective.
• Visual Testing: Explore the emerging capabilities of AI in visual testing and how it's set to revolutionize UI verification.
• Inflectra's AI Solutions: See demonstrations of Inflectra's cutting-edge AI tools like the ChatGPT plugin and Azure Open AI platform, designed to streamline your testing process.
Whether you're a developer, tester, or QA professional, this webinar will give you valuable insights into how AI is shaping the future of software delivery.
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Ramesh Iyer
In today's fast-changing business world, Companies that adapt and embrace new ideas often need help to keep up with the competition. However, fostering a culture of innovation takes much work. It takes vision, leadership and willingness to take risks in the right proportion. Sachin Dev Duggal, co-founder of Builder.ai, has perfected the art of this balance, creating a company culture where creativity and growth are nurtured at each stage.
Kubernetes & AI - Beauty and the Beast !?! @KCD Istanbul 2024Tobias Schneck
As AI technology is pushing into IT I was wondering myself, as an “infrastructure container kubernetes guy”, how get this fancy AI technology get managed from an infrastructure operational view? Is it possible to apply our lovely cloud native principals as well? What benefit’s both technologies could bring to each other?
Let me take this questions and provide you a short journey through existing deployment models and use cases for AI software. On practical examples, we discuss what cloud/on-premise strategy we may need for applying it to our own infrastructure to get it to work from an enterprise perspective. I want to give an overview about infrastructure requirements and technologies, what could be beneficial or limiting your AI use cases in an enterprise environment. An interactive Demo will give you some insides, what approaches I got already working for real.
De-mystifying Zero to One: Design Informed Techniques for Greenfield Innovati...
Hot Chips: AMD Next Gen 7nm Ryzen 4000 APU
1. 1 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
2. 2 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
“Zen2”- with 15% higher IPC
2x Performance/Watt
2x Transistor Density
59% higher perf per CU
SEE ENDNOTES EPYC-09, RM3-250, RM3-01, RM3-123, RM3-130
3. 3 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
CPU Single Thread CPU Multi Thread GPU Performance Power
MORE SINGLE THREAD
FORMANCE
Delivered 8 high
performance Cores in
mobile form-factor
Scaled Graphics
performance density by
3.25x. Per CU
performance by 59%
Improved memory
bandwidth efficiency
Upgraded audio-
visual experience
Increased package
performance density
MORE MULTITHREAD
PERFORMANCE
Up to
25%
REDUCED SOC POWER
SEE ENDNOTES RM3-06, RM3-123, RM3-250, RM3-129
Up to
200%
Up to
20%
MORE GFX
PERFORMANCE
Up to
27%
AMD Ryzen™ 7 4800U AMD Ryzen™ 7 3700U
4. 4 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
“ZEN 2” CPU
(8 CORE | 16 THREAD)
CPU 2
CPU 0
USBC
----------
USB 3.1
-----------
USB 2.0
Display
Controller
2nd Gen
AMD 7nm Vega
(8 COMPUTE UNITS)
Infinity Fabric
Platform
Security
Processor
4MB
L3 Cache
Multimedia
Engines
PCIe
GPP
Video
Codec
2nd Gen
Audio
ACP
3rd Gen
NVMe
----------
SATA
X64DDR4/LPDDR4x
System
Management
Unit
CPU 1
CPU 3
PCIe
Discrete
GFX
CU CU CU CU
CU CU CU CU
X64DDR4/LPDDR4x
1MB L2
Cache
Sensor
Fusion
Hub
AMD 7nm
“VEGA” GPU
AMD “ZEN 2” x86 CPU CORES
HIGH
BANDWIDTH
SOC FABRIC
(DDR4 3200
MT/s and
LPDDR4x 4266
MT/s)
FULL
SYSTEM
CONNECTIVITY
UPGRADED
DISPLAY ENGINE
INTEGRATED
SENSOR
FUSION HUB
ACCELERATED
MULTIMEDIA
EXPERIENCE
CPU 6
CPU 4
4MB
L3 Cache
CPU 5
CPU 7
NVMe
----------
SATA
Fusion
Controller
Hub
5. 5 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
Technology TSMC 7nm – 13-layer
metal
Transistor count 9.8B
Die Size 156mm2
vs previous “Picasso” APU
SEE ENDNOTES RN-1
transistorsnearly 2x smaller die25%
BGA: 25 x 35 x 1.38mm
6. 6 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
SEE ENDNOTES EPYC-09
CCX1: 4C8T, 4M L3
CCX2: 4C8T, 4M L3
7. 7 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
SEE ENDNOTES RM3-06, RM3-123
• +30% IPC and design
– Improved branch prediction accuracy
– Higher op cache hit rate
– New integer scheduler algorithms
– Clock and data gating improvements
– Low-power design methodology
• +70% 7nm Density and Power Efficiency
CPU Single Thread CPU Multi Thread
MORE SINGLE
THREAD FORMANCE
MORE MULTITHREAD
PERFORMANCE
Up to
25%
Up to
200%
• +15% IPC
• +10% Fmax
“Renoir” “Picasso”
9. 9 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
126 129
226 229
90 92
69 73
90
62
121
68
104
121
DOTA2 League of
Legend
Rocket
League
CS:GO Far Cry 5 ME: SoW Civ VI Deus Ex:MD
(DX12)
Hitman Total War:
WH2-Battle
F1 2019 AoS (GPU,
Vulkan)
Rise of the
Tomb Raider
Strange
Brigade
(Vulkan)
60FPS
SEE ENDNOTES RM3H-21. RESULTS MAY VARY.
FPS 1080P HIGH SETTINGSRyzen 9 4900HS + RTX 2060 MaxQ – 35W
Up To Up To
10. 10 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
SEE ENDNOTES RM3-250.
• 2x wide Data Fabric interface
for power efficient data
transfer
• Graphics low power state
transition optimization
• 25% higher peak graphics
clock
• 77% higher peak memory
bandwidth
• Up to 59% higher Time Spy
performance per Compute
Unit
• 1.79 TFLOPS (FP32) peak
throughput
• Same 15W power envelope
as previous generation
Efficiency Arbiter
Infinity Fabric
Efficiency Arbiter
L2 (1MB)
CUL1
CUL1
CUL1
CUL1
CUL1
CUL1
CUL1
Command Processor
RenderBackendPlus(RB+)
RenderBackendPlus(RB+)
Geometry
Engine
Shader Engine
2x Data Interface
xBAR
CUL1
11. 11 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
-61% area
14nm ”Vega” 11CU Performance Density
“Picasso” “Renoir”
7nm ”Vega”
8CU
GPU Performance
Up to
27%
MORE GFX
PERFORMANCE
Up to
225%
MORE
PERFORMANCE
DENSITY
SEE ENDNOTES RM3-250, RN-2
12. 12 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
• Two Memory Controllers
• Each controller can support 1x64 for
DDR4 or 2x32 using virtual channels for
LPDDR4x
• 4x32 LPDDR4x-4266 (68.3 GB/s peak)
OR
• 2x64 DDR4-3200 (51.2 GB/s peak)
LPDDR4x
x32
LPDDR4x
x32
UMC0
32
32
LPDDR4x
LPDDR4x
x32
LPDDR4x
x32
UMC1
32
32
LPDDR4x
DDR4
x64
UMC0
64
DDR4
DDR4
x64
UMC1
64
DDR4
13. 13 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
• 7nm Technology
• Optimized Fabric Performance States
• Dynamic Power optimization in the fabric
switches
• Double bus width from graphics engine to
fabric to improve pj/bit
• DDR4-3200 and LPDDR4x-4266
Infinity Fabric
I/O and
System
Hub
Display
Engine
Memory
Controllers
“VEGA” 7nm
GRAPHICS
Graphic
s
Pipeline
L2 Cache
Render
Engines
Comput
e
Engine
“ZEN2” CORE
COMPLEX
“Zen2”
Core
“Zen2”
Core
“Zen2”
Core
“Zen2”
Core
L3
Cache
“ZEN2” CORE
COMPLEX
“Zen2”
Core
“Zen2”
Core
“Zen2”
Core
“Zen2”
Core
L3
Cache
Multimedia
Engines
SEE ENDNOTES RM3-255, RN-3
14. 14 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
541
1623
SEE ENDNOTES RM3-218, RZG2-69.
Time Spy
957
1227
Core™ i7-
1065G7
Ryzen™ 7
4800U
Core™ i7-10700 Ryzen™ 7
4700G
15. 15 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
• Single Power State Exposed in ACPI
• All hardware power state control done with OS input
• Three States Exposed in ACPI
• Minimum duration per state included for OS to optimally
select the Cstate depth
• Reduced hysteresis between states by using OS guidance
CC1
CC6
CPUoff
VDDoff
OS Cstate Entry
CC1
OS Cstate1
Entry
CC1
CC6
CC1
CC6
CPUoff
VDDoff
OS Cstate2
Entry
OS Cstate3
Entry
From “Picasso” to “Renoir”
we moved to latest ACPI
Power state definition (6.3)
Increasing Duration
IncreasingDepth
IncreasingDepth
16. 16 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
SEE ENDNOTES RM3-129, RM3-249, RM3-251.
• Double the save and restore bus width to
reduce entry and exit latency
• Removed CPU-Off hysteresis by Intelligent
Core Power State selection
• Power management firmware optimizations
• 7nm Technology enables reduced minimum
voltage
• Aggressive L3 clock and power-gating
• IO Power Reduction
– Reduced IO digital power supply
– Reduced analog power supply for
embedded display and PCIE PHYs
– Power optimized SoC Clocking circuits
Core0Core-1Core0
DRAM
System Management
Controller
17. 17 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
SEE ENDNOTES RM3-254.
0.0
1.0
2.0
3.0
4.0
CoreFrequency(GHz)
0.0
1.0
2.0
3.0
4.0
CoreFrequency(GHz)
PICASSO CPU
FREQUENCY
RENOIR CPU FREQUENCY
Picasso Renoir
Memory Self Refresh residency 3.6 % 18.5 %
CPUOFF residency 4.5% 31.2 %
GFXOFF residency 61.7 % 71.7%
VDDOFF residency 1.7% 28.2%
During Application Execution
(PCMark® 10 APP START BENCHMARK)
18. 18 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
System BIOS
STT Limits
DPTC Config
Sensor 2
Embedded Controller (EC)
OEM Skin Temp Limit
External Diodes °C
Sensor 1
AMD Infinity Fabric
Calculate Skin Temp
Manage SoC Power
Dynamic Power & Thermal Control
Advanced Platform Management Link
• Evaluates external thermal sensors in the
CPU/GPU boost decision
• Diodes placed in chassis hotspots
• Thermal readings passed to Infinity Fabric
via Embedded Controller (EC)
• Also works with dGPU in AMD SmartShift
system configurations
19. 19 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
SEE ENDNOTES RM3H-17.
• Boost durations can be extended for the
user by up to 4X by considering chassis
temp
• Surface temp of the notebook can be
managed with a closed loop
• V2 STT simplifies OEM EC designs by
pulling chassis thermal calculations into the
SoC
• Works alongside AMD STAPM technology:
– STAPM enables “high boost” by budgeting CPU
power vs. a sustained limit
– STT enables “long boost” by budgeting chassis
thermals vs. a programmed limit
Time
ChassisTemp
Sustained Power Limit
Power
Boost Power Limit
STAPM
Boost STT Boost
20. 20 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
• Saves system power by allowing the CPU to
idle for longer periods when playing audio or
video on enabled Windows applications
• 20% power savings with LPAP enabled
• Designed to support popular wake words
(e.g. Cortana, Alexa)
• Integrated (up to 6) PDM mic interfaces
• Full Audio Stack to enable pre-processing
and spotting keyword
• Acoustic Echo Cancellation (AEC)
21. 21 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
*REQUIRES WINDOWS 10
USB-C with DP Alt-mode supports
concurrent USB 3.2 , high bandwidth
display and power charging when
docked
Supports DisplayPort v1.4 – 8.1G
HBR3 and Display Stream
Compression (DSC)
“Renoir” USB-C based MST dock can support USB
3.2 and multiple monitors simultaneously*
22. 22 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
8b/10b
Youtube
MPEG-4
8b
Twitch
HEVC
8b/10b
NEXT GEN
1080p480
4K120
1080p240
4K60
1080p240
4K60
1080p240
4K60
1080p240
4K60
SEE ENDNOTES GD-81, RM3-253.
• New HDR/WCG encode
(HEVC)
• 31% encoder speedup
23. 23 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
AIDA
Windows Memory Manager
Privileged Guest AMD KMD
Integrated GPU VA to PA Manager
GFX Display
Video
Codec
IOMMU
Hypervisor HAL
DRAM
Host Translation Cache/ rIOMMU
PTE
Management
Frame Buffer
System Memory
Frame Buffer
System Memory
Up to 75% reduction
“Picasso” “Renoir”• Microsoft Hyper-V or Host translation support
for integrated devices
(GPU, Multimedia Accelerators, Display)
• Based on AMD IO Virtualization Technology
• Helps enable Microsoft PlayReady with
reduced UMA dedicated memory frame buffer
24. 24 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
SEE ENDNOTE RVM-108 For more information and substantiation please visit
www.amd.com/25x20
• In 2014, AMD set a bold goal to
accelerate the energy efficiency of our
mobile processors by 25x from 2014-
2020
• 3rd Gen Ryzen 7 (4800H) achieved a
31.7x improvement as a result of
achieving:
• 5x more performance
• 84% less energy use
• The gains exceed historical energy
efficiency improvements by 2x
2 0 1
7
25. 25 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
First 8-core Processors
for Ultrathin Laptops
“Zen 2” Core with 15%
higher IPC
“Vega” 7nm Graphics
Engine with up to 59%
more performance per
CU
Infinity Fabric and
Memory subsystem
optimized for energy
efficiency
SEE ENDNOTES RM3-01, EPYC-09, RM3-250.
26. 26 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
We would like to thank our talented AMD design
teams across Austin, Bangalore, Boston, Fort
Collins, Hyderabad, Markham, Santa Clara, and
Shanghai.
27. 27 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
• GD-81: HEVC (H.265), H.264, and VP9 acceleration are subject to and not
operable without inclusion/installation of compatible HEVC players. GD-81
• EPYC-09: AMD “Matisse” CPU-based system scored an estimated 15%
higher SPECint®_base2006 than previous generation AMD “Summit Ridge”
based systems. Estimate based on internal testing of internal “Matisse” vs.
“Summit Ridge” platforms with single threaded SPEC CPU® 2006 Speed,
compiled with Open64 4.2.5.1. SPEC, SPEC CPU and SPECint are
registered trademarks of the Standard Performance Evaluation Corporation.
For more information about SPEC, see www.spec.org. NOTE: When
compared to Industry Trend Line on charts, the industry trend line is based
on specint06 single thread run, fixed frequency (3.4 GHZ), 8M L3, open64
compiler, with performance score over the last 8 years, starting with the Intel
Sandybridge in 2011.
• RM3-01: As of January 2020, the Ryzen 4000 series mobile processor is the
"Most advanced laptop processor," defined as superior 7nm process
technology in a smaller node, 15W and 45W typical TDP.
• RM3-06: Testing by AMD Performance Labs as of 11/22/2019 utilizing the
Ryzen 7 4800U vs. 2nd Gen Ryzen 7 3700U in Cinebench R20 Benchmark.
Results may vary.
• RM3-123: Testing by AMD Performance Labs as of 11/22/2019 utilizing the
Ryzen 7 4800U vs. 2nd Gen Ryzen 7 3700U in Cinebench R20 Benchmark.
Results may vary.
• RM3-125: Ultrathin laptop processors defined as 15W typical TDP. As of
December 20, 2019, demonstrated by Ryzen 4000 U-series mobile
processor having up to 8 cores, while comparable competitive product (Intel
10th generation mobile processors) offer up to 6 cores.
• RM3-129: Testing by AMD Performance Labs as of 12/09/2019 utilizing an
AMD Ryzen™ 7 4800U reference system and an AMD Ryzen™ 7 3700U
reference system in Mobilemark 2014. Results may vary.
• RM3-130: Based on AMD engineering estimates, January 2020.
• RM3-249: Based on AMD performance labs internal analysis in February
2020, measuring the latency of power state entry/exit for “Renoir” processor
architecture compared to previous generation “Picasso” architecture.
• RM3-250: Testing by AMD performance labs in February 2020, utilizing a
Ryzen™ 7 4800 in an AMD reference system and a previous generation
Ryzen™ 7 3700U in an AMD reference system and tested in 3DMark Time
Spy. Results may vary. 3DMark is a registered trademark of Futuremark.
• RM3-251: Based on internal analysis by AMD performance labs in February
2020. Results may vary.
• RM3-252: Testing by AMD performance labs utilizing the Lenovo Yoga S750
configured with the Ryzen™ 4500U measuring total system power with low
power audio playback (LPAP) enabled and disabled.
28. 28 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
• RM3-253: Based on internal analysis by AMD performance labs, February
2020.
• RM3-255: Based on internal analysis by AMD performance labs, February
2020. Results may vary.
• RM3H-17: Test data generated by AMD Performance Labs as of January 04,
2020. Testing conducted by running multiple sequential runs of 3DMark® 11
with AMD STAPM technology enabled VS. multiple sequential runs of
3DMark® 11 with AMD STT v2 technology enabled. Boost duration evaluated
by comparing the performance results over time between the two boost
technologies. Results may vary. RM3H-17
• RM3H-21: Testing by AMD Performance Labs as of 12/09/2019 utilizing an
ASUS ROG G14 (GA401IV) laptop with AMD Ryzen™ 9 4900HS processor
at 1080P with high settings in DOTA2, LOL, Rocket League, CS:GO, Far Cry
5, ME: SoW, Civ VI, Deus Ex:MD, Hitman, Total War: WH2-Battle, F1 2018,
AoS, Rise of the Tomb Raider, and Strange Brigade. Results may vary.
• RM3H-22: Testing by AMD Performance Labs as of 12/09/2019 utilizing an
ASUS ROG G14 (GA401IV) laptop with AMD Ryzen™ 9 4900HS processor
and the MSI P75 Creator 9SF laptop with Core i9-9880H processor in
Cinebench nT, HandBrake, Blender® CPU (BMW), LAME, and PCMark® 10
DCC. Results may vary. PCMark is a registered trademark of Futuremark
Corporation.
• RM3H-23: Testing by AMD Performance Labs as of 12/09/2019 utilizing an
ASUS ROG G14 (GA401IV) laptop with AMD Ryzen™ 9 4900HS processor
and the MSI P75 Creator 9SF laptop with Core i9-9880H processor in
Cinebench nT, HandBrake, Blender® CPU (BMW), LAME, and PCMark® 10
DCC. Results may vary.
• RM3-216: Testing by AMD Performance Labs as of 12/09/2019 utilizing an
AMD Ryzen™ 4800U reference system and a Dell XPS 7390 system with
Intel® Core i7-10710U processor in Cinebench R20 1T. Results may vary.
• RM3-217: Testing by AMD Performance Labs as of 12/09/2019 utilizing an
AMD Ryzen™ 4800U reference system and a Dell XPS 7390 system with
Intel® Core i7-10710U processor in Cinebench R20 nT. Results may vary.
• RM3-218: Testing by AMD Performance Labs as of 12/09/2019 utilizing an
AMD Ryzen™ 4800U reference system and a Dell XPS 7390 system with
Intel® Core i7-10710U processor in 3DMark® Time Spy. Results may vary.
3DMark is a registered trademark of Futuremark Corporation.
• RM3-254: Testing by AMD performance labs measuring the average
APU power consumption of the Ryzen 4800U compared to the Ryzen 7
3700U PRO while running PCMark® 10 Applications test.
29. 29 AMD NEXT GENERATION 7NM RYZEN™ 4000 APU “RENOIR” | AUG 2020
• RVM-108: Testing by AMD Performance Labs as of 4/15/2020. Processors
tested: AMD FX-7600P, AMD FX-8800P, AMD FX-9830P, AMD Ryzen 7
2700U, AMD Ryzen 7 2800H, AMD Ryzen 7 3750H, and AMD Ryzen 7
4800H. 25x20 program tracked against Energy Star Rev 6.1 8/12/2014 and
3DMark® 2011 P-Score and Cinebench R15 nT. Results may vary with
drivers and BIOSes. The normalized performance increase is 5x higher from
AMD’s 2014 notebook processor to the 2020 design. This equates to one-
fifth the average compute time for a given task. Annual processor electricity
use (kwh), based on ENERGY STAR typical use energy consumption (TEC),
in 2020 equals 84% less than the 2014 amount. AMD achieved a 31.7x
increase in typical use energy efficiency from 2014-2020, or ~2x compared to
what would be the historical rate of increase (doubling every 1.57 years)
during the same timeframe of 14.1x.
• RN-1: Based on AMD Internal evaluation comparing die size and transistor
count of Renoir SoC Die in 7nm to Raven-Picasso SoC Die in GF14/12
• RN-2: Based on AMD internal analysis. Compared Vega 14nm (11 CU,
Picasso) area to Vega 7nm (8 CU, Renoir) area. Performance density is
evaluated by calculating a ratio of Performance per unit area.
• RN-3: Based on AMD internal analysis Feb 2020. Compared max speed for
Picasso mobile notebook to Renoir mobile
• RZG2-68: Based on testing by AMD Labs on 6.9.2020 using Cinebench R20
1T and nT benchmarks. Performance may vary.
• RZG2-69: Based on testing by AMD Labs in June 2020, using the 3DMark
Timespy benchmark. Results may vary. 3DMark is a registered trademark of
Futuremark Corporation.