The document discusses hardware reverse engineering (RE) and proposes a Hardware Reverse Engineering Standard (HRES) process modeled after the Penetration Testing Execution Standard (PTES). The HRES process includes 7 phases: pre-engagement interactions, intelligence gathering, threat modeling, vulnerability analysis, exploitation, post-exploitation, and reporting. The goal is to define a standard for assessing embedded device and hardware security that provides measurable and repeatable testing beyond a basic vulnerability scan. Collaboration from the hardware security community is sought to further develop the HRES.