This paper presents circuit design for a low power fault secure encoder and decoder system. Memory cells in logic circuits have been protected from soft errors for more than a decade due to increase in soft error rates. In this paper the circuitry around the memory block have been susceptible to soft errors and must be protected from faults. The proposed design uses error correcting codes and ring counter addressing scheme. In the ring counter several new clock gating techniques are proposed to reduce power consumption. A fault secure Encoder and Decoder error free low power logic circuits can be achieved by the proposed design. Simulation results show great improvement in power consumption. Fault secure Encoder and Decoder with clock gated by CG-element consumes approximately half the power of that consumed by the fault free circuit which doesn’t employ clock gating technique
Application of Microcontroller in Transmitter Section of Wireless Systemijceronline
International Journal of Computational Engineering Research (IJCER) is dedicated to protecting personal information and will make every reasonable effort to handle collected information appropriately. All information collected, as well as related requests, will be handled as carefully and efficiently as possible in accordance with IJCER standards for integrity and objectivity.
Internet enebled data acquisition and device controleSAT Journals
Abstract This paper presents very simple and economical way to monitor and control boilers process used in chemical, pharmaceutical companies remotely with the help of internet. Microcontroller ATmega128 is used to which all sensors and devices are interfaced at its I/O pins. A Stand-Alone Ethernet Controller IC which handles most of the network protocol requirements ENC28J60 is interfaced to the microcontroller using SPI interface and acts as a communication media between microcontroller ATmega128 and remote user. The TCP/IP stack, application source code, and dynamic web page is stored in microcontroller ATmega128. Dynamic webpage is the key element which eliminates physical presence of user in the field and thus saves the labour time and money. Keywords: ATmega128, ENC28J60, TCP/IP, SPI interface, Dynamic webpage.
FPGA based synchronous multi-channel PWM generator for humanoid robot IJECEIAES
In this paper, synchronous multi-channel pulse width modulation (PWM) generator for driving servo motors of humanoid robot was proposed. In an application, the humanoid robot requires smooth and beautiful movement, therefore the PWM signal for each servo motor must be synchronized. Since microcontroller (slave) has no enough channels to generate synchronous PWMs for 32 servo motors, field programmable gate array (FPGA) was used as slave for the humanoid robot. The FPGA was controlled by microcontroller (master) using serial communication. Simulation results show the system can perform serial communication, synchronize, and convert data well. The system can also generate PWM simultaneously with accurate duty cycle and fix period of 20ms.
Nowadays every system is automated in order to face new challenges. In the present days, Automated systems have less manual operations, flexibility, reliability and accurate. Due to this demand, every field prefers automated control systems. Especially in the field of electronics automated systems are giving good performance in industries and on roads. The mechanical arrangement is arranged to the robot as a robotic car using solar energy. This project handles with two operations. One hand Autonomous, based on sensor application robotic car moves itself by avoiding an obstacle and to move in its paths. It explains the method of interfacing solar panel, relay circuit board, IR sensor to the car and how to send the command to the microcontroller to drive the car autonomously. On the other hand, it controls using BLUETOOTH modem, in order to control the robotic car using BLUETOOTH, the user has to send the predefined messages to the modem. When the modem receives these predefined messages, it intimates the same to the microcontroller. The microcontroller upon receiving the information from the modem acts in accordance with the message, making it a highly automated application.
Development of Distributed Mains Monitoring and Switching System for Indus Co...iosrjce
Indus Complex at Raja Ramanna Centre for Advanced Technology (RRCAT) has two synchrotron
radiation sources, Indus-1 and Indus-2. Microtron is injector to both the machines which sends electron pulses
to the Booster. A new, microcontroller based, distributed mains monitoring and switching system is developed
for Indus complex. It facilitates remote monitoring and switching of AC power switches to various subsystems. It
includes interfacing with power switches/Miniature Circuit Breakers (MCBs) of Indus machine subsystems. This
work involves development of hardware, firmware for microcontroller, implementation of communication
protocol; LabVIEW based server and client application. The developed system allows remote monitoring and
switching of MCBs from main control room.
Interfacing Of PIC 18F252 Microcontroller with Real Time Clock via I2C ProtocolIJERA Editor
This paper describes a microcontroller based digital clock which can be used in real time systems. The system is constructed using PIC18F252 (microcontroller), DS1307 (real time clock IC) and its software program is written with C programming language. A 3v battery backup is provided to real time clock IC. Communication between PIC microcontroller and DS1307 takes place through I²C Bus protocol
Implementation of vehicle ventilation system using NodeMCU ESP8266 for remote...journalBEEI
In this paper, an implementation of vehicle ventilation system using microcontroller NodeMCU is described, as an internet of things (IoT) platform. A low-cost wireless fidelity (Wi-Fi) microchip ESP8266 integrated with NodeMCU provides full-stack transmission control protocol/internet protocol (TCP/IP) to communicate between mobile applications. This chip is capable to monitor and control sensor devices connected to the IoT platform. In this reserach, data was collected from a temperature sensor integrated to the platform, which then monitored using Blynk application. The vehicle ventilation system was activated/deactivated through mobile application and controlled using ON/OFF commands sent to the connected devices. From the results, the vehicle ventilation system built using NodeMCU microcontroller is capable to provide near real-time data monitoring for temperature in the car before and after the ventilation system was applied.
Application of Microcontroller in Transmitter Section of Wireless Systemijceronline
International Journal of Computational Engineering Research (IJCER) is dedicated to protecting personal information and will make every reasonable effort to handle collected information appropriately. All information collected, as well as related requests, will be handled as carefully and efficiently as possible in accordance with IJCER standards for integrity and objectivity.
Internet enebled data acquisition and device controleSAT Journals
Abstract This paper presents very simple and economical way to monitor and control boilers process used in chemical, pharmaceutical companies remotely with the help of internet. Microcontroller ATmega128 is used to which all sensors and devices are interfaced at its I/O pins. A Stand-Alone Ethernet Controller IC which handles most of the network protocol requirements ENC28J60 is interfaced to the microcontroller using SPI interface and acts as a communication media between microcontroller ATmega128 and remote user. The TCP/IP stack, application source code, and dynamic web page is stored in microcontroller ATmega128. Dynamic webpage is the key element which eliminates physical presence of user in the field and thus saves the labour time and money. Keywords: ATmega128, ENC28J60, TCP/IP, SPI interface, Dynamic webpage.
FPGA based synchronous multi-channel PWM generator for humanoid robot IJECEIAES
In this paper, synchronous multi-channel pulse width modulation (PWM) generator for driving servo motors of humanoid robot was proposed. In an application, the humanoid robot requires smooth and beautiful movement, therefore the PWM signal for each servo motor must be synchronized. Since microcontroller (slave) has no enough channels to generate synchronous PWMs for 32 servo motors, field programmable gate array (FPGA) was used as slave for the humanoid robot. The FPGA was controlled by microcontroller (master) using serial communication. Simulation results show the system can perform serial communication, synchronize, and convert data well. The system can also generate PWM simultaneously with accurate duty cycle and fix period of 20ms.
Nowadays every system is automated in order to face new challenges. In the present days, Automated systems have less manual operations, flexibility, reliability and accurate. Due to this demand, every field prefers automated control systems. Especially in the field of electronics automated systems are giving good performance in industries and on roads. The mechanical arrangement is arranged to the robot as a robotic car using solar energy. This project handles with two operations. One hand Autonomous, based on sensor application robotic car moves itself by avoiding an obstacle and to move in its paths. It explains the method of interfacing solar panel, relay circuit board, IR sensor to the car and how to send the command to the microcontroller to drive the car autonomously. On the other hand, it controls using BLUETOOTH modem, in order to control the robotic car using BLUETOOTH, the user has to send the predefined messages to the modem. When the modem receives these predefined messages, it intimates the same to the microcontroller. The microcontroller upon receiving the information from the modem acts in accordance with the message, making it a highly automated application.
Development of Distributed Mains Monitoring and Switching System for Indus Co...iosrjce
Indus Complex at Raja Ramanna Centre for Advanced Technology (RRCAT) has two synchrotron
radiation sources, Indus-1 and Indus-2. Microtron is injector to both the machines which sends electron pulses
to the Booster. A new, microcontroller based, distributed mains monitoring and switching system is developed
for Indus complex. It facilitates remote monitoring and switching of AC power switches to various subsystems. It
includes interfacing with power switches/Miniature Circuit Breakers (MCBs) of Indus machine subsystems. This
work involves development of hardware, firmware for microcontroller, implementation of communication
protocol; LabVIEW based server and client application. The developed system allows remote monitoring and
switching of MCBs from main control room.
Interfacing Of PIC 18F252 Microcontroller with Real Time Clock via I2C ProtocolIJERA Editor
This paper describes a microcontroller based digital clock which can be used in real time systems. The system is constructed using PIC18F252 (microcontroller), DS1307 (real time clock IC) and its software program is written with C programming language. A 3v battery backup is provided to real time clock IC. Communication between PIC microcontroller and DS1307 takes place through I²C Bus protocol
Implementation of vehicle ventilation system using NodeMCU ESP8266 for remote...journalBEEI
In this paper, an implementation of vehicle ventilation system using microcontroller NodeMCU is described, as an internet of things (IoT) platform. A low-cost wireless fidelity (Wi-Fi) microchip ESP8266 integrated with NodeMCU provides full-stack transmission control protocol/internet protocol (TCP/IP) to communicate between mobile applications. This chip is capable to monitor and control sensor devices connected to the IoT platform. In this reserach, data was collected from a temperature sensor integrated to the platform, which then monitored using Blynk application. The vehicle ventilation system was activated/deactivated through mobile application and controlled using ON/OFF commands sent to the connected devices. From the results, the vehicle ventilation system built using NodeMCU microcontroller is capable to provide near real-time data monitoring for temperature in the car before and after the ventilation system was applied.
Arduino based Real Time Clock with Ringing of Bell and National Anthemrahulmonikasharma
Now a days many school and college bells are operated manually. Hence there is a huge demand of accuracy is required. In market there are many digital clocks available with bells but rings only at specific time and cannot stop after that specific time. A new and inexpensive design is being presented here, in this project. The benefit of this design is that, the bell rings at the start of each period without any human intervention and hence takes over the manual task of switching on/off the college bell with respect to time. It uses Real Time Clock (DS1307) which work at the real time. The Arduino UNO is used to control all the functions; it gets the time through the keypad and stores it in its memory and display it on LCD display. When this programmed time equals the real time then the bell is switched on via a relay and rings for a predetermined time. The bell ringing time can be edited at any time, so that it can be reused at normal class timings as well as at exam times. Also the voice play module with USB player and speaker, play the national anthem according to the users given time as programmed using Arduino UNO.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
The paper describes a automatically controlled wheel chair for disabled people. The chair enables the user to move his chair using his finger & hand. The flex sensors and accelerometer on the glove generate ASL coded signals which are decoded & control the chair. It also display the information intended by the user. Additionally the information is also converts to speech. The wireless link between the glove & wheel chair enables any person to operate. This advanced wheelchair system is used for physically disabled and deaf/dumb people move around easily and to communicate with normal people.
FPGA Based Implementation of Electronic Safe LockIOSR Journals
Thispaper is based on design of an “Automatic Security System Using VHDL” providing
understandable and adequate operating procedure to the user. The operation is conducted by six different
modules. If any of the modules fails, the failed module can be replaced without affecting the activity of others.
The safety is ensured to the user by setting a secret code number which is the combination of three numbers, by
doing so, only the authorized users can unlock the safe. The paper finds its appositeness in big organizations,
military and banking sectors. Simulation through VHDL is quite generous and fiscal due to the reduction in
number of components. Important operation consideration is to not give any indication to the user that the
combination entered is incorrect until after the user has entered the all three numbers and pressed the OPEN
key. Otherwise, it is possible for a user to determine the combination in no more than 96 attempts, as opposed to
no more than 32,768 attempts
A Computer Based Artificial Neural Network Controller with Interactive Audito...theijes
The proposed design offers a complete online and offline solution to manage the industrial systems. The designed hardware able to, read analog signals, digital signals, and controls many devices in real time. The heart of the hardware part is microcontroller PIC18F4550 which communicate with a computer via USB. The software part is programmed using Visual C# software to control managed system requires. The system operator can monitor system and diagnostic faults manually or automatically based on artificial neural network. Finally, the system has been simulated and implemented successfully.
1.Gives basic idea about what is arduino? and their funtionalites.
2. Applications of arduino
3. Adruino programming
4. what is Nodemcu ?
5. pindiagram of Nodemcu
For years, LabVIEW has enabled engineers and scientists to develop sophisticated autonomous systems. At its core, Lab VIEW is widely used for sensor and actuator connectivity and currently offers more than 8000 drivers for measurement devices. Furthermore, with new libraries for autonomy and an entirely new suite of robotics-specific sensor and actuator drivers, LabVIEW provides all of the necessary tools for robotics development. The DC Motor is an attractive piece of equipment in many industrial applications requiring variable speed and load characteristics due to its ease of controllability. Speed of a DC motor varies proportional to the input voltage. With a fixed supply voltage the speed of the motor can be changed. This paper focuses on controlling the speed and direction of a Robot using PWM technique (varying duty cycle of a square wave) and Arduino. The four different keys are assigned for the forward, backward, left and right movement and it is controlled by using LabVIEW interface Arduino (LIFA).
Monitoring and Control System for Building Application Using Modbus Remote Te...IJITCA Journal
This paper presents the design of a monitoring and control system that will be installed in buildings and
used as a building management system for monitoring dan controlling mechanical and electrical devices
embedded in the building.
The system implements the master slave RS485 multidrop configuration. The system hardware consists of
sensor, controller, and actuator. Arduino board with AT Mega series microcontroller unit (MCU) is used
as controller. MCU’s ADC will be used as sensor. MODBUS remote terminal unit is used as protocol and
implemented inside the master and slave progam inside the MCU.
At the end of this paper, the result of transmission with various baud rate setting, various cable length,
multiple message frames and are presented.
An improvised object detector, counter and width finder; using Arduino UNO, HC-SR04 Sonar and Servo Motor with real-time mapping using Processing. Devised a better algorithm for greater accuracy and speed.
Arduino based Real Time Clock with Ringing of Bell and National Anthemrahulmonikasharma
Now a days many school and college bells are operated manually. Hence there is a huge demand of accuracy is required. In market there are many digital clocks available with bells but rings only at specific time and cannot stop after that specific time. A new and inexpensive design is being presented here, in this project. The benefit of this design is that, the bell rings at the start of each period without any human intervention and hence takes over the manual task of switching on/off the college bell with respect to time. It uses Real Time Clock (DS1307) which work at the real time. The Arduino UNO is used to control all the functions; it gets the time through the keypad and stores it in its memory and display it on LCD display. When this programmed time equals the real time then the bell is switched on via a relay and rings for a predetermined time. The bell ringing time can be edited at any time, so that it can be reused at normal class timings as well as at exam times. Also the voice play module with USB player and speaker, play the national anthem according to the users given time as programmed using Arduino UNO.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
The paper describes a automatically controlled wheel chair for disabled people. The chair enables the user to move his chair using his finger & hand. The flex sensors and accelerometer on the glove generate ASL coded signals which are decoded & control the chair. It also display the information intended by the user. Additionally the information is also converts to speech. The wireless link between the glove & wheel chair enables any person to operate. This advanced wheelchair system is used for physically disabled and deaf/dumb people move around easily and to communicate with normal people.
FPGA Based Implementation of Electronic Safe LockIOSR Journals
Thispaper is based on design of an “Automatic Security System Using VHDL” providing
understandable and adequate operating procedure to the user. The operation is conducted by six different
modules. If any of the modules fails, the failed module can be replaced without affecting the activity of others.
The safety is ensured to the user by setting a secret code number which is the combination of three numbers, by
doing so, only the authorized users can unlock the safe. The paper finds its appositeness in big organizations,
military and banking sectors. Simulation through VHDL is quite generous and fiscal due to the reduction in
number of components. Important operation consideration is to not give any indication to the user that the
combination entered is incorrect until after the user has entered the all three numbers and pressed the OPEN
key. Otherwise, it is possible for a user to determine the combination in no more than 96 attempts, as opposed to
no more than 32,768 attempts
A Computer Based Artificial Neural Network Controller with Interactive Audito...theijes
The proposed design offers a complete online and offline solution to manage the industrial systems. The designed hardware able to, read analog signals, digital signals, and controls many devices in real time. The heart of the hardware part is microcontroller PIC18F4550 which communicate with a computer via USB. The software part is programmed using Visual C# software to control managed system requires. The system operator can monitor system and diagnostic faults manually or automatically based on artificial neural network. Finally, the system has been simulated and implemented successfully.
1.Gives basic idea about what is arduino? and their funtionalites.
2. Applications of arduino
3. Adruino programming
4. what is Nodemcu ?
5. pindiagram of Nodemcu
For years, LabVIEW has enabled engineers and scientists to develop sophisticated autonomous systems. At its core, Lab VIEW is widely used for sensor and actuator connectivity and currently offers more than 8000 drivers for measurement devices. Furthermore, with new libraries for autonomy and an entirely new suite of robotics-specific sensor and actuator drivers, LabVIEW provides all of the necessary tools for robotics development. The DC Motor is an attractive piece of equipment in many industrial applications requiring variable speed and load characteristics due to its ease of controllability. Speed of a DC motor varies proportional to the input voltage. With a fixed supply voltage the speed of the motor can be changed. This paper focuses on controlling the speed and direction of a Robot using PWM technique (varying duty cycle of a square wave) and Arduino. The four different keys are assigned for the forward, backward, left and right movement and it is controlled by using LabVIEW interface Arduino (LIFA).
Monitoring and Control System for Building Application Using Modbus Remote Te...IJITCA Journal
This paper presents the design of a monitoring and control system that will be installed in buildings and
used as a building management system for monitoring dan controlling mechanical and electrical devices
embedded in the building.
The system implements the master slave RS485 multidrop configuration. The system hardware consists of
sensor, controller, and actuator. Arduino board with AT Mega series microcontroller unit (MCU) is used
as controller. MCU’s ADC will be used as sensor. MODBUS remote terminal unit is used as protocol and
implemented inside the master and slave progam inside the MCU.
At the end of this paper, the result of transmission with various baud rate setting, various cable length,
multiple message frames and are presented.
An improvised object detector, counter and width finder; using Arduino UNO, HC-SR04 Sonar and Servo Motor with real-time mapping using Processing. Devised a better algorithm for greater accuracy and speed.
Convolutional encoding with Viterbi decoding is a good forward error correction technique suitable for channels affected by noise degradation. Fangled Viterbi decoders are variants of Viterbi decoder (VD) which decodes quicker and takes less memory with no error detection capability. Modified fangled takes it a step further by gaining one bit error correction and detection capability at the cost of doubling the computational complexity and processing time. A new efficient fangled Viterbi algorithm is proposed in this paper with less complexity and processing time along with 2 bit error correction capabilities. For 1 bit error correction for 14 bit input data, when compared with Modified fangled Viterbi decoder, computational complexity has come down by 36-43% and processing delay was halved. For a 2 bit error correction, when compared with Modified fangled decoder computational complexity decreased by 22-36%.
Synopsis for alcohol detection with vehicle controlling (1)Pankaj Singh
The main purpose behind this project is “Drunk driving detection”. Now a days, many accidents are happening because of the alcohol consumption of the driver or the person who is driving the vehicle. Thus Drunk driving is a major reason of accidents in almost all contries all over the world. Alcohol Detector in Car project is designed for the safety of the people seating inside the car. This project should be fitted / installed inside the vehicle.
Student information management system project report ii.pdfKamal Acharya
Our project explains about the student management. This project mainly explains the various actions related to student details. This project shows some ease in adding, editing and deleting the student details. It also provides a less time consuming process for viewing, adding, editing and deleting the marks of the students.
Hierarchical Digital Twin of a Naval Power SystemKerry Sado
A hierarchical digital twin of a Naval DC power system has been developed and experimentally verified. Similar to other state-of-the-art digital twins, this technology creates a digital replica of the physical system executed in real-time or faster, which can modify hardware controls. However, its advantage stems from distributing computational efforts by utilizing a hierarchical structure composed of lower-level digital twin blocks and a higher-level system digital twin. Each digital twin block is associated with a physical subsystem of the hardware and communicates with a singular system digital twin, which creates a system-level response. By extracting information from each level of the hierarchy, power system controls of the hardware were reconfigured autonomously. This hierarchical digital twin development offers several advantages over other digital twins, particularly in the field of naval power systems. The hierarchical structure allows for greater computational efficiency and scalability while the ability to autonomously reconfigure hardware controls offers increased flexibility and responsiveness. The hierarchical decomposition and models utilized were well aligned with the physical twin, as indicated by the maximum deviations between the developed digital twin hierarchy and the hardware.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
FAULT SECURE ENCODER AND DECODER WITH CLOCK GATING
1. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
DOI : 10.5121/vlsic.2012.3212 133
FAULT SECURE ENCODER AND DECODER
WITH CLOCK GATING
N.Kapileswar1
and P.Vijaya Santhi2
Dept.of ECE,NRI Engineering College, Pothavarapadu,,,INDIA
1
nvkapil@gmail.com, 2
santhipalepu@gmail.com
Abstract:
This paper presents circuit design for a low power fault secure encoder and decoder system. Memory cells
in logic circuits have been protected from soft errors for more than a decade due to increase in soft error
rates. In this paper the circuitry around the memory block have been susceptible to soft errors and must be
protected from faults. The proposed design uses error correcting codes and ring counter addressing
scheme. In the ring counter several new clock gating techniques are proposed to reduce power
consumption. A fault secure Encoder and Decoder error free low power logic circuits can be achieved by
the proposed design. Simulation results show great improvement in power consumption. Fault secure
Encoder and Decoder with clock gated by CG-element consumes approximately half the power of that
consumed by the fault free circuit which doesn’t employ clock gating technique
Keywords:
GC-element, first-in–first-out (FIFO), gated-clock, ring-counter, Double edge triggered(DET ) D flip-
flop(DFF ), encoder, decoder, detector, corrector.
1.1 Introduction
Communication devices have experienced explosive growth recently. Longer battery life and
fault free operation are crucial factors in the widespread success of these products. Low power
design is followed for fault free circuits. Error rate is more in logic circuits. Most of the logic
circuits consist of memory. From past ten years, all researchers concentrated in memory cells.
They designed circuits to reduce faults in memory[11,13]. Even though the memory cells are
protected, the error rate is not reduced to an appreciable level. Then the concentration is moved
on to the surrounding circuitries of the memory to reduce error rate [11,13]. In most of the logic
circuits at the transmitter end and at the receiver end, encoder and decoder circuits are observed.
In this paper the surrounding circuitries of memory cells are encoder block and decoder block.
To reduce error rate in logic circuits a fault secure encoder and decoder is needed [11,13]. On
adding fault secure design to existing encoder and decoder circuit will increase power
consumption. Power consumption has become one of the biggest challenges in high-performance
logic circuit design. Designers are thus continuously challenged to come up with innovative ways
to reduce power[4], while trying to meet all the other constraints imposed on the design. So, the
idea is to design a fault secure encoder and decoder with clock gating technique. Clock gating is
one of the power reduction technique. The idea of clock gating is to shut down the clock of any
component whenever it is not being used (accessed). It involves inserting combinational logic
along the clock path to prevent the unnecessary switching of sequential elements. The deigned
2. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
134
circuit reduce error rate and also consumes less power. The existing circuit is just a encoder and
decoder with out any fault secure system. The data is stored in memory address generated by
binary address decoder. Memory system which can tolerate errors in any part of the system,
including the storage unit, encoder and decoder. The information bits are fed into the encoder to
encode the information vector. At the output of encoder, error may occur in the code word. The
error should be detected and corrected before storing it in memory. The code word is then stored
in the memory. Later during operation, the stored code word will be retrieved from the memory
unit. Since the code word is susceptible to transient faults while it is stored in the memory, or
retrieving the code word. Before decoding the code word, errors should corrected, otherwise the
decoded information is not same as the transmitted information. There is need to add detector
and corrector circuitry to both encoder and decoder to reduce error rate. To reduce error rate in
logic circuits a fault secure encoder and decoder is needed. On adding fault secure design to
existing encoder and decoder circuit will increase power consumption.
1.2 Clock gating:
The idea of clock gating is to shut down the clock of any component whenever it is not being
used (accessed).on inserting combinational logic along the clock path the unnecessary switching
of sequential elements are prevented. Now a days Power consumption has become one of the
biggest challenges in high-performance logic circuit design. Designers are thus continuously
challenged to come up with innovative ways to reduce power, while trying to meet all the other
constraints imposed on the design. Clock gating has been used to reduce dynamic clock power
through all levels of the design hierarchy from the top-most chip level down to the individual
latch level .On increasing the circuitry in clock path power consumption is reduced. If there is
no need of switching some elements in the circuit, then clock is not supplied to those elements.
Main concentration is on clock signal because major consumption of power is by clock signal.
2.1 Implementation of fault Secure Encoder and Decoder with clock
gating.
Memory system which can tolerate errors in any part of the system, including the storage unit,
encoder and corrector circuit, using the fault-secure detector is shown below. There is a fault
secure detector that can detect any combination of errors in the received code word along with
errors in the detector circuit. This fault secure detector can verify the correctness of the encoder
and corrector operation[11,13]. To address memory, ring counter is used[3]. This ring counter
employs clock gating technique to reduce power consumption. An overview of the proposed fault
secure encoder and decoder with clock gating is shown in fig. 1, and is as described below.
3. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
135
Figure1. Block diagram of fault secure encoder and decoder with clock gating
The information bits are fed into the encoder to encode the information vector, and the fault
secure detector of the encoder verifies the validity of the encoded vector. If the detector detects
any error, the encoding operation must be redone to generate the correct code word. The code
word is then stored in the memory by address generated by ring counter. The ring counter
employs clock gating techniques. Later during operation, the stored code word will be retrieved
from the memory unit. Since the code word is susceptible to transient faults while it is stored in
the memory, the retrieved code-word must be fed into the detector to detect any potential error
and possibly to the corrector to recover any erroneous bits. The circuit designed consumes less
power and is a fault secure system
2.2 Design Structure of Encoder
An n-bit code-word c, which encodes k-bit information vector i is generated by multiplying the k-
bit information vector with k × n bit generator matrix G, i.e.,
c = i · G. Fig.2 shows the generator matrix of (15, 7) code. All the rows of the matrix are cyclic
shifts of the first row. This cyclic code generation does not generate a systematic code and the
information bits must be decoded from the encoded vector, which is not desirable for our fault-
tolerant approach due to the further complication and delay that it adds to the operation[2].
C0c1c2 c3 c4 c5 c6 c7 c8 c9c10c11c12c13c14
I0 1 0 0 0 1 0 1 1 1 0 0 0 0 0 0
I1 0 1 0 0 0 1 0 1 1 1 0 0 0 0 0
I2 0 0 1 0 0 0 1 0 1 1 1 0 0 0 0
I3 0 0 0 1 0 0 0 1 0 1 1 1 0 0 0
I4 0 0 0 0 1 0 0 0 1 0 1 1 1 0 0
I5 0 0 0 0 0 1 0 0 0 1 0 1 1 1 0
I6 0 0 0 0 0 0 1 0 0 0 1 0 1 1 1
Figure 2. The generator matrix of code (15, 7) in cyclic format
4. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
136
The generator matrix of any cyclic code can be converted into systematic form (G = [I : X]) The
encoded vector, which is generated by the inner product of the information vector and the
generator matrix, consists of information bits followed by parity bits, where each parity bit is
simply an inner product of information vector and a column of X, from G = [I : X].
2.3 Design structure of Fault Secure Detector
The core of the detector operation is to generate the syndrome vector, which is basically
implementing the following vector-matrix multiplication on the received encoded vector c and
parity-check matrix H. c T
H = S.
Figure 3. Fault-secure detector for (15, 7) code
Therefore each bit of the syndrome vector is the product of C with one row of the parity-check
matrix. This product is a linear binary sum over digits of C. where the corresponding digit in the
matrix row is 1. This binary sum is implemented with an XOR gate. Fig.3 shows the detector
circuit for the (15, 7) code. An error is detected if any of the syndrome bits has a nonzero value.
The final error detection signal is implemented by an OR function of all the syndrome bits. The
output of this r-input OR gate is the error detector signal.
2.4 Design structure of Ring counter with clock gated by R–S flip-flop
By observing the fact that only one of the DFFs in the ring counter is activated at any time, the
gated-clock technique has then been proposed to be applied to the DFFs. every eight DFFs in the
ring counter are grouped into one block. Then, a “gate” signal is computed for each block to gate
the frequently toggled clock signal when the block can be inactive so that unnecessary power
wasted in clock signal transitions is saved. The clock signal is gated by RS-flip flop.
Figure 4. Ring counter with clock gated by RS-flip flop
5. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
137
DET DET DET DET
Initialize1
clk
DET DET DET DET
clk
Block1 Block n
CG
Initialize2
CG
when the input of the first DFF in a block is asserted, it sets the output of the RS-flip flop to “1”
at the next clock edge. Thus, the incoming “1” can be trapped in that block and continue to
propagate inside the block. On the other hand, the successful propagation of “1” to the first DFF
in the next block can henceforth shut down the unnecessary clock signal in the current block.
Although some power is indeed saved by gating the clock signal in inactive blocks, the extra RS-
flip flops still serve as loading of the clock signal and demand more than necessary clock power.
2.5 Design structure of Ring counter with clock gated by CG-element
As the extra RS- flip flops still serve as loading of the clock signal and demand more than
necessary clock power, the idea is to replace the RS-flip flop by a CG-element which greatly
reduce the power consumption. Additionally, replacing D-flip flops by DET flip-flops reduce the
clock rate to half and thus also reduce the power consumption on the clock signal.
Figure 5. Ring counter with clock gated by CG-elements
2.6 Design structure of CG-element
The CG-element is an essential element in asynchronous circuits for handshaking. The logic of the
CG-element is given by C+ =AB+BC+CA
Figure 6. The CG-element
Where A as well as B are its two inputs and C+ as well as C are the next and current outputs. If
A=B, then the next output C+ will be the same as A. Otherwise A≠B, and C+ remain
unchanged. Since the output of CG-element can only be changed when A=B , it can avoid the
possibility of glitches, a crucial property for a clock gating signal. When the input of the last
DET flip flop in the previous block changes to“1”making both two inputs of the CG-element the
same, the clock signal in the current block will be turned on. When the output of the first DET
flip-flop in the current block is asserted, then both inputs of the CG-element in the previous
block go to “0” and the clock for the previous block is disabled Each block contains one CG-
element to control the delivery of the local clock signal “CLK i,j ” to the DET flip-flops, and
only the “CKEi,j signals along the path passing the global clock source to the local clock signal
6. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
138
are active. The “gate” signal (CKE ) can also be derived from the output of the DET flip-flops in
the ring counter.
2.7 Design structure of Corrector
One-step majority logic correction is a fast and relatively compact error-correcting technique.
One-Step majority Logic Corrector: One-step majority logic correction is the procedure that
identifies the correct value of a each bit in the codeword directly from the received codeword;
this is in contrast to the general message-passing error correction strategy, which may demand
multiple iterations of error diagnosis and trial correction. Avoiding iteration makes the correction
latency both small and deterministic. This technique can be implemented serially to provide a
compact implementation or in parallel to minimize correction latency. This method consists of
two parts: 1) generating a specific set of linear sums of the received vector bits and 2) finding the
majority value of the computed linear sums. The majority value indicates the correctness of the
code-bit under consideration; if the majority value is 1, the bit is inverted, otherwise it is kept
unchanged.
Figure7. Serial one-step majority logic corrector structure
3. Simulation results
3.1 Power analysis
Figure 8. Power consumption of proposed system
0
500
1000
1500
2000
2500
3000
50
70
90
200
400
600
800
1000
2000
3000
Frequiency(MHz)----->
power
consumption(mW)---->
1.2
v
1.4
v
1.6
v
7. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
139
Figure 9. Power consumption of ring counter with RS-FF and CG-element
Table 1 Power consumption of Ring counter
Ring counter
structure
Power
consumption(mW)
Clock gated by
RS-flip flop
107mW
Clock gated by
CG-element
65mW
Table 2 Power consumption of Ring counter
Voltage
(in volts)
Power consumption(mW)
Clock gated by RS-
flipflop
Clock gated by CG-
element
1.2 28 19
1.4 36 23
1.6 45 28
1.8 55 34
2.0 67 40
2.5 107 65
Table 3 Power consumption of existing and proposed systems
0
500
1000
1500
2000
2500
3000
3500
4000
4500
5000
50
70
90
200
400
600
800
1000
2000
3000
frequency(MHz)------->
power(mW)-------->
CG-element
RS-FF
8. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
140
Systems
Power
Consumption
(mW)
Clock
frequency
(MHz)
Delay
time
(nsec)
Supply
voltage
(volts)
Without clock gating 105 60 4.990 2.5
Clock gated by RS-flip
flop
107 60 4.950 2.5
Clock gated by CG-
element
57 60 4.670 2.5
By observing Table 1, Table 2 and Table 3, proposed system with clock gated by CG-element
consumes less power than the system with out clock gating and also clock gated by RS-flip flop.
For supply voltage of 2.5v and at frequency of 60 MHz, fault secure encoder and decoder
without clock gating consumes 105mW of power, with clock gated by RS-flip flop consumes
107 mW and with clock gated by CG-element consumes 57mW of power. The proposed system
consumes less power and also has less delay time. The optimum frequency is 60 MHz for the
designed system. An important observation from Table 3 is system clock gated by RS-flip flop
consumes more power than the system without clock gating because the extra RS-flip flops still
serve as loading of the clock signal and demand more than necessary clock power.
3.2 Conclusion
An efficient circuit to reduce soft error’s in logic circuits is designed. Proposed system with
clock gated by CG-element consumes less power than the system without clock gating and also
clock gated by RS-flip flop. For supply voltage 2.5v and at frequency of 60 MHz, fault secure
encoder and decoder without clock gating consumes 105mW of power, with clock gated by RS-
flip flop consumes 107 mW and with clock gated by CG-element consumes 57mW of power.
The proposed system consumes less power and also has less delay time. The optimum frequency
is 60 MHz for the designed system. The system clock gated by RS-flip flop consumes more
power than the system without clock gating because the extra RS-flip flops still serve as loading
of the clock signal and demand more than necessary clock power. The proposed technique can be
used in low power circuit design for multimedia communication devices where long battery life
is a crucial factor.
3.3 References
[1] Gallager R.G, “Low-Density Parity-Check Codes”. Cambridge, MA:MIT Press, 1963
[2] McEliece R.J, “The Theory of Information and Coding”. Cambridge, U.K.: Cambridge University
Press, 2002.
[3] Tsern.E K and Meng T. H, “A low-power video-rate pyramid VQ decoder,” IEEE J. Solid-State
Circuits, Vol. 31, No. 11, Nov. 1996, pp. 1789–1794.
[4] Po-Chun Hsieh, Jing-Siang Jhuang, Pei-Yun Tsai, “A Low-Power Delay Buffer Using Gated Driver
Tree” IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,Vol. 17, No. 9, Sep. 2009.
[5] Hosain R, Wronshi L. D, and albicki A, “Low power design using double edge triggered flip-flop,”
IEEE Trans. Very Large Scale Integr. (VLSI ) Syst., Vol. 2, No. 2, Jun. 1994 pp. 261–265.
9. International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012
141
[6] Pastuszak G, “A high-performance architecture for embedded block coding in JPEG 2000,” IEEE
Trans. Circuits Syst. Video Technol., Vol. 15, No. 9, Sep. 2005, pp. 1182–1191.
[7] Ryan W. E, “An Introduction to LDPC Codes”, in CRC Handbook for Coding and Signal Processing
for Recording Systems (Ed. B. Vasic), CRC Press, 2004.
[8] Karkooti M, Cavallaro J.R, “Semi-Parallel Reconfigurable Architectures for Real-Time LDPC
Decoding”, ITCC 2004.
[9] Zhong H, Zhang T, “Design of VLSI Implementation-Oriented LDPC Codes”, IEEE Semiannual
Vehicular Technology Conference (VTC), Oct. 2003.
[10] Yeo E, Nikolic B, and Anantharam V, “Architectures and Implementations of Low-Density Parity
Check Decoding Algorithms”, IEEE International Midwest Symposium on Circuits and Systems,
August. 2002.
[11] Naeimi H and DeHon A, “Fault secure encoder and decoder for memory applications,” in Proc. IEEE
Int. Symp. Defect Fault Tolerance VLSI Syst., Sep. 2007, pp. 409–417.
[12] Howard S.L, Gaudet V.C, and Schlegal C, “Soft-Bit Decoding of Regular Low-Density Parity Check
Codes”, IEEE Transactions on Circuits and Systems.
[13] Naeimi H and DeHon A, “Fault-tolerant nano-memory with fault secure encoder and decoder,”
presented at the Int. Conf. Nano-Netw., Catania, Sicily, Italy, Sep. 2007.
[14] Piestrak S. J, Dandache A, and Monteiro F, “Designing fault-secure parallel encoders for systematic
linear error correcting codes,” IEEE Trans. Reliab., vol. 52, no. 4, Jul. 2003, pp. 492–500.
.[15] Lin S and Costello D. J, “Error Control Coding”, 2nd ed. Englewood Cliffs, NJ: Prentice-Hall, 2004.