Bypass diodes inserted across the strings of the solar panel arrays are essential to ensure the efficiency of the solar power system. However, those diodes are found to be susceptible to potential Electrostatic Discharge (ESD) events in the process of solar Photovoltaic (PV) panel manufacture, transportation and on-site installation. Please refer [1], where an International PV Module Quality Assurance Forum has been setup to investigate PV Module reliability, and Task Force 4 has been setting guidelines for testing the ESD robustness of diodes used to enhance PV panel performance. This document explains the theory behind the ESD damage and the proper test and analysis methods for ESD failure of diodes. To demonstrate the proposed testing methodology that follows, we will be evaluating six different types of diode models as supplied by our customer, who manufactures solar panel arrays.
TN006 frequency compensation method for vf-tlp measurementsWei Huang
The objective of this article is to demonstrate a frequency compensation technique for measuring the current and voltage of a device under test in a Very Fast Transmission Line Pulser (VF-TLP) test environment. The current measurement utilizes Non-Overlapping Time Domain Reflectometry, which is useful for On-Wafer testing because the measurement can be made with low profile small pitch probes, such as the Picoprobe Model 10. Further, to increase the bandwidth of the current measurement over common techniques, such as current transformers with 1GHz bandwidth, the method utilizes a resistive Pick-Off. The Pick-Off can be finely tuned to have as little insertion loss as possible, thereby enhancing the bandwidth. Although this method can also yield a DUT voltage measurement, the result suffers from numerical errors for low ohmic devices. A separate, direct measurement is presented that will demonstrate an extremely accurate voltage measurement that also utilizes frequency compensation.
This document compares ESD failure tests using different test methods: ESD gun simulator, Transmission Line Pulse (TLP), and Human Metal Model (HMM). A test IC (0531Z) was subjected to these tests. TLP and HMM tests both accurately predicted the failure levels observed in ESD gun testing. Specifically:
1. TLP testing at 100ns and 400ns pulses yielded failure levels of ±19A and ±11.5A respectively, matching the ESD gun failure levels of 10.5-13.5kV.
2. HMM testing with a 50ohm matched setup showed failure starting around 40A peak current, equivalent to 10-15kV E
This document describes characterizing touch panel sensor failures from electrostatic discharge (ESD) using current-voltage (IV) curve transient line pulse (TLP) testing. It outlines different ESD damage scenarios on touch panels and challenges with current testing methods. The presentation proposes using IV-TLP probing to inject ESD locally and measure current, allowing automated testing and analysis of ESD robustness for different failure modes like trace fusing or inter-trace breakdown. Example test setups and preliminary results are shown for single-trace and differential injection IV-TLP methods.
ESDEMC_PB2009.08 A Measurement Technique for ESD Current Spreading on A PCB u...ESDEMC Technology LLC
Abstract—Electrostatic discharge (ESD) can cause interference or damage in circuits in many ways e.g., by E- or Hfield coupling or via conduction paths. Although we can roughly estimate the voltage and current at the injection point during an ESD event, the real offending parameter is mostly the ESD current spreading throughout the system. Those currents can be simulated if great simplifications of the system are accepted.
However, even in moderately complex systems the ability to simulate is limited by lack of models and computational resources. Independent of the complexity, but obviously not free of its own limitations is a measurement technique that captures the current as a function of time and location through the system.
This article describes the proof on concept of ESD such a measurement technique that allows reconstructing the spreading current as a movie from magnetic field measurements. It details the technique, question of probe selection and how to process the data to present the current spread as a movie.
ESDEMC_PB2014.08 An Ethernet Cable Discharge Event (CDE) Test and Measurement...ESDEMC Technology LLC
This document describes a test and measurement system for cable discharge events (CDEs) on Ethernet cables. A CDE occurs when a charged Ethernet cable discharges to a connector. The system aims to reproduce real-world CDE conditions in the lab to test hardware immunity. It consists of a controller to set cable charge levels and control discharges, charge modules representing different cable types, and a failure test monitor. The controller controls each cable wire separately and measures discharge currents. Calibration with defined loads validated the system's functionality and output parameters.
Pb2003.01 problems with the electrostatic discharge (esd) immunity test in el...ESDEMC Technology LLC
Electrostatic discharge (ESD) immunity test is one of the important electromagnetic compatibility (EMC) tests. The IEC standard IECdlOOO-4-2 is the widely used standard to test the ESD immunity for electronic equipment. Many amendments such as amendment 1 (1998), amendment 2 (2000) have been published since 1995, but there is still problems with the ESD immunity test even with the 200x version. More than six ESD generators of different bands are tested for different equipment. The results show that the failure voltages of different ESD generators are vary much from different bands for the same test equipment. This may lead to the results incomparable when test the ESD immunity test in the EMC. Further studies show that there is a good correlation between the failure voltage and the induced voltage.
TN006 frequency compensation method for vf-tlp measurementsWei Huang
The objective of this article is to demonstrate a frequency compensation technique for measuring the current and voltage of a device under test in a Very Fast Transmission Line Pulser (VF-TLP) test environment. The current measurement utilizes Non-Overlapping Time Domain Reflectometry, which is useful for On-Wafer testing because the measurement can be made with low profile small pitch probes, such as the Picoprobe Model 10. Further, to increase the bandwidth of the current measurement over common techniques, such as current transformers with 1GHz bandwidth, the method utilizes a resistive Pick-Off. The Pick-Off can be finely tuned to have as little insertion loss as possible, thereby enhancing the bandwidth. Although this method can also yield a DUT voltage measurement, the result suffers from numerical errors for low ohmic devices. A separate, direct measurement is presented that will demonstrate an extremely accurate voltage measurement that also utilizes frequency compensation.
This document compares ESD failure tests using different test methods: ESD gun simulator, Transmission Line Pulse (TLP), and Human Metal Model (HMM). A test IC (0531Z) was subjected to these tests. TLP and HMM tests both accurately predicted the failure levels observed in ESD gun testing. Specifically:
1. TLP testing at 100ns and 400ns pulses yielded failure levels of ±19A and ±11.5A respectively, matching the ESD gun failure levels of 10.5-13.5kV.
2. HMM testing with a 50ohm matched setup showed failure starting around 40A peak current, equivalent to 10-15kV E
This document describes characterizing touch panel sensor failures from electrostatic discharge (ESD) using current-voltage (IV) curve transient line pulse (TLP) testing. It outlines different ESD damage scenarios on touch panels and challenges with current testing methods. The presentation proposes using IV-TLP probing to inject ESD locally and measure current, allowing automated testing and analysis of ESD robustness for different failure modes like trace fusing or inter-trace breakdown. Example test setups and preliminary results are shown for single-trace and differential injection IV-TLP methods.
ESDEMC_PB2009.08 A Measurement Technique for ESD Current Spreading on A PCB u...ESDEMC Technology LLC
Abstract—Electrostatic discharge (ESD) can cause interference or damage in circuits in many ways e.g., by E- or Hfield coupling or via conduction paths. Although we can roughly estimate the voltage and current at the injection point during an ESD event, the real offending parameter is mostly the ESD current spreading throughout the system. Those currents can be simulated if great simplifications of the system are accepted.
However, even in moderately complex systems the ability to simulate is limited by lack of models and computational resources. Independent of the complexity, but obviously not free of its own limitations is a measurement technique that captures the current as a function of time and location through the system.
This article describes the proof on concept of ESD such a measurement technique that allows reconstructing the spreading current as a movie from magnetic field measurements. It details the technique, question of probe selection and how to process the data to present the current spread as a movie.
ESDEMC_PB2014.08 An Ethernet Cable Discharge Event (CDE) Test and Measurement...ESDEMC Technology LLC
This document describes a test and measurement system for cable discharge events (CDEs) on Ethernet cables. A CDE occurs when a charged Ethernet cable discharges to a connector. The system aims to reproduce real-world CDE conditions in the lab to test hardware immunity. It consists of a controller to set cable charge levels and control discharges, charge modules representing different cable types, and a failure test monitor. The controller controls each cable wire separately and measures discharge currents. Calibration with defined loads validated the system's functionality and output parameters.
Pb2003.01 problems with the electrostatic discharge (esd) immunity test in el...ESDEMC Technology LLC
Electrostatic discharge (ESD) immunity test is one of the important electromagnetic compatibility (EMC) tests. The IEC standard IECdlOOO-4-2 is the widely used standard to test the ESD immunity for electronic equipment. Many amendments such as amendment 1 (1998), amendment 2 (2000) have been published since 1995, but there is still problems with the ESD immunity test even with the 200x version. More than six ESD generators of different bands are tested for different equipment. The results show that the failure voltages of different ESD generators are vary much from different bands for the same test equipment. This may lead to the results incomparable when test the ESD immunity test in the EMC. Further studies show that there is a good correlation between the failure voltage and the induced voltage.
The document discusses condition monitoring technologies for rotating equipment. It provides an overview of partial discharge monitoring, including how partial discharge is measured, different sensor types, and factors that affect measurements. Monitoring partial discharge can help detect insulation degradation in rotating machines before failures occur, allowing users to increase reliability and safety while reducing costs.
VLF Testing of Cables Using IEEE 400.2. Presentation by John Densley that describes the in situ testing of distribution cables using very low frequency (VLF) voltages according to IEEE Standard 400.2. The Standard includes criteria to assess the condition of XLPE, EPR and paper insulated cable circuits. How the criteria were established and their limitations will be discussed, along with Partial Discharge (PD) testing using VLF.
John, the President of ArborLec Solutions Inc. has worked on electrical ageing mechanism and diagnostics techniques in electrical insulation for more than 35 years. He has a sound practical and theoretical knowledge of ageing and failure mechanisms of insulation systems in high voltage equipment such as medium and high voltage cables, transformers and switchgears.
1. The document describes an Ethernet Cable Discharge Event (CDE) test and measurement system.
2. The system aims to simulate and analyze ESD events from charged Ethernet cables. It includes modules to charge different cable types and arrangements and control the discharge sequence.
3. Key features allow testing of various cable setups, controlling the status of each wire, monitoring discharge waveforms, and remote control integration. Calibration components and procedures are also described.
This document discusses improving substation reliability and availability. It describes electrical events that occurred after an expansion at a refinery, highlighting issues with microprocessor relays, control power supplies, and time synchronization. The importance of substation documentation, automation, data retrieval, monitoring, and critical auxiliaries is discussed. Reliability calculations are shown to not fully account for hidden failures and varying operating conditions. Overall recommendations are made to establish best practices for documentation, configuration, monitoring, and addressing reliability more holistically.
This document provides an overview of EMC design fundamentals. It discusses the importance of EMC compliance and problems with non-compliance. Key concepts such as electromagnetic interference, electromagnetic compatibility, and coupling paths are defined. Common EMC standards from organizations like the FCC, military, and EU are summarized. The document outlines EMC design methodology, including topics like shielding, layout and partitioning, power distribution, and signal distribution. It also briefly discusses the EMC design process and provides references.
Results of 10 years after installation tests with partial discharge detection...HighVoltageDUT
In 2004 Alliander decided to add partial discharge (PD) measurements in their after installation test policy. Over the last years, dozens of accessories and a few cable parts were taken out of the tested cables, based on PD activity, measured during after installation test. In many cases severe abnormalities were found, threatening the reliability of the cable system, but also cases were found where the reason for PD was not clear. It is also discovered that cable systems can contain PD’s in accessories but still survive the after installation test.
Partial Discharge Detection Products by EA TechnologyRyan McFallo
EA Technology is the global leader in MV Partial Discharge detection. EA’s unique technology allows real time partial discharge detection and monitoring without interrupting service, EA also provides on-site partial discharge surveys.
Would you like to learn more about partial discharge detection and monitoring products/services?
Visit Technical Sales-Northwest at http://www.techsalesnw.com
Nd At S Best Practices For Single Mode Tier I Ii Testing 01 2011Dean Murray
1. The document outlines best practices for tier 1 and tier 2 fiber optic cable testing, including cleaning connectors, visual inspections, optical loss testing, and optical time domain reflectometer (OTDR) testing.
2. It describes how to set a single jumper reference for optical loss testing and how to generate an OTDR baseline trace to identify anomalies like splices, connections, and reflections.
3. Proper techniques for cleaning connectors, setting references, analyzing OTDR traces, and identifying common anomalies are discussed to ensure accurate fiber testing.
Assuring Reliability of Critical Power Cable Systemsmichaeljmack
The document discusses testing methods for assuring the reliability of critical power cable systems. It states that high potential (HIPOT) tests are intentionally destructive and do not assure reliability. The best practice for assuring a cable system meets its design life is repeating the manufacturer's offline 50/60Hz partial discharge (PD) quality control test in the field, as this is the only effective way to assure the insulation system meets specifications. Over the last decade, one diagnostic technology, defect specific diagnostics (DSD), has been proven to effectively reproduce comparable factory test results in the field.
This document provides an introduction to concepts and techniques for electromagnetic interference (EMI) in switched mode power supplies (SMPS). It discusses EMI and electromagnetic compatibility (EMC) standards, types of noise signals, common noise countermeasures like shields and filters, magnetic field and flux basics, core materials and their properties, and common mode chokes. The focus is on helping designers understand and mitigate EMI in their power supply designs.
Inspect solar panel bypass diodes for opens and shorts in broad daylight without covering panels
INSPECT SOLAR PANEL BYPASS DIODES FOR OPENS AND SHORTS IN BROAD DAYLIGHT WITHOUT COVERING PANELS
Traditionally, bypass diodes can only be inspected for good working condition at night or when power is not being generated by the solar panels in order to verify that any applied current is guided past the solar cells.
With the FT4310, you can detect for open faults even when the sun is out without covering the panels.
Testing can also be performed at night.
*Testing for short-circuit faults can only be performed during the day.
Fiber optic cable testing involves measuring several key parameters:
1) Optical power levels using a power meter and light source to check for attenuation or loss in fibers and connectors.
2) Back reflection or return loss using an OTDR or OCWR to measure reflections at splices or connectors.
3) Fault location using an OTDR, VFL, or microscope to identify breaks, damage or contamination.
Proper testing ensures fiber optic networks are functioning within specifications.
The document discusses partial discharge testing of electrical insulation. It describes the common test setup which uses a step-up transformer, coupling capacitor, measuring impedance and PD meter. The test involves energizing machine windings individually and measuring partial discharges. PD readings can indicate insulation defects and be plotted against voltage. Oscilloscopes may also be used to analyze pulse shapes and positions. Proper safety precautions are required as high voltages are used.
On-Chip ESD Protection with Improved High Holding Current SCR (HHISCR) Achiev...Sofics
For the design of on‐chip ESD clamps against system level ESD stress three main challenges exist: reach a high failure current, ensure latch‐up immunity and limit transient overshoots. Bearing these in mind, high system level ESD requirements should be within reach. A novel improved high holding current SCR is introduced fulfilling all three requirements within drastically reduced silicon area.
Structural Health Monitoring of Bridges Buildings and Industrial Plant with N...Polytec, Inc.
Learn about Polytec’s latest laser vibrometer, specifically designed for remote, long range vibration and deflection measurements on bridges, buildings, towers, industrial plant, high voltage insulators or indeed any surface that is inaccessible or hard to reach. The system features a very high optical sensitivity, which means that it can also be used on surfaces at distances that would otherwise require surface treatment for vibrometry measurement. The webinar will share examples showing how the RSV-150 saves time and effort when monitoring the health of structures, including the measurement of resonant frequencies and deflections of bridges subjected to traffic loading. Find out how the laser Doppler approach compares with the alternative contacting and remote sensing methods.
This document proposes a novel methodology for integrating on-chip power noise measurement (OCM) into the standard testing flow for hardware security and trust evaluation. It demonstrates that OCM provides higher quality side-channel traces than traditional measurement methods. It then proposes for the first time using OCM to establish a standard side-channel measurement setup, and provides a methodology to integrate hardware security and trust validation into the standard testing process using OCM.
This document discusses voltage testing and partial discharge measurement techniques for power cable accessories. It provides:
1) An overview of the objective to compare cable testing best practices and determine cable defects using partial discharge methods.
2) A description of an ACRF test system used, including its components like an HV reactor, control unit, and voltage divider.
3) Details on partial discharge measurement methods like using high frequency current transformers and coupling capacitors to detect discharges in cables.
4) The conclusion that resonant testing between 20-300Hz along with partial discharge detection reduces risks from cable systems after installation by locating faults.
This document discusses AC line filtering and EMI suppression. It provides information on nominal mains voltages and tolerances, and how using passive electric components like capacitors and inductors can suppress high frequency noise. It describes the working principles of capacitors and chokes, and how filters combine these components. The document also gives an overview of Kemet's capacitor, choke, and filter solutions for EMI filtering, including product types, specifications, testing capabilities, and considerations for building vs. buying filters.
1) The document discusses online partial discharge (PD) measurement of medium voltage and high voltage power cables to prevent unplanned outages. It describes PD theory, cable structures, sensors used for online PD detection, and case studies demonstrating the technology.
2) Qualitrol offers both portable and permanent online PD monitoring systems using sensors like high frequency current transformers and transient earth voltage sensors to detect PD pulses in energized cables.
3) Case studies demonstrate the system separating noise from PD signals to accurately detect and locate incipient faults in cables in high noise environments like GIS substations and switchgear.
Behavioral studies of surge protection componentsjournalBEEI
In our daily life, almost all the items we used, being a computer, television, lift or vehicle we drive consist of some kind of electrical or electronics component inside. The operation of these devices could be severely affected by lightning activity or electrical switching events, as there are more than 2000 thunderstorms in progress at any time resulting in 100 lightning flashes to ground per second. In practice, any device using electricity will subject to surge damages induced from the lightning or switching of heavy load. Surge protection device (SPD) is added at the power distribution panel and critical process loop to prevent damage subsequently cause plant shutdown. There are many questions raised on the SPD. How can this small device protect the equipment from large energy release by the lightning? What is inside the device? How does it work? This paper provides comprehensive detail in revealing the science and engineering behind the SPD, its individual component characteristic and how does it work. The technical information presented is limited to surge protection on equipment; surge protection for building structure will not be discussed here.
The document provides an overview of partial discharge detection as part of condition-based maintenance of electrical equipment. It discusses concepts like partial discharge mechanisms, the components used for partial discharge detection, and how online partial discharge detection can help monitor insulation health and provide early warnings of degradation. The document also covers topics like common types of partial discharges, how insulation defects can lead to partial discharges, and how partial discharges gradually deteriorate insulation over time if not addressed.
The document discusses condition monitoring technologies for rotating equipment. It provides an overview of partial discharge monitoring, including how partial discharge is measured, different sensor types, and factors that affect measurements. Monitoring partial discharge can help detect insulation degradation in rotating machines before failures occur, allowing users to increase reliability and safety while reducing costs.
VLF Testing of Cables Using IEEE 400.2. Presentation by John Densley that describes the in situ testing of distribution cables using very low frequency (VLF) voltages according to IEEE Standard 400.2. The Standard includes criteria to assess the condition of XLPE, EPR and paper insulated cable circuits. How the criteria were established and their limitations will be discussed, along with Partial Discharge (PD) testing using VLF.
John, the President of ArborLec Solutions Inc. has worked on electrical ageing mechanism and diagnostics techniques in electrical insulation for more than 35 years. He has a sound practical and theoretical knowledge of ageing and failure mechanisms of insulation systems in high voltage equipment such as medium and high voltage cables, transformers and switchgears.
1. The document describes an Ethernet Cable Discharge Event (CDE) test and measurement system.
2. The system aims to simulate and analyze ESD events from charged Ethernet cables. It includes modules to charge different cable types and arrangements and control the discharge sequence.
3. Key features allow testing of various cable setups, controlling the status of each wire, monitoring discharge waveforms, and remote control integration. Calibration components and procedures are also described.
This document discusses improving substation reliability and availability. It describes electrical events that occurred after an expansion at a refinery, highlighting issues with microprocessor relays, control power supplies, and time synchronization. The importance of substation documentation, automation, data retrieval, monitoring, and critical auxiliaries is discussed. Reliability calculations are shown to not fully account for hidden failures and varying operating conditions. Overall recommendations are made to establish best practices for documentation, configuration, monitoring, and addressing reliability more holistically.
This document provides an overview of EMC design fundamentals. It discusses the importance of EMC compliance and problems with non-compliance. Key concepts such as electromagnetic interference, electromagnetic compatibility, and coupling paths are defined. Common EMC standards from organizations like the FCC, military, and EU are summarized. The document outlines EMC design methodology, including topics like shielding, layout and partitioning, power distribution, and signal distribution. It also briefly discusses the EMC design process and provides references.
Results of 10 years after installation tests with partial discharge detection...HighVoltageDUT
In 2004 Alliander decided to add partial discharge (PD) measurements in their after installation test policy. Over the last years, dozens of accessories and a few cable parts were taken out of the tested cables, based on PD activity, measured during after installation test. In many cases severe abnormalities were found, threatening the reliability of the cable system, but also cases were found where the reason for PD was not clear. It is also discovered that cable systems can contain PD’s in accessories but still survive the after installation test.
Partial Discharge Detection Products by EA TechnologyRyan McFallo
EA Technology is the global leader in MV Partial Discharge detection. EA’s unique technology allows real time partial discharge detection and monitoring without interrupting service, EA also provides on-site partial discharge surveys.
Would you like to learn more about partial discharge detection and monitoring products/services?
Visit Technical Sales-Northwest at http://www.techsalesnw.com
Nd At S Best Practices For Single Mode Tier I Ii Testing 01 2011Dean Murray
1. The document outlines best practices for tier 1 and tier 2 fiber optic cable testing, including cleaning connectors, visual inspections, optical loss testing, and optical time domain reflectometer (OTDR) testing.
2. It describes how to set a single jumper reference for optical loss testing and how to generate an OTDR baseline trace to identify anomalies like splices, connections, and reflections.
3. Proper techniques for cleaning connectors, setting references, analyzing OTDR traces, and identifying common anomalies are discussed to ensure accurate fiber testing.
Assuring Reliability of Critical Power Cable Systemsmichaeljmack
The document discusses testing methods for assuring the reliability of critical power cable systems. It states that high potential (HIPOT) tests are intentionally destructive and do not assure reliability. The best practice for assuring a cable system meets its design life is repeating the manufacturer's offline 50/60Hz partial discharge (PD) quality control test in the field, as this is the only effective way to assure the insulation system meets specifications. Over the last decade, one diagnostic technology, defect specific diagnostics (DSD), has been proven to effectively reproduce comparable factory test results in the field.
This document provides an introduction to concepts and techniques for electromagnetic interference (EMI) in switched mode power supplies (SMPS). It discusses EMI and electromagnetic compatibility (EMC) standards, types of noise signals, common noise countermeasures like shields and filters, magnetic field and flux basics, core materials and their properties, and common mode chokes. The focus is on helping designers understand and mitigate EMI in their power supply designs.
Inspect solar panel bypass diodes for opens and shorts in broad daylight without covering panels
INSPECT SOLAR PANEL BYPASS DIODES FOR OPENS AND SHORTS IN BROAD DAYLIGHT WITHOUT COVERING PANELS
Traditionally, bypass diodes can only be inspected for good working condition at night or when power is not being generated by the solar panels in order to verify that any applied current is guided past the solar cells.
With the FT4310, you can detect for open faults even when the sun is out without covering the panels.
Testing can also be performed at night.
*Testing for short-circuit faults can only be performed during the day.
Fiber optic cable testing involves measuring several key parameters:
1) Optical power levels using a power meter and light source to check for attenuation or loss in fibers and connectors.
2) Back reflection or return loss using an OTDR or OCWR to measure reflections at splices or connectors.
3) Fault location using an OTDR, VFL, or microscope to identify breaks, damage or contamination.
Proper testing ensures fiber optic networks are functioning within specifications.
The document discusses partial discharge testing of electrical insulation. It describes the common test setup which uses a step-up transformer, coupling capacitor, measuring impedance and PD meter. The test involves energizing machine windings individually and measuring partial discharges. PD readings can indicate insulation defects and be plotted against voltage. Oscilloscopes may also be used to analyze pulse shapes and positions. Proper safety precautions are required as high voltages are used.
On-Chip ESD Protection with Improved High Holding Current SCR (HHISCR) Achiev...Sofics
For the design of on‐chip ESD clamps against system level ESD stress three main challenges exist: reach a high failure current, ensure latch‐up immunity and limit transient overshoots. Bearing these in mind, high system level ESD requirements should be within reach. A novel improved high holding current SCR is introduced fulfilling all three requirements within drastically reduced silicon area.
Structural Health Monitoring of Bridges Buildings and Industrial Plant with N...Polytec, Inc.
Learn about Polytec’s latest laser vibrometer, specifically designed for remote, long range vibration and deflection measurements on bridges, buildings, towers, industrial plant, high voltage insulators or indeed any surface that is inaccessible or hard to reach. The system features a very high optical sensitivity, which means that it can also be used on surfaces at distances that would otherwise require surface treatment for vibrometry measurement. The webinar will share examples showing how the RSV-150 saves time and effort when monitoring the health of structures, including the measurement of resonant frequencies and deflections of bridges subjected to traffic loading. Find out how the laser Doppler approach compares with the alternative contacting and remote sensing methods.
This document proposes a novel methodology for integrating on-chip power noise measurement (OCM) into the standard testing flow for hardware security and trust evaluation. It demonstrates that OCM provides higher quality side-channel traces than traditional measurement methods. It then proposes for the first time using OCM to establish a standard side-channel measurement setup, and provides a methodology to integrate hardware security and trust validation into the standard testing process using OCM.
This document discusses voltage testing and partial discharge measurement techniques for power cable accessories. It provides:
1) An overview of the objective to compare cable testing best practices and determine cable defects using partial discharge methods.
2) A description of an ACRF test system used, including its components like an HV reactor, control unit, and voltage divider.
3) Details on partial discharge measurement methods like using high frequency current transformers and coupling capacitors to detect discharges in cables.
4) The conclusion that resonant testing between 20-300Hz along with partial discharge detection reduces risks from cable systems after installation by locating faults.
This document discusses AC line filtering and EMI suppression. It provides information on nominal mains voltages and tolerances, and how using passive electric components like capacitors and inductors can suppress high frequency noise. It describes the working principles of capacitors and chokes, and how filters combine these components. The document also gives an overview of Kemet's capacitor, choke, and filter solutions for EMI filtering, including product types, specifications, testing capabilities, and considerations for building vs. buying filters.
1) The document discusses online partial discharge (PD) measurement of medium voltage and high voltage power cables to prevent unplanned outages. It describes PD theory, cable structures, sensors used for online PD detection, and case studies demonstrating the technology.
2) Qualitrol offers both portable and permanent online PD monitoring systems using sensors like high frequency current transformers and transient earth voltage sensors to detect PD pulses in energized cables.
3) Case studies demonstrate the system separating noise from PD signals to accurately detect and locate incipient faults in cables in high noise environments like GIS substations and switchgear.
Behavioral studies of surge protection componentsjournalBEEI
In our daily life, almost all the items we used, being a computer, television, lift or vehicle we drive consist of some kind of electrical or electronics component inside. The operation of these devices could be severely affected by lightning activity or electrical switching events, as there are more than 2000 thunderstorms in progress at any time resulting in 100 lightning flashes to ground per second. In practice, any device using electricity will subject to surge damages induced from the lightning or switching of heavy load. Surge protection device (SPD) is added at the power distribution panel and critical process loop to prevent damage subsequently cause plant shutdown. There are many questions raised on the SPD. How can this small device protect the equipment from large energy release by the lightning? What is inside the device? How does it work? This paper provides comprehensive detail in revealing the science and engineering behind the SPD, its individual component characteristic and how does it work. The technical information presented is limited to surge protection on equipment; surge protection for building structure will not be discussed here.
The document provides an overview of partial discharge detection as part of condition-based maintenance of electrical equipment. It discusses concepts like partial discharge mechanisms, the components used for partial discharge detection, and how online partial discharge detection can help monitor insulation health and provide early warnings of degradation. The document also covers topics like common types of partial discharges, how insulation defects can lead to partial discharges, and how partial discharges gradually deteriorate insulation over time if not addressed.
This document provides an overview of Littelfuse's transient voltage suppression (TVS) diode products and design support services. It includes:
1) A table of contents listing TVS diode product series and their datasheet page numbers. Product series are grouped by package type - surface mount or axial leaded.
2) Brief descriptions of common transient voltage threats like electrostatic discharge, inductive load switching, and lightning-induced transients. It provides examples of the voltage, current, rise time and duration of these events.
3) Definitions of key TVS diode terms and parameters to consider when selecting a product, such as operating temperature range, capacitance, and reverse standoff voltage.
Radiation Hardening by Design is one of the hardware based solution to one of the most troublesome problem faced by digital circuits in the space.
RHBD provides varieties of techniques to make the circuit resilient towards such effects and ensures proper malfunctioning of the circuit.
An Ethernet Cable Discharge Event (CDE) Test and Measurement SystemESDEMC Technology LLC
This document describes a test system for measuring Cable Discharge Events (CDEs) on Ethernet cables. CDEs occur when charged Ethernet cables are connected to devices and can damage electronics if not properly handled. The proposed test system aims to reproduce real-world CDE scenarios in the lab by controlling cable charge levels, cable types, contact sequences and timings, and electrical characteristics of the discharge path. This will allow engineers to test designs under repeatable CDE conditions and improve immunity. Key parts of the system include a controller to set test parameters, a charge module representing different cable types, and monitors to check for failures.
Surge Protect, a critical issue you could not fail to know while implementing...Victor Lee
How high should we aim? Sparkovers (flashovers) which occur almost naturally in building wiring systems protect most equipment locations for surges above 6kV. So 6kV is the upper limit we should be concerned about. Note that poor or mediocre wiring insulation materials ironically help protect equipment better than excellent and expensive insulator materials.
There is increasing talk about “6kV surge protection”. We now realize why 6kV is being picked. However, we should keep in mind that so far such requirements are voluntary. But even if they do become mandatory, note that there are already designated “levels” of surge withstand capability: 2.5kV, 4kV, and 6kV, similar to CISPR 24. So it is probable that much like with CISPR 24/EN55024 we may only need to comply with a level lesser than max.
The document provides a comprehensive review of power quality site surveys conducted from 1960-1990. It finds that results from different surveys appeared inconsistent due to differences in instrument thresholds and definitions of disturbances like "surge." It introduces the term "swell" to distinguish a temporary overvoltage from a surge. The paper analyzes nine surveys to reconcile differences, calling for improved measurement methods and definitions to provide more consistent reporting of power disturbances.
This document provides an overview of surge protection devices (SPDs), including their selection, application and operating theory. It discusses the sources and types of transient overvoltages that can damage electrical equipment. SPDs help mitigate these dangers by limiting transient voltage spikes. The document reviews relevant lightning and surge protection standards like BS EN 62305 and BS 7671. It examines SPD types, design considerations, installation best practices, inspection and testing procedures. Protection against overcurrents and coordination of multiple SPDs is also covered.
Electrostatic Discharge (ESD) Protection for a Laser Diode Ignited Actuator Tsuyoshi Horigome
This document summarizes a report on developing an electrostatic discharge (ESD) protection circuit for a laser diode ignited actuator. The protection circuit uses a transient voltage suppressor to clamp the voltage from ESD pulses and reduce current flow through the laser diode. Testing showed the protection circuit prevented laser diode failures from ESD pulses equivalent to a severe human body discharge. The protection circuit design allows compatibility with different firing systems without redesign.
Underground Cable Fault Detection Using IOTIRJET Journal
This document discusses a system to detect faults in underground cable lines using IoT. It proposes using a microprocessor, LCD display, fault sensing circuit module, LoRa module, and power supply to detect the location and type of fault (single line to ground, double line to ground, or three phase faults). The system measures voltage changes across series resistors when a short circuit occurs to determine the fault location. It can display the fault location and phase on the LCD and transmit the data over WiFi. The document reviews literature on condition monitoring of underground cables, current transformer saturation effects, and comparing optical and magnetic current transformers.
IRJET - Transmission Line Fault Classification using DWTIRJET Journal
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TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
1. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 1
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
ESD Failure Analysis of PV Module Diodes
and TLP Test Method
`
1. Introduction
Bypass diodes inserted across the strings of the solar panel arrays are essential to ensure the
efficiency of the solar power system. However, those diodes are found to be susceptible to potential
Electrostatic Discharge (ESD) events in the process of solar Photovoltaic (PV) panel manufacture,
transportation and on-site installation. Please refer [1], where an International PV Module Quality
Assurance Forum has been setup to investigate PV Module reliability, and Task Force 4 has been setting
guidelines for testing the ESD robustness of diodes used to enhance PV panel performance. This
document explains the theory behind the ESD damage and the proper test and analysis methods for ESD
failure of diodes. To demonstrate the proposed testing methodology that follows, we will be evaluating
six different types of diode models as supplied by our customer, who manufactures solar panel arrays.
1.1 Bypass and Blocking Diodes in Solar Panel Arrays
To help maintain the efficiency and performance of solar panel arrays it is common for bypass diodes
to be inserted across individual PV panels, and blocking diodes to be inserted in series with a string of
panels that are used in a parallel array. Figure 1 demonstrates how these diodes are inserted into a panel
array [2].
How could ESD damage happened?
What is Cable Discharge Event?
What is Transmission Line Pulse test?
2. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 2
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
Figure 1 Solar PV Module bypass and blocking diode connections
The bypass diodes provide a current path around a shaded or damaged panel, and if these are not
installed, the panel will act like a high impedance load when shaded. This effectively reduces the series
string output as the current produced by the remaining series connected panels will be forced to go
through the shaded panel, thereby reducing the voltage output of the string.
If the bypass diodes are installed, and one of them fails due to ESD, it typically fails to a short circuit.
When this happens, a scenario, as shown in Figure 2, can occur. The shorted diode does not allow any
power produced by its panel to enter the system, thereby lowering system efficiency.
Figure 2 ESD damaged bypass diode fails short, disable the PV module and lowering system efficiency
3. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 3
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
Figure 3 ESD damaged blocking diode fails short, allowing battery discharge path at night
Blocking diodes keep current from the battery pack, or a parallel panel string from entering a
damaged string. This is important at night when the panel array cannot provide any power, thus
providing a path for the battery to discharge. When installed, the blocking diodes may have leakage
current on the order of nano- or micro-amps. However, if they fail due to ESD, they typically fail to a
short circuit providing another path for the battery to discharge. This discharge current can be milli-amps
or amps. An example of this failure scenario is shown in Figure 3.
Failure of even one of these diodes in the field is very expensive for companies to replace due to
the need for a qualified service technician, as most installations will require code requirements to be
met. Continued operation of the panel array with a damaged bypass or blocking diode will, at best,
hamper the array’s efficiency and, at worst, cause permanent damage as it consumes power rather than
produces power. It has been proposed that the damage to the diodes is caused by electrostatic discharge
(ESD) stress.
1.2 What is ESD and how it damage the solar PV module diodes
Electrostatic discharge is the sudden flow of electricity between two electrically charged objects
caused by contact, an electrical short, or dielectric breakdown [3]. Electrostatic discharge stress can
occur in many forms and, depending on the characteristics of the stress, can damage different parts of
solar PV module subjected to the stress. In particular, there are several ESD models with industrial
standards that describe the pulse shape, source impedance, and determines levels at which the device
should survive.
The commonly used ESD models are the Human-Metal Model (HMM) (IEC 61000-4-2 for system
level ESD testing or ANSI/ESD SP5.6-2009 for component level ESD testing), the Human-Body Model
4. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 4
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
(HBM) for component level ESD testing (ANSI/ESDA/JEDEC JS-001-2014), and the Charged-Device Model
(CDM) for device level ESD testing (ANSI/ESDA/JEDEC JS-002-2014). There is also the Machine Model
(MM), but it has been discontinued due to poor repeatability. Further, a new ESD model that currently
has no established industrial standard, but has a different damage effect is the Cable Discharge Event
(CDE).
ESD Model Short Applied DUT Latest Industrial Standard Comments
Human Metal Model (HMM) System level IEC 61000-4-2 ED. 2.0 B:2008 Widely used standard
Component level ANSI/ESD SP5.6-2009 Pending to be a standard
Human Body Model (HBM) Component level ANSI/ESDA/JEDEC JS-001-2014 Widely used standard
Charged Device Model (CDM) Device level ANSI/ESDA/JEDEC JS-002-2014 Widely used standard
Machine Model (MM) Component level ANSI/ESD STM5.2-2012 Discontinued
Transmission Line Pulse (TLP) Component level ANSI/ESD STM5.5.1-2014 Widely used standard
Cable Discharge Event (CDE) System level NA Hard to be defined
Table 1 Wide used ESD models, data compiled 2015.Sep
Human Metal Model (HMM)
The human-metal ESD can take place when a charged person holding a pointed metal object, like a
screwdriver or a ballpoint pen, rapidly moves the hand against an electronic device. In regard to PV
module bypass and blocking diodes, this type of ESD events would most likely occur during junction box
assembly with metal tools like tweezers, pliers, or screw drivers, etc. Figure 4 demonstrates a HMM
event between a screwdriver and a screw that is part of an electrical installation in the junction box .
Figure 4 HMM event between a screwdriver and a screw that is part of an electrical installation in the junction box
Human-Body Model (HBM)
Human-body model simulates the transfer of charge from a human to a component, such as through
a fingertip as a device is picked up. This model is one of the most commonly used ESD tests for
component qualification. In regard to PV module bypass and blocking diodes, this type of ESD event
5. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 5
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
would also most likely occur during junction box assembly, especially if the operator picks a diode and
mounts it by hand into the junction box. Figure 5 demonstrates a personnel picking up a PV module
diode with bare fingers.
Figure 5 Potential ESD from HBM, Picking up the diodes
Charged-Device Model (CDM)
Charged-device model simulates the transfer of charge from a device to ground. A device can collect
charge by sliding across a surface and then discharged by contact to a metal surface or ground [6]. In
regard to PV module bypass and blocking diodes, this type of ESD event would most likely occur during
junction box assembly.
Figure 6 Solar PV module diode drops onto grounded metal surface
Transmission Line Pulse (TLP)
The TLP technique is based on charging a transmission line to a pre-determined voltage, and
discharging it into a DUT. The cable discharge emulates an electro-static discharge event that has better
defined RF signal path, controllable rise-time, and pulse width. The test setup allows transient current
and voltage waveform to be monitored therefore the change of the DUT impedance can be monitored
as a function of time in ps details. The DUT performance degrade or failure check can be automated with
RF high voltage switch and help the system with faster ESD performance analysis. Regarding to the PV
6. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 6
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
module diodes, this model is not a real-world event as the transmission line would not be well defined
as the TLP model, but the type of waveform is relatively similar to Cable Discharge Events (CDE) during
the PV module on-site installation process.
Cable Discharge Event (CDE)
Cable discharge event is a frequent real-world electrostatic discharge event that occurs when a cable
is connected onto a device and the cable has existing charge prior to making the connection. This can
also happen by connecting a charged cable (open on one end) to a device. It occurs because there is a
potential differential between the charge on the cable to be connected and the device. The resulting
waveform is highly dependent on the real-world current return path and specifications of the cable.
However, these events usually have a fast rise time of less than 500ps, potential for high current that
can reach over 100 Amperes, and a potential long pulse that can be several µs if the discharging cables
are long. The fast rise time, high current, and long pulse duration can result in a permanent performance
degrade or physical damage of device being subjected. Regarding to solar PV module, the cable
connections between the panels can be very long as figure 7 shows, resulting the ESD current waveform
could be very different from all previous cases. Because cable connection is an avoidable on-site
installation process, cable discharge event should be treated as a special ESD case with special test setup
for the PV module diodes quality assurance.
7. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 7
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
Figure 7 Long cables at a PV system setup can be charged and discharged during installation
Although these ESD models describe how an ESD stress event may originate, the underlying
physics of these models point to two basic damage causes. Damage may occur as the device cannot
withstand the extremely fast voltage transient, or a device is not able to handle the current or the heating
caused by the current. Here the heating occurs within nanoseconds, such that there is no thermal
exchange with the surrounding. Further, the current distribution within the conduction area of thethe
device may not be homogeneous, such that local melting (“filament creation”) leads to damage at
current levels that the device could handle, if the current would flow with equal current density in the
device. The CDM model is used to qualify a device for the first of these damage types in that a very fast
rise time as 100 ps with a short duration pulse. This test can determine if the gate oxide layer of a
component is susceptible to a CDM type of event. The HBM model is used to qualify a device for the
latter of the damage types in which a long duration (100ns) pulse is applied. The HMM, CDE and TLP
model could possibly contain both types of damage. However, CDE or TLP type of model would result in
the worst possible damage in all of the casescases discussed above.
Some examples of damage to the semiconductor components are shown in Figures 8 and 9.
Figure 8 demonstrates a fused internal connection of a transistor as a result of being zapped by an ESD
pulse. Figure 9 demonstrates burn track damage on a Schottky chip caused by ESD. Schottky technology
is commonly found in solar PV module bypass and blocking diode manufacturing.
8. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 8
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
Figure 8 Burn Trace on the Schottky Chip Caused by ESD
2. The Transmission Line Pulse Test Methodology
Given the nature of how the bypass and blocking diodes could be exposed to and damaged by ESD
events, the worst case that would be the Cable Discharge Event, in which both fast rise-time and high
energy pulses occur during the installation process. Therefore, based on the existing industrial ESD
testing methods, we propose to use the transmission line pulse test method that does not necessarily
replace the IEC 61000-4-2 standard, which may have been be used in the current qualification process.
Instead, the TLP test method subject a diode (a low resistance DUT) to a faster rise-time and higher
energy pulse up to 180A (pulse reflections being allowed to approach the real-world CDE case). This
provides a fully automated device ESD performance characterization system for transient IV signal and
degrade/failure inspection before and after each pulse. Compared to the other types of ESD models, the
advantages of using a TLP test are:
Well Defined Consistent Waveform Shape
Both circuit and waveform defined in ESD simulator standards are too flexible (no impedance control for
test path, 30% tolerance at only certain time …) This causes ESD simulators to provide very different ESD
test results between different test sites. A TLP pulse is very clean and consistent.
Highly Repeatable Test Setup
Fatigue from holding ESD simulator by hand can lead to inconsistent test setups. In TLP testing with Jigs
for mounting the DUT, a more controlled test is obtained.
Fast Automatic Measurement and Reporting
Typical TLP testing is done with full automatic control of Oscilloscope Scale Adjustment, Voltage Pulsing,
Failure Criteria Checking, and IV Curve update.
Important Device Behavior is recorded for ESD analysis and design
Many useful parameters can be extracted from TLP tests for device transient behavior analysis, modeling
and System-Efficient ESD Design (SEED). Traditional ESD tests only generate pulse for Pass/Fail results.
9. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 9
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
2.1 Test Setup
The TLP test setup is shown in Figure 9. A Transmission Line Pulse (TLP) generator provides a
rectangular voltage pulse by charging a 50Ω transmission line to a test voltage, and discharging the pulse
to the DUT by a special relay which can withstand the voltage, and can switch to an on-‘on ‘status without
bouncing. The pulse then travels out of the TLP through a coaxial transmission line where it first reaches
a high voltage relay (A621-HVLKR). This relay is capable of withstanding up to 10kV, and is required for
the high current TLP testing used with these high power diodes. The relay provides a means of
transferring connection of the DUT between TLP Measurement System and the Failure Detection
System. In particular, during TLP pulsing, the relay connects the DUT to the TLP, the measurement
probes, and the oscilloscope. After each TLP pulse test waveform has been captured, the system
switches the DUT to the SMU to measure the diode reverse leakage current at Maximum Recurrent Peak
Reverse Voltage (VRRM). The A621-LTKSEM leakage test module also helps to facilitate these connection
changes on the low voltage side of the measurement probes.
The DUT current is measured indirectly using a resistive tee to voltage measurement. The current is
recovered by the overlapping reflection method. This method measures both the current through and
the voltage across the DUT, but for low-resistance devices, such as a diode in the ‘on-state’, this method
is not well suited for measuring the device voltage. Instead, the DUT voltage is measured directly at the
device, providing a highly accurate voltage probing measurement.
The current measurement is performed by first measuring the pulse as it passes by the first pick off
resistor that goes to Ch1 of the oscilloscope. A short delay later (as determined by the length of coaxial
cable between the pick off resistors) the pulse reflected from the DUT is measured at the same pick off
resistor yielding an overlapped waveform. Using transmission line theory and a pre-measurement
calibration pulse, the current into the DUT can be determined as:
IDUT = (V+ - V-)/Zo
Where V+, V-, and Zo are the incident pulse, reflected pulse, and characteristic impedance (50Ω) of the
transmission line system, respectively.
10. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 10
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
Figure 9 ESDEMC High Current TLP Test Setup for Solar PV Module Diodes
2.2 Test Procedure
The test procedure is demonstrated in the flowchart shown in Figure 11. Upon entering the test loop,
the system measures the leakage current of the DUT to obtain the Initial Degrade Measurement. Next
the TLP charge voltage is set. For the testing reported herein, the charge voltage was set to sweep from
500V to 9600V, in 100V increments. For the first test point, the oscilloscope scale and trigger level are
set based on the initial charge voltage and a 50Ω DUT. As testing progresses, the scale and trigger level
are set based on if the waveforms clip, or is under scaled. If the waveforms do not clip or are not under
scaled the settings are kept.
After setting the oscilloscope parameters the DUT is pulsed and the captured data is compared to
the oscilloscope display range for each captured channel to check for clipping and whether the scale is
appropriate. If any of the waveforms are clipped, the scale is adjusted and the DUT is pulsed again. If the
waveforms are ok, or under scaled, the data is accepted and processed. Any under scaled waveform
corrections are made on the next pulse level. Processing is completed by scaling the data by the
measurement attenuator and probe values.
Another degrade/failure measurement is made to determine if the DUT has failed or not. If failure
occurs, the test is stopped. If. If not, the next pulse point is performed. This repeats until all pulse points
are done, or failure occurs.
11. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 11
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
Figure 10 ESDEMC TLP Test Procedure Flow Chart
2.3 Dynamic IV Curve Measurement Principles
One of the goals of the measurement system described above is to obtain the Dynamic IV curve of
the DUT over the voltage range pulsed. Current and voltage waveforms resulting during pulse test are
demonstrated in Figure 11. The dashed lines near the end of the pulses represent the start and stop
points of the dynamic IV measurement window. The measurement window is typically 70 to 90% range
of the pulse but other ranges can be selected. Over this window, the average value of the time waveform
is taken as the current and voltage, respectively. This value is then plotted for each voltage pulse applied.
Figure 11 TLP test voltage and current waveforms during one pulse test
2.4 Degrade/Failure Measurement (Leakage Current Measurement)
The leakage current was measured using the Source Meter Unit (SMU) and, depending on the diode
tested, the bias voltage was varied between two and three different voltages with the maximum bias
voltage set to the Maximum Recurrent Peak Reverse Voltage (VRRM) for each diode. The VRRM voltage
is listed in each individual diodes datasheet.
Also, for the results reported below, for any diode that failed the leakage current limit was set to
2.5mA. This is the compliance limit of the SMU and is not an indicator of diode characteristic after failure,
other than they appear to fail to a short.
12. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 12
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
3. ESDEMC Solar PV Module Diodes Test
Over the years, ESDEMC Technology has tested several diode models for solar PV module companies.
The Maximum Peak Repetitive Reverse Voltage (VRRM) of the diodes are listed in Table 3Table 1. The
VRRM values are important because they provide the maximum bias voltage applied to the diode for
leakage current measurement. This value is supplied by the device manufacturer, and can be found in
their respective datasheets.
Equipment Brand and Model Specification and Comments
ESD Test ES621-200 TLP System
(A specially developed
system, not a release
model. The ES620-200
model may be released
for a simplified turnkey
solution)
<=1 ns rise-time, 100 ns pulse width, Max 10 kV charge line with no reflection
rejection.
The 10 kV charge voltage is achievable in the real world under dry conditions.
The 100 ns pulse is represented approximately 10 meters of cable that is very
close to the grounding conduit. Please note that during installation, a charged
PV module connecting to a grounded cable will have the same effect as a
charged cable discharging to a PV module. A 10 meter cable may not be the
worst case since solar cables could be up to hundreds meters for certain
systems.
Failure Test Keithley Model 2400 or
Keithley Model 6487
This configuration depends on the diode VRRM
Oscilloscope Agilent DSO9204H 2 GHz, 10 Gs/s
(200 MHz min bandwidth per ANSI/ESD STM5.5.1-2014 standard)
Table 2 ESDEMC Solar PV Module Diodes TLP Test Equipment and Settings
Diode Model VRRM, [V]
HY25PV060 60
HY25PV050 50
Vishay VSB1545 45
Diotec SB1540 40
Tyco F1200DC 150
Diotec F1200D 200
Table 3 Diode models tested and their VRRM
In the following sections, the test results will be presented in terms of the best performer to the
worst performer in regard to diode failure during TLP testing.
13. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 13
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
3.1 Tyco F1200DC, 150V VRRM
Out of the 80 Tyco F1200DC devices we tested, no failure occurred. The Dynamic IV and Leakage
Current curves for three samples are shown in Figure 12. The Dynamic IV curve is read from the Y-axis
to the bottom of the X-axis, and the Leakage Current from the Y-axis to the top of the X-axis. Note that
the top of the X-axis is logarithmic due to the dramatic change in leakage current once a device fails to
a short circuit.
Figure 12 Tyco F1200DC Dynamic IV and Leakage Current @ High Current TLP Test
Test Failure
80 Passed 0 Failed
0
1
2
10 30 50 70 90 110 130 150 170 190
Failure Number and Level Distribution
Figure 13 Tyco F1200DC Failure Rate @ High Current TLP Test
14. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 14
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
3.2 Vishay VSB1545
The next best performer was the Vishay VSB1545, which had only one diode fail out of one hundred
units; failure occurring near the last few test pulse levels. The Dynamic IV and Leakage Current curves
are shown in Figure 14. Once the diode failed to a short, the resulting leakage current was at the
compliance limit of the SMU, and is not an indicator of the diode condition.
Figure 14 Vishay VSB1545 Dynamic IV and Leakage Current @ High Current TLP Test
Figure 15 Vishay VSB1545 Failure Rate @ High Current TLP Test
Test Failure
99 Passed 1 Failed
0
1
2
10 30 50 70 90 110 130 150 170 190
Failure Number and Level Distribution
15. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 15
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
3.3 Diotec F1200D
The Diotec F1200D had eleven failures out of eighty diodes tested. The minimum, maximum, and
average pulse current for each of them are listed in Table 2, and the Dynamic IV and Leakage Current
curves, for three of the failed diodes, are shown in Figure 16.
Figure 16 Diotec F1200D Dynamic IV and Leakage Current @ High Current TLP Test
Figure 17 Diotec F1200D Failure Rate @ High Current TLP Test
Test Failure
70 Passed 10 Failed
0
1
2
3
10 30 50 70 90 110 130 150 170 190
Failure Number and Level Distribution
16. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 16
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
3.4 Diotec SB1540
The Diotec SB1540 diode had eighteen devices fail out of 100 tested. The Dynamic IV and Leakage
Current curves, for three of the failed diodes, are shown in Figure 18.
Figure 18 Diotec SB1540 Dynamic IV and Leakage Current @ High Current TLP Test
Figure 19 Diotec SB1540 Failure Rate @ High Current TLP Test
Test Failure
82 Passed 18 Failed
0
1
2
3
4
5
10 30 50 70 90 110 130 150 170 190
Failure Number and Level Distribution
17. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 17
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
3.5 HY 25PV050
All of the 50 HY 25PV050 diodes failed. The minimum, maximum, and average pulse current for each
of them are listed in Table 4, and the Dynamic IV and Leakage Current curves, for three of the failed
diodes, are shown in Figure 20.
Figure 20 HY 25PV050 Dynamic IV and Leakage Current
Figure 21 HY 25PV050 Failure Rate @ High Current TLP Test
Test Failure
0 Passed 50 Failed
0
5
10
15
20
25
10 30 50 70 90 110 130 150 170 190
Failure Number and Level Distribution
18. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 18
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
3.6 HY 25PV060
All of the 50 HY25PV060 diodes failed. The minimum, maximum, and average pulse current for each
of them are listed in Table 5, and the Dynamic IV and Leakage Current curves, for three of the failed
diodes, are shown in Figure 22.
Figure 22 HY 25PV060 Dynamic IV and Leakage Current@ High Current TLP Test
Figure 23 HY 25PV060 Failure Rate @ High Current TLP Test
Test Failure
0 Passed 50 Failed
0
5
10
15
20
25
10 30 50 70 90 110 130 150 170 190
Failure Number and Level Distribution
19. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 19
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
4. Conclusion
Of the diodes tested, only the Tyco F1200DC model did not have failure up to 200 Amp or 10 kV of
the eighty diodes tested. The next best performer was the Vishay VSB1545, which only had only one
failure, and that particular diode failed near the last few test pulses (100 diodes tested). The Diotec
F1200D had ten diode fail out of eighty tested, and the Diotec SB1540 had eighteen diodes fail out of
one hundred tested. The worst performers were both the HY models, where all diodes failed (all diodes
tested failed for both models).
Figure 24 Diode Failure Rate Comparison
The chart shown in Figure 25 depicts the minimum, maximum, and average pulse current at failure
for the diodes that failed.
Figure 25 Minimum, Maximum, and Average Pulse Current during failure for all tested diodes
20. Technical Note
TN.013.D20150915 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method
By Wei Huang and Jerry Tichenor
Page 20
ESDEMC Technology LLC, 4000 Enterprise Dr, Suite 103, Rolla, MO, 65409, USA
www.esdemc.com Tel: (+1)-573-202-6411 Fax: (+1) 877-641-9358 Email: info@esdemc.com
Of the diodes tested the Vishay VSB2045 and Hornby 15SQ050 are the only models that are Schottky
Barrier type. However, as the data suggests, the Schottky Barrier type does not necessarily guarantee
better performance in regard to withstanding ESD stress.
It has been suggested that it is not necessarily the diode design type that determines if the diode is
more or less susceptible to ESD stress, but instead a result of quality control of the manufacturing. For
example, the process may be as follows: a diode as the 15SQ100 (not tested herein) is being checked in
quality control after manufacturing. Its reverse breakdown voltage is checked. If it does not pass 100V,
but passes 50V, it is re-labeled as a 15SQ050 model. This may not guarantee that the 15SQ050 model is
a high quality 050 design, and may instead be a poor quality 100 design relegated to the 050 model line.
Here, the problem is that the diode may not hold 100V reverse voltage due to a local defect. The local
defect will concentrate the current during ESD into a very small area and cause the diode locally to melt.
Thus, the robustness of such a diode is much worse than a diode that passes the 100V reverse voltage,
which may indicate that it does have few, and less severe local defects.
According to our customer, our findings on the diode failure rate, through TLP test methodology,
correlates to their field return failure rate. Therefore, we recommend that TLP testing be performed for
all solar PV module diodes. In addition, it may be in the best interest of both solar PV module and diode
manufacturers to investigate the quality control of the diodes selected, yielding a more reliable design
for field use.
References
[1] International PV Module Quality Assurance Forum, Task Force 4 (www.pvqat.org), Dec. 5-7,
2011.
[2] n.a., (2015, Sept. 8), Bypass Diodes, Retrieved from http://www.electronics-
tutorials.ws/diode/bypass-diodes.html.
[3] n.a., Electrostatic Discharge, Retrieved from
https://en.wikipedia.org/wiki/Electrostatic_discharge
[5] n.a., n.d., Part 5: Device Sensitivity and Testing, Retrieved from https://www.esda.org/about-
esd/esd-fundamentals/part-5-device-sensitivity-and-testing/
[6] n.a., n.d., CAB Products, Retrieved from http://www.cabproducts.com/cable-rings-solar/