1. Moonlight
Sonata
FPGA BASED PIANO | EEE 304
DIGITAL ELECTRONICS
LABORATORY
Ahnaf Shahriyar
Hasin Azfar Pantha
Abhishek Das
Md Fatin Ishraq Faruqui
2. Motivation of the project
To be well acquainted with FPGA
(Field Programmable Gate array)
Discovering the multifunctionality
of FPGA
Building up a piece of art from the
jungles of wires of Digital
Electronics Project.
3. Objective of the project
To build a fully portable piano keyboard that contains 36
keys.
Generate 36 different tone frequencies using FPGA board
(Altera Cyclone II)
Realizing physical input keys in the piano keyboard and a
sound output from the FPGA board
Realizing a configurable piano unit
Building a cheap music instrument
4. Getting Familiar With
FPGA
An FPGA is an integrated
circuit designed to be
configured by a customer,
hence the name
programmable.
Source code can be written in
Verilog HDL, which has been
used in the project.
FPGA board used in this
project –Altera Cyclone II,
model no. EP2C5t144c8.
5. Schematic
of the piano
36 input keys go into 36 i/o pins in
FPGA.
36 output keys go to the speaker
through a resistor-capacitor branch.
branch.
Input pins are pulled down to ground
through 10k resistors.
A 3.3V Aluminium foil rail is placed
below the keys as source.
6. Input Keys of
the Piano
Metals screws are attached to each
of the keys of the piano
Whenever the keys are pressed, the
metal screws get connected with the
Aluminium foil rail, and the
corresponding input pin in the FPGA
gets high.
When simultaneous keys are
pressed, the corresponding input
keys get high, and the output pins
generate the composite signal.
Completely independent operation of
the keys.
7. Frequency Analysis of
the Notes
50 MHz clock cycle from pin 17 of FPGA board is being used
as the input clock.
Let’s look an example calculation!
8. Example
Calculation
From the chart, frequency of C3 = 130.81 Hz.
So, period of the note = 1
130.81 = 7.644 ms
Clock frequency = 50 MHz
So, clock pulses in 1s = 50 × 106
𝑝𝑢𝑙𝑠𝑒𝑠
Clock pulses in one C3 note period = 50 × 106
× 7.644 × 10−3
= 50 × 7644 𝑝𝑢𝑙𝑠𝑒𝑠
The C3 note will toggle from its previous state every
50×7644
2
or
50 × 3822 clock pulses
9. Logic circuit of the
Frequency Generator
20 bits counter for counting the clock frequency of
50 MHz.
Counting the clock pulses(for corresponding note)
and resetting the count
After the count for the corresponding note, a D flip-
flop is used for the toggling of that note waveform.
Via an AND operation of the toggling wave and
switch (key press), a note is generated.
11. Output Keys of the
Piano
Wires from output pins go into a common node.
A smoothing capacitor is connected from that node to the
ground.
The output sound is collected via a 3.5 mm female jack to
a speaker.
12. Problems & Solutions
Building the
keyboard
Power supply
to the keys
Shortage of pin
in the FPGA
Smoothing the
sound
Keyboard was made of PVC board for cost
efficiency and flexibility
Aluminium foil was used as a power supply
sink for the keys
Using same output pins for lower-most and
higher-most pins the piano.
Using a 10µF capacitor reduces the noise
greatly
13. Motivation of the project
SCOPE OF
IMPROVEMENT
Using a DAC module we
can produce more smooth sound
Smooth transition between the keys
14. Walking down
the memory
lane
Thank you, our respected
teachers and fellow classmates,
for all the support throughout the
journey.
Feel free to ask questions!