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Internal Architecture


89C51 µC
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Reset
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
XTAL1
XTAL2
GND

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21


VCC
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
EA/VPP
ALE/PROG
PSEN
P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0

I/O Port Programming


Port 1
• Port 1 occupies a total of 8 pins. It can be used as input or
output.
• This port does not need any pull-up resistor since it already
has pull-up resistor internally.
• Port 1 as input
– If port1 is configured as output port, to make it as input
port again, it must be programmed as by writing 1 to all its
bits.
Example:MOV A,#0FFH ;A=FF hex
MOV P1,A
;make P1 an input port

Port 2
• Port 2 act similarly to port 1.


A Brief Description of
Pinouts of AT89C51
•

Pins 1-8 :
Pins 1 through 8 are the pins of Port 1. Port 1 is a dedicated I/O
port; so these pins are available for interfacing external devices
as required. No alternate function is assigned to these pins.

•

Pin 9 :
Pin Number 9 is the system RESET (RST) of CPU of AT89C51.
AT89C51 is reset by holding RST high for at least two machine
cycles and then returning it low. The Reset may be manually
activated using a switch, or may be activated upon power-up
using RC network. After a system reset, Program Counter is
loaded with 0000H. When RST returns low, program execution
begins at the first location in code memory at address 0000H.


...continued

•

Pinouts of AT89C51
…continued

Pins 10-17 :
Pins’ numbers 10 through 17 constitute Port 3 which is a dual
purpose port. As well as general purpose I/O, these pins are
multifunctional with each having an alternate purpose related
to special features of C51.
These features along with pins are summarized in the coming
table :


...continued

Pinouts of AT89C51
…continued
P in #

B it #

Sy m b o l

B it A d d

A lte rn a te Fu n c tio n

10

P 3 .0

R xD

B0 H

R e c e iv e d a ta fo r Se ria l P o rt

11

P 3 .1

TxD

B1 H

Tra n sm it d a ta fo r Se ria l P o rt

12

P 3 .2

IN T0 #

B2 H

E xte rn al In te rru p t 0

13

P 3 .3

IN T1 #

B3 H

E xte rn al In te rru p t 1

14

P 3 .4

T0

B4 H

Tim e r/C o u n te r 0 e xte rn al in p u t

15

P 3 .5

T1

B5 H

Tim e r/C o u n te r 1 e xte rn al in p u t

16

P 3 .6

W R#

B6 H

E xte rn al M e m o ry w rite stro b e

17

P 3 .7

RD#

B7 H

E xte rn al M e m o ry re a d stro b e

Symbols followed by Pound Sign(#) are “Low Enable”

Pinouts of AT89C51
…continued
•

Pins 18-19 :
Pins’ numbers 18 and 19 comprise the inputs of crystal to be
connected to the on-chip oscillator of AT89C51. Two Stabilizing
capacitors of 30 pF each are also required.

•

Pin 20 :
It is the common ground of 89C51 and accompanying networks.

•

Pins 21-28 :
Pins 21 through 28 are of Port 2.
Port 2 is a also a dual purpose port. It can serve as a general
purpose I/O port or as the high byte of the address bus for
designs with external code memory or more than 128 bytes of
data memory.

• The 8051 has an on-chip oscillator but requires an external
clock to run it. Most often a quartz crystal oscillator is
connected to inputs XTAL1 (pin 19) and XTAL2 (pin 18). The
quartz crystal oscillator connected to XTAL1 and XTAL2 .One
side of each capacitor is connected to the ground as shown in
Figure.


•

•

Pinouts of AT89C51
…continued
Pin 29 and Pin 31 :

These pins are used in conjunction with external code memory
being used or else. On Pin number 29 is a control signal PSEN#
(Program Store Enable) that enables external code (Program)
memory. It is usually connected to an EEPROMs Output Enable
(OE#) pin to permit reading of program bytes. Pin 31 i.e. EA#
(External Access) is either tied high (+5V) or low (ground). If
high, the C51 executes programs from internal ROM otherwise
from external code memory (and then PSEN# comes into
play).
Pins 32 - 39 and Pin Number 30:
Pins 32 through 39 make up Port 0. Port 0 ,in addition to being
used as an I/O port, has the capacity to act as multiplexed
data and address bus. The discrimination of data and address
is provided through ALE (Address Latch Enable) which is Pin
number 30.

The 8051 family members, such as the 8751/52, 89C51/52, or DS89C4xO, all come
with on-chip ROM to store programs. In such cases, the EA pin is connected to Vcc. For
family members such as the 8031 and 8032 in which there is no on-chip ROM. code is
stored on an external ROM and is fetched by the 8031/32. Therefore, for the 8031 the
EA pin must be connected to GND to indicate that the code is stored externally. EA.
which stands for “external access,” is pin number 31 in the DIP packages. It is an input
pin and must be connected to either Vcc or GND. In other words, it cannot be left
unconnected.


Pinouts of AT89C51
…continued
•

Pins 40 : POWER SUPPLY


AT89C51 RAM


Register Banks

1Fh –18h

R7

R6

R5

R4

R3

R2

R1

R0

RB – 3

17h –10h

R7

R6

R5

R4

R3

R2

R1

R0

RB – 2

0Fh – 08h

R7

R6

R5

R4

R3

R2

R1

R0

RB – 1

07h – 00h

R7

R6

R5

R4

R3

R2

R1

R0

RB – 0


Special Function Registers
FFh - F8h
F7h - F0h
EFh - E8h
E7h - E0h
DFh - D8h
D7h - D0h
CFh - C8h
C7h - C0h
BFh - B8h
B7h - B0h
AFh - A8h
A7h - A0h
9Fh - 98h
97h - 90h
8Fh - 88h
87h - 80h

B*

A*
PSW*

SBUF
TH1
PCON

* - Bit Addressable Registers

TH0

TL1
DPH


TL0
DPL

TMOD
SP

IP*
P3*
IE*
P2*
SCON*
P1*
TCON*
P0*

Description of SFR..
 Accumulator (E0h) – It is an 8-bit register. It is the main Input register
of ALU(Arithmatic & Logical unit) & used in all arithmatic & logical
operations. The Bits of this register can be accessed by either name of
bits or by address of bits.
ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0
E7h

E6h

E5h

E4h

E3h

E2h

E1h

E0h

 B (F0h) – It is also an 8-bit register. It is also the input register of
ALU(Arithmatic & Logical unit) & used in multiplication & divide
operations. The Bits of this register can be accessed by either name of
bits or by address of bits.
B.7

B.6

B.5

B.4

B.3

B.2

B.1

B.0

F7h

F6h

F5h

F4h

F3h

F2h

F1h

F0h


 P0 (80h), P1 (90h), P2 (A0h), P3 (B0h) – P0, P1, P2, and P3 are the
SFR latches of Ports 0, 1, 2, and 3, respectively.


 Program Counter (PC – Not Addressable) – It is an 16 bit not
addressable register that contain the address of next instruction of
program that is to be executed.
DPTR (DPH,DPL – 83h,82h) - The Data Pointer (DPTR) consists of a high
byte (DPH) and a low byte (DPL). Its intended function is to hold a 16-bit
address. It may be manipulated as a 16-bit register or as two

independent 8-bit registers.


Registers
A
B
R0

DPTR

DPH

DPL

R1
R2

PC

PC

R3
Some 8051 16-bit Register

R4
R5
R6
R7
Some 8-bitt Registers of the
8051


Instructions
• Movmov destination,source ;copy source to
destination
ex-mov a,#55h
mov r0,a
r0=a=55h


Techogroovy Systems
India Pvt Ltd
www.technogroovy.com,
Cell- +91-7500347448 ,
+91-7533940322

Embedded Systems Project Based Training|Engineering Projects,Summer Training

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