This document outlines a PCB design for manufacture (DFM) approach to streamline the transition from design to manufacturing. The key steps include: 1) Designing and testing schematics on breadboards to select components; 2) Creating schematics, bills of materials, and layouts based on manufacturer capabilities; and 3) Extracting necessary files like Gerber and drill files for the manufacturer. Signal integrity is tested using IBIS models, and design reviews are conducted with files like schematics and 3D visualizations before sending final files to the manufacturer.

1. PCB Design for Manufacture
(DFM) Approach
Devang Sankhala
3/6/2017

2. Need for DFM
1. Streamlined transition from design to manufacturing
2. Easier exploitation of modern PCB assembly tools
3. Faster design cycles
4. Minimum human intervention for a faster process and
implementing automation
5. To strictly adhere to industrial standards (e.g. JEDEC, IPC etc.) or
continent based standards (e.g. FCC, CEN, etc.)
6. To design based on predictive mathematical models to estimate
circuit performance pre-fabrication

3. Typical design flow
1. Design and test schematic on breadboard/stripboard/EVMs
2. Select best combination of components
3. Create a schematic
4. Create a BOM
5. Create a layout based on manufacturer’s capabilities
6. Extract necessary files for the manufacturer for machines
7. Create a Review document for team review
8. Create a Fabrication note for manufacturer for specialized process

4. Design phase
1. Select components based on performance
2. Select packages for components based on size restrictions
3. Identify important test points

5. Create a schematic
1. Obtain IBIS models and BXL files for components
2. Import BXL files to create a custom library of schematic symbols and
packages
3. Import PSPICE/IBIS (I/O Buffer Information Specification) models for
components
4. Create a schematic and assign symbols, packages and IBIS models

6. BXL extraction using Ultralibrarian

7. IBIS model behavioral diagram
Source: Texas Instruments Application Note 1111 An Introduction to IBIS (I/O Buffer Information Specification) Modeling

8. IBIS model advantages
1. Small and compact
2. Does not leak IP sensitive information
3. Faster computation, unlike PSPICE where the full netlist needs to be
simulated
4. Can test for reflections, delay, overshoot and ringing

9. Sample IBIS model

10. Schematic (4-bit bus for Zync-7000)

11. Tolerances

12. Supplier Search

13. Bill of Materials (ActiveBOM)

14. Layer Stack (1oz Cu 10-layer)

15. PCB design rules

16. Layout with MultiRoute

17. Signal Integrity Test Report

18. Signal Integrity Waveforms

19. IPC-D-356 Netlist
CAD netlist IPC-D-356 netlist

20. 3D visualization

21. Sample Fabrication Note

22. Case design

23. Files for Design Review Document
1. Schematic with netlist and net class details (e.g. power, signal, RF,
etc.)
2. Bill of Materials
3. Layer stack
4. PCB layout overview with critical dimensions (datum and slot
coordinates)
5. Impedance data
6. 3D visualization

24. Files for manufacturer
1. Gerber (RS-274) layer files
2. Excellon NC drill files with board edge, holes and slots
3. IPC-D-356 Netlist (coordinate-based bare board netlist)
4. Test point information file (fabrication and assembly test points and
signal data)
5. Impedance table
6. Fabrication notes
7. BOM with exact MPN (Manufacturer Product Number)
8. Pick and place file
9. 3D STEP/STL file for casing design

25. Questions?