Presentation on Cache memory We did this in our 8th semester along with my team mate Rezwana Ria

1. Presented To-
Nur Imtiazul Haque
Lecturer,Dept. Of CSE
Daffodil International University
Presentation OnCache Memory
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2. Group members
1.Humayra Khanum
ID : 161-15-7325
2.Rezwana Islam Ria
ID :161-15-7071
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3. What is Cache Memory?
Cache memory isasmall, high-speedRAMbufferlocated
between the CPUandmain memory.
Cache memory holds a copy of the instructions (instruction
cache) or data (operand or data cache) currently being used
bythe CPU.
The main purpose of a cache is to accelerate your computer
whilekeepingthe price ofthe computer low.
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4. Placement of Cache in computer
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5. Instruction Cache
• Theinstruction cacheis usedto store
instructions.
• Helps to reduce the cost of going to memory to
fetchinstructions.
• Holds several other things, likebranch
prediction information.
• Example:- Theinstruction cacheon Ultra SPARC
pre-decodes the incominginstruction
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6. Data Cache
• Data cacheis afast buffer that containsthe
application data.
• Before the processor can operate on the data, it
must be loaded from memory into the data
cache.
• Then loaded from the cache line into a register
and instruction using this value canoperateon it.
• The resultant value is stored in a register. Then
register to cacheand cacheto mainmemory.
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7. TLB Cache
• TLB–Translated LookasideBuffer.
• Also called ascontent-addressable
memory(CAM).
• It is acacheto store translatedaddresses.
• TheCPUcanonly operate on data and
instructions that are mapped into theTLB.
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8. Hit Ratio
The ratio ofthe total number ofhits dividedbythe total
CPUaccessesto memory (i.e. hits plusmisses) iscalledHit
Ratio.
 Hit Ratio = Total Number of Hits / (Total
Number of Hits + Total Number of
Miss)
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9. Name:
Rezwana
Islam Ria
ID:161-
15-7071

10. ASSOCIATIVE
MAPPINGAn associative mapping uses an associative memory.
The memory is being accessed using its contents.
Every line of cache memory will accommodate the
address and contents of the address.
This memory is also called Content addressable
memory.
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11. Associative Mapping
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12. Set Associative
MappingThat is the easy control of direct mapping cache
The more flexible mapping of the fully associative
cache.
Each location can have more than one pair of tag+data
items
It is more than one pair of tag and date .so if one cache
location is holding two pair of tag+data item ,that is
called 2way set associative mapping.
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13. Two-Way Set
Associative Mapping
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14. Replacement
Algorithms of Cache
Memory
It is used when there are no available space in a cache place in
data.
Four common cache replacement algorithms are
1.Least Recently Used (LRU)
-Replacement item Used by CPU
2.First-In-First-out (FIFO)
-Replacement item Used by cache from longest time
3.Least frequency Used (LFU)
-Replacement item used by CPU
4.Random
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15. 81
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